Patent application number | Description | Published |
20080251932 | Method of forming through-silicon vias with stress buffer collars and resulting devices - A method of forming a via having a stress buffer collar, wherein the stress buffer collar can absorb stress resulting from a mismatch in the coefficients of thermal expansion of the surrounding materials. Other embodiments are described and claimed. | 10-16-2008 |
20090250824 | METHOD AND APPARATUS TO REDUCE PIN VOIDS - A semiconductor package comprises a substrate that utilizes one or more pins to form external interconnects. The pins are bonded to bonding pads on the substrate by solder. The pins may each has a pin head that may have a bonding surface, wherein the bonding surface may comprises a center portion and a side portion that is tapered away relative to the center portion. In some embodiments, the bonding surface may comprise a round shape. In some embodiments, a gas escape path may be provided by the shape of the bonding surface to increase pin pull strength and/or solder strength. The package may further comprise a surface finish that may comprise a palladium layer with a reduced thickness to reduce the amount of palladium based IMC precipitation into the solder. | 10-08-2009 |
20100078805 | METHOD AND CORE MATERIALS FOR SEMICONDUCTOR PACKAGING - A semiconductor package comprises a semiconductor substrate that may comprise a core. The core may comprise one or more materials selected from a group comprising ceramics and glass dielectrics. The package further comprises a set of one or more inner conductive elements that is provided on the core, a set of one or more outer conductive elements that is provided on an outer side of the substrate, and a semiconductor die to couple to the substrate via one or more of the outer conductive elements. Example materials for the core may comprise one or more from alumina, zirconia, carbides, nitrides, fused silica, quartz, sapphire, and Pyrex. A laser may be used to drill one or more plated through holes to couple an inner conductive element to an outer conductive element. A dielectric layer may be formed in the substrate to insulate an outer conductive element from the core or an inner conductive element. | 04-01-2010 |
20100148365 | GRID ARRAY CONNECTION DEVICE AND METHOD - A method and device for input/output connections is provided. Devices and methods for connection structure are shown with improved mechanical properties such as hardness and abrasion resistance. Land grid array structures are provided that are less expensive to manufacture due to reductions in material cost such as gold. Ball grid array structures are provided with improved resistance to corrosion during fabrication. Ball grid array structures are also provided with improved mechanical properties resulting in improved shock testing results. | 06-17-2010 |
20100289154 | METHOD AND CORE MATERIALS FOR SEMICONDUCTOR PACKAGING - A semiconductor package comprises a semiconductor substrate that may comprise a core. The core may comprise one or more materials selected from a group comprising ceramics and glass dielectrics. The package further comprises a set of one or more inner conductive elements that is provided on the core, a set of one or more outer conductive elements that is provided on an outer side of the substrate, and a semiconductor die to couple to the substrate via one or more of the outer conductive elements. Example materials for the core may comprise one or more from alumina, zirconia, carbides, nitrides, fused silica, quartz, sapphire, and Pyrex. A laser may be used to drill one or more plated through holes to couple an inner conductive element to an outer conductive element. A dielectric layer may be formed in the substrate to insulate an outer conductive element from the core or an inner conductive element. | 11-18-2010 |
20110169167 | GRID ARRAY CONNECTION DEVICE AND METHOD - A method and device for input/output connections is provided. Devices and methods for connection structure are shown with improved mechanical properties such as hardness and abrasion resistance. Land grid array structures are provided that are less expensive to manufacture due to reductions in material cost such as gold. Ball grid array structures are provided with improved resistance to corrosion during fabrication. Ball grid array structures are also provided with improved mechanical properties resulting in improved shock testing results. | 07-14-2011 |
20150181713 | PANEL WITH RELEASABLE CORE - Generally discussed herein are systems and apparatuses that can include a releasable core panel. The disclosure also includes techniques of making and using the systems and apparatuses. According to an example a technique of making a releasable core panel can include coupling an inner foil to a base, situating an adhesive layer on the inner foil, such that the inner foil is substantially flush with a periphery of the base, situating an outer conductive foil on the adhesive layer, or covering an interface between the adhesive layer, the inner foil and the outer conductive foil with a protective material. | 06-25-2015 |
20150181717 | PANEL WITH RELEASABLE CORE - Generally discussed herein are systems and apparatuses that can include a releasable core panel. The disclosure also includes techniques of making and using the systems and apparatuses. According to an example a technique of making a releasable core panel can include coupling an inner foil to a substantially rectangular base, situating an outer conductive foil situated on the inner foil, or coupling, using a connective material, the inner foil and the outer conductive foil near edges of the outer conductive foil and the inner foil. | 06-25-2015 |