Chao
Allen Chao, Taichung City TW
Patent application number | Description | Published |
---|---|---|
20130235262 | METHOD FOR PACKAGING IMAGE SENSOR STRUCTURE AND IMAGE SENSOR STRUCTURE FORMED FROM THE SAME - A method for packaging an image sensor structure and an image sensor structure formed from the same are provided. The method comprises the steps of: providing an image sensor set on a substrate in that: a plurality of substrate conductive joints are installed on the supporting surface; adhering a transparent cover upon the image sensor set; taking a needle with adhesive therein; preferably, the adhesive is epoxy; injecting the adhesive from the needle into a periphery of the image sensor set and the transparent cover to completely seal the sensor conductive joints, the substrate conductive joints and conductive wires between the substrate conductive joints and the sensor conductive joints so as to package the image sensor set therein and form a packaging structure; and baking the packaging structure. An image sensor structure made from the same is provided. | 09-12-2013 |
Calvin Yi-Ping Chao, Zhubei City TW
Patent application number | Description | Published |
---|---|---|
20130271626 | METHOD OF REDUCING COLUMN FIXED PATTERN NOISE - A method of reducing column fixed pattern noise including calibrating a readout circuit, wherein the readout circuit is electrically connected to at least one programmable gain amplifier and an analog-to-digital converter. Calibrating the readout circuit includes electrically disconnecting the readout circuit from a pixel output and electrically connecting a pixel reset input of the readout circuit to a pixel output signal input of the readout circuit. Calibrating the readout circuit further includes comparing a measured output of the readout circuit to a predetermined value and storing the comparison result in a non-transitory computer readable medium. The method further includes operating the readout circuit, the operating the readout circuit includes receiving a pixel sample signal and outputting a calibrated output based on an operating output and the stored comparison result. | 10-17-2013 |
20130284885 | Method and Apparatus for Image Sensor Packaging - Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a sensor device with an application specific integrated circuit (ASIC) are disclosed. According to an embodiment, a sensor device may be bonded together face-to-face with an ASIC without using a carrier wafer, where corresponding bond pads of the sensor are aligned with bond pads of the ASIC and bonded together, in a one-to-one fashion. A column of pixels of the sensor may share a bond bad connected by a shared inter-metal line. The bond pads may be of different sizes and configured in different rows to be disjoint from each other. Additional dummy pads may be added to increase the bonding between the sensor and the ASIC. | 10-31-2013 |
20140042303 | CMOS SENSOR WITH LOW PARTITION NOISE AND LOW DISTURBANCE BETWEEN ADJACENT ROW CONTROL SIGNALS IN A PIXEL ARRAY - A CMOS image sensor includes a pixel array including a plurality of unit pixels with individual rows of unit pixels being coupled to respective row control signal lines, and a buffer including plural row control signal drivers. Each driver is coupled to a respective one of the row control signal lines and is configured to provide a row control signal pulse to a respective row control signal line in response to an input pulse when the row control signal line is in an active state and to bias the row control signal line at a ground voltage when the respective row control signal line is in an inactive state. Each driver has a first drive capability when the row control signal line is in the active state and a second drive capability greater than the first drive capability when the row control signal line is in an inactive state. | 02-13-2014 |
20140077057 | 3D-STACKED BACKSIDE ILLUMINATED IMAGE SENSOR AND METHOD OF MAKING THE SAME - A stacked image sensor and method for making the same are provided. The stacked image sensor includes an upper chip with a pixel array thereon. The second chip includes a plurality of column circuits and row circuits associated with the columns and rows of the pixel array and disposed in respective column circuit and row circuit regions that are arranged in multiple groups. Inter-chip bonding pads are formed on each of the chips. The inter-chip bonding pads on the second chip are arranged linearly and are contained within the column circuit regions and row circuit regions in one embodiment. In other embodiments, the inter-chip bonding pads are staggered with respect to each other. In some embodiments, the rows and columns of the pixel array include multiple signal lines and the corresponding column circuit regions and row circuit regions also include multiple inter-chip bonding pads. | 03-20-2014 |
20140138520 | Dual-Side Illumination Image Sensor Chips and Methods for Forming the Same - A Dual-Side Illumination (DSI) image sensor chip includes a first image sensor chip configured to sense light from a first direction, and a second image sensor chip aligned to, and bonded to, the first image sensor chip. The second image sensor chip is configured to sense light from a second direction opposite the first direction. | 05-22-2014 |
20140138521 | Dual-Side Illumination Image Sensor Chips and Methods for Forming the Same - A Dual-Side Illumination (DSI) image sensor chip includes a first image sensor chip configured to sense light from a first direction, and a second image sensor chip aligned to, and bonded to, the first image sensor chip. The second image sensor chip is configured to sense light from a second direction opposite the first direction. | 05-22-2014 |
20140184316 | BIAS CONTROL - One or more techniques or systems for bias control are provided herein. In some embodiments, the bias control relates to biasing of a column of one or more pixels for an image sensor. In some embodiments, an associated circuit includes a reset transistor, a source-follower transistor, a first transfer transistor, a first bias transistor, a second bias transistor, and a switch connected to the second bias transistor. In some embodiments, the first bias transistor and the second bias transistor bias a column of pixels at a first time. In some embodiments, the second bias transistor is turned off, thus removing a second bias at a second time. In this way, performance of the image sensor is improved, at least because the second bias transistor enables faster settling time when active, and a wide pixel operation range when switched off. | 07-03-2014 |
20140217263 | IMAGE SENSOR CONFIGURED TO REDUCE BLOOMING DURING IDLE PERIOD - Among other things, techniques and systems are provided for identifying when a pixel of an image sensor is in an idle period. A flag is utilized to differentiate when the pixel is in an idle period and when the pixel is in an integration period. When the flag indicates that the pixel is in an idle period, a blooming operation is performed on the pixel to reduce an amount of electrical charge that has accumulated at the pixel or to mitigate electrical charge from accumulating at the pixel. In this way, the blooming operation reduces a probability that the photosensitive sensor becomes saturated during an idle period of the pixel, and thus reduces the likelihood of electrical charge from a pixel that is not intended contribute to an image from spilling over and potentially contaminating a pixel that is intended to contribute to the image. | 08-07-2014 |
20140252202 | COLUMN ANALOG-TO-DIGITAL CONVERTER FOR CMOS SENSOR - A system and method is disclosed for an imaging device and/or an analog to digital converter which converts an analog input signal to a digital data signal using a comparator which compares the analog input signal to a first ramped reference signal to determine an operating point and then uses the same comparator to compare the analog input signal to a second ramped reference signal multiple times about the determined operating point. | 09-11-2014 |
20140266831 | LOW GLITCH CURRENT DIGITAL-TO-ANALOG CONVERTER - The present disclosure relates to a method and architecture to minimize a transient glitch within a current digital-to-analog converter (DAC) comprising an array of identical current unit cells. The current DAC is configured with individual column decoders for even and odd rows of current unit cells, thus allowing for independent control of adjacent rows. The even row and odd row column decoders further comprise thermal decoders with coupled timing encoding which establishes synergy between an adjacent pair of rows. As current units cells within an active row are activated across the row by a counting up of a first column decoder, the current units cells within a next row adjacent the active row are returned to an initial state of the active row by counting down in a second column decoder. Other devices and methods are also disclosed. | 09-18-2014 |
20140266991 | Systems and Methods to Mitigate Transient Current for Sensors - A sensor system includes a pixel array, column units and a compensation circuit. The pixel array is configured to provide pixel column data. The column units are configured to generate an offset data out signal from the pixel column data. The offset data out signal includes digital offsets. The compensation circuit is configured to remove the digital offsets from the offset data out signal. The compensation circuit is also configured to generate a data out signal. | 09-18-2014 |
20140347535 | APPARATUS WITH CALIBRATED READOUT CIRCUIT - An apparatus comprises a readout circuit configured to be disconnected from a pixel output, and to connect a pixel reset signal received by the readout circuit to a pixel output signal received by the readout circuit. The apparatus also comprises at least one programmable gain amplifier coupled with the readout circuit. The apparatus further comprises an analog-to-digital converter coupled with the programmable gain amplifier. The readout circuit is configured to be calibrated based on a comparison of a measured output of the readout circuit to a predetermined value, the predetermined value being equal to (2 | 11-27-2014 |
Chao-Huan Chao, Chu-Nan TW
Patent application number | Description | Published |
---|---|---|
20130039054 | LIGHT-EMITTING DIODE LAMP - A light-emitting diode lamp comprises a supporting salver comprising a first and second surfaces, the second surface defines first recesses; light-emitting diodes (LEDs) mounted on the first surface; a lampshade covering the light-emitting diodes, the lampshade comprising an optic portion facing the LEDs, the optic portion comprising lenses, each of the lenses facing each of the LEDs, the lampshade defining second recesses corresponding to the first recesses, each of the first recesses aligned with each of the second recesses; and clips each comprising a connecting portion and two buckling portions at two opposite ends of the connecting portion, the connecting portion being resilient, one of the two buckling portions being received in one of the first recesses, another one of the two buckling portions being received in a corresponding one of the second recesses, wherein the lampshade is interchangeably mounted on the supporting salver through the clips. | 02-14-2013 |
Cheng-Chao Chao, Chu-Nan TW
Patent application number | Description | Published |
---|---|---|
20130163262 | LIGHT EMITTING DIODE (LED) LAMP ASSEMBLY - A lamp assembly comprises a lamp body, a bracket, and a securing member. The lamp body comprises a leg. The lamp body is arranged on the bracket. The securing member is mounted on the bracket and capable of moving relative to the bracket to press or away from the leg of the lamp body to achieve an assembly of the lamp body to the bracket or a disassembly of the lamp body from the bracket. The lamp body includes a plurality of light emitting diodes as a light source. | 06-27-2013 |
20130164556 | CIRCUIT BOARD WITH THERMALLY CONDUCTIVE LAYERS AND MANUFACTURING METHOD THEREFOR - An exemplary method for manufacturing a circuit board includes, firstly, providing a substrate made of heat conductive, electrically insulative material. Then a copper layer is formed on the substrate. After that, nickel is plated on the copper layer to form a nickel layer. Finally, gold is and plated on the nickel layer to form a gold layer. | 06-27-2013 |
20130256734 | LIGHT-EMITTING DIODE AND METHOD FOR MANUFACTURING THE SAME - An LED (light emitting diode) includes a base, two spaced electrodes and a thermal conductivity layer. The base has a top surface. The two electrodes and the thermal conductivity layer are located on the top surface of the base. The thermal conductivity layer is attached to the top surface and located beside and between the electrodes. The two electrodes are electrically insulated from each other, and electrically insulated from the thermal conductivity layer. A light emitting chip is electrically connected to the two electrodes. The electrodes and the thermal conductivity layer are on different levels. | 10-03-2013 |
Chen-Hsiang Chao, Kaohsiung City TW
Patent application number | Description | Published |
---|---|---|
20120302142 | POLISHING PAD AND METHOD OF PRODUCING THE SAME - The present invention mainly relates to a polishing pad and method of producing the same. The polishing pad comprises a base material having a surface for polishing a substrate, wherein the surface comprises a plurality of bundles of first long fibers and an elastomer embedded into the bundles. The bundles of first long fibers are entangled with each other. | 11-29-2012 |
Chieh-Yu Chao, Miao-Li County TW
Patent application number | Description | Published |
---|---|---|
20130044077 | TOUCH PANEL AND METHOD FOR FABRICATING THE SAME AND DISPLAY DEVICE COMPRISING THE SAME - The disclosure provides a touch panel, including: a substrate, wherein the substrate includes a viewing region and a border region at an edge of the viewing region; a patterned transparent conductive layer formed on the substrate, wherein the patterned transparent conductive layer formed on the viewing region has a touch sensitive function; and a patterned metal layer formed on the patterned transparent conductive layer and on the border region, wherein the patterned metal layer includes a contact region and a trace region connecting to the contact region, and at least a portion of the contact region overlaps with the patterned transparent conductive layer, and a shift range between a formation position of the contact region of the patterned metal layer and a formation position of the patterned transparent conductive layer is smaller than about 150 μm. | 02-21-2013 |
Chien-Chin Chao, Changhua County TW
Patent application number | Description | Published |
---|---|---|
20120155990 | SCREW STRUCTURE - An improved screw includes a head and a shank. The head has a wrench cavity on the top to be driven by a screwdriver. The shank is connected to the bottom of the head. The shank has a round shank at an upper end close to the head to form a left-hand thread section, and a triangular shank at a lower end to form a right-hand thread section. The left-hand and right-hand thread sections have thread points formed in an asymmetrical manner. The right-hand thread section further has an upper thread section and a lower thread section at the bottom to form the tip. The lower thread section has saw-toothed threads. Thus tapping efficiency improves when the screw is fastened to a workpiece, and faster and firmer fastening can be achieved. | 06-21-2012 |
Chien-Ju Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20130139120 | COMPUTER IMPLEMENTED SYSTEM AND METHOD FOR LEAKAGE CALCULATION - A tool includes one or more machine readable storage mediums encoded with data. The data include a list of standard cells included in an integrated circuit (IC) design The data include a nominal leakage value approximating a respective median leakage value for each of the plurality of standard cells at a predetermined temperature and voltage. The data include at least one table including adjustment factors for calculating leakage based on voltage, temperature and process variations. The table includes a respective statistical scaling factor, for computing a mean leakage corresponding to a given median leakage. A processor is programmed to calculate and output a total IC leakage for the IC design at an input voltage and input temperature, based on the list, the nominal leakage values, the input voltage, the input temperature and at least one of the adjustment factors. | 05-30-2013 |
20140239410 | Integrated Circuit with Standard Cells - A die includes a plurality of rows of standard cells. Each of all standard cells in the plurality of rows of standard cells includes a transistor and a source edge, wherein a source region of the transistor is adjacent to the source edge. No drain region of any transistor in the each of all standard cells is adjacent to the source region. | 08-28-2014 |
20140239412 | Channel Doping Extension beyond Cell Boundaries - An integrated circuit includes a first and a second standard cell. The first standard cell includes a first gate electrode, and a first channel region underlying the first gate electrode. The first channel region has a first channel doping concentration. The second standard cell includes a second gate electrode, and a second channel region underlying the second gate electrode. The second channel region has a second channel doping concentration. A dummy gate includes a first half and a second half in the first and the second standard cells, respectively. The first half and the second half are at the edges of the first and the second standard cells, respectively, and are abutted to each other. A dummy channel is overlapped by the dummy gate. The dummy channel has a third channel doping concentration substantially equal to a sum of the first channel doping concentration and the second channel doping concentration. | 08-28-2014 |
20140245248 | Cell and Macro Placement on Fin Grid - A die includes at least one standard cell, which includes a first boundary and a second boundary opposite to the first boundary. The first boundary and the second boundary are parallel to a first direction. The at least one standard cell further includes a first plurality of FinFETs including first semiconductor fins parallel to the first direction. The die further includes at least one memory macro, which has a third boundary and a fourth boundary opposite to the third boundary. The third boundary and the fourth boundary are parallel to the first direction. The at least one memory macro includes a second plurality of FinFETs including second semiconductor fins parallel to the first direction. All semiconductor fins in the at least one standard cell and the at least one memory macro have pitches equal to integer times of a minimum pitch of the first and the second semiconductor fins. | 08-28-2014 |
20140258952 | Cell Having Shifted Boundary and Boundary-Shift Scheme - An embodiment cell shift scheme includes abutting a first transistor cell against a second transistor cell and shifting a place and route boundary away from a polysilicon disposed between the first transistor cell and the second transistor cell. In an embodiment, the cell shift scheme includes shifting the place and route boundary to prevent a mismatch between a layout versus schematic (LVS) netlist and a post-simulation netlist. | 09-11-2014 |
Chih-Chiang Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20130100663 | LIGHT-GUIDE MODULE - A light-guide module including a light-guide sheet and a light source is provided. The light-guide sheet includes a light-emergent region and a plurality of localized micro-structures located at a first surface of the light-guide sheet, wherein the localized micro-structures are distributed except the light-emergent region. The localized micro-structures include a plurality of arc grooves disposed on a first region. The light source includes a plurality of light-emitting devices. A light-emergent area of each of the light-emitting devices is A. In the localized micro-structures of the first region covered by the light-emitting devices, an area occupied by the arc grooves having aspect ratios greater than 0.5 is greater than or substantially equal to 0.5 A. | 04-25-2013 |
20150016148 | LIGHT GUIDING PLATE AND LIGHT GUIDING DEVICE INCLUDING THE SAME - A light guiding plate and a light guiding device are provided, and the light guiding plate is implemented in the light guiding device. The light guiding device includes a side light source emitting light to the light guiding plate. The light guiding plate includes a first surface, a second surface and a third surface. The second surface is opposite to the first surface, and the third surface is adjacent to the first surface and the second surface. The second surface includes plural light guiding units, and each of the light guiding units includes a total reflection concavity and a light emitting convexity. The light emitting convexity surrounds the total reflection concavity. | 01-15-2015 |
20150055818 | SPEAKER STRUCTURE - A speaker structure includes a main body, a circuit board and a magnetic component. The main body has a receiving section and a recess formed on an outer circumference of the receiving section. A center of the main body is formed with a hole in communication with the receiving section. The circuit board has a board body and an outer frame body inlaid in the recess of the main body. The magnetic component is received in the hole. A voice coil collar is disposed around the magnetic component. Multiple windings are wound around a surface of the voice coil collar. Two ends of the windings are attached to the circuit board. According to the above arrangement, the volume of the speaker structure is greatly reduced and the manufacturing cost of the speaker structure is lowered. | 02-26-2015 |
Chih-Kang Chao, Tainan City TW
Patent application number | Description | Published |
---|---|---|
20130020717 | INTEGRATED CIRCUIT HAVING A STRESSOR AND METHOD OF FORMING THE SAME - An embodiment of the disclosure includes a method of forming a semiconductor structure. A substrate has a region adjacent to a shallow trench isolation (STI) structure in the substrate. A patterned mask layer is formed over the substrate. The patterned mask layer covers the STI structure and a portion of the region, and leaves a remaining portion of the region exposed. A distance between an edge of the remaining portion and an edge of the STI structure is substantially longer than 1 nm. The remaining portion of the region is etched thereby forms a recess in the substrate. A stressor is epitaxially grown in the recess. A conductive plug contacting the stressor is formed. | 01-24-2013 |
20130043590 | SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING - The present application discloses a method of manufacturing a semiconductor structure. According to at least one embodiment, a first etch stop layer is formed over a conductive feature and a substrate, and the conductive feature is positioned over the substrate. A second etch stop layer is formed over the first etch stop layer. A first etch is performed to form an opening in the second etch stop layer, and the opening exposes a portion of the first etch stop layer. A second etch is performed to extend the opening downwardly by removing a portion of the exposed first etch stop layer, and the extended opening exposes a portion of the conductive feature. | 02-21-2013 |
20130069162 | OPTICAL PROXIMITY CORRECTION FOR ACTIVE REGION DESIGN LAYOUT - The present disclosure provides an integrated circuit design method. In an example, a method includes receiving an integrated circuit design layout that includes an active region feature, a contact feature, and an isolation feature, wherein a portion of the active region feature is disposed between the contact feature and the isolation feature; determining whether a thickness of the portion of the active region feature disposed between the contact feature and the isolation feature is less than a threshold value; and modifying the integrated circuit design layout if the thickness is less than the threshold value, wherein the modifying includes adding a supplementary active region feature adjacent to the portion of the active region feature disposed between the contact feature and the isolation feature. | 03-21-2013 |
20130071995 | Method of Manufacturing a Semiconductor Device - A method of manufacturing a semiconductor device is disclosed. The exemplary method includes providing a substrate having a source region and a drain region. The method further includes forming a first recess in the substrate within the source region and a second recess in the substrate within the drain region. The first recess has a first plurality of surfaces and the second recess has a second plurality of surfaces. The method also includes epi-growing a semiconductor material in the first and second recesses and, thereafter, forming shallow isolation (STI) features in the substrate. | 03-21-2013 |
20130111419 | METHOD AND SYSTEM FOR MODIFYING DOPED REGION DESIGN LAYOUT DURING MASK PREPARATION TO TUNE DEVICE PERFORMANCE | 05-02-2013 |
20130193539 | Method for Increasing Photodiode Full Well Capacity - A backside illuminated CMOS image sensor comprises an extended photo active region formed over a substrate using a first high energy ion implantation process and an isolation region formed over the substrate using a second high energy ion implantation process. The extended photo active region is enclosed by the isolation region, which has a same depth as the extended photo active region. The extended photo active region helps to increase the number of photons converted into electrons so as to improve quantum efficiency. | 08-01-2013 |
20130207220 | Image Sensor Cross-Talk Reduction System and Method - A system and method for reducing cross-talk between photosensitive diodes is provided. In an embodiment an isolation region comprising a first concentration of dopants is located between the photosensitive diodes. The photosensitive diodes have a second concentration of dopants that is less than the first concentration of dopants, which helps to prevent diffusion from the photosensitive diodes to form a potential path for undesired cross-talk between the photosensitive diodes. | 08-15-2013 |
20130267069 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device is disclosed. The exemplary method includes providing a substrate having a source region and a drain region. The method further includes forming a first recess in the substrate within the source region and a second recess in the substrate within the drain region. The first recess has a first plurality of surfaces and the second recess has a second plurality of surfaces. The method also includes epi-growing a semiconductor material in the first and second recesses and, thereafter, forming shallow isolation (STI) features in the substrate. | 10-10-2013 |
20130277790 | Dual Profile Shallow Trench Isolation Apparatus and System - The presented principles describe an apparatus and method of making the same, the apparatus being a semiconductor circuit device, having shallow trench isolation features bounding an active area and a periphery area on a semiconductor substrate to electrically isolate structures in the active area from structures in the periphery area. The shallow trench isolation feature bounding the active area is shallower than the shallow trench isolation feature bounding the periphery area, with the periphery area shallow trench isolation structure being formed through two or more etching steps. | 10-24-2013 |
20130285194 | OPTICAL PROXIMITY CORRECTION FOR ACTIVE REGION DESIGN LAYOUT - The present disclosure provides an integrated circuit design method. In an example, a method includes receiving an integrated circuit design layout that includes an active region feature, a contact feature, and an isolation feature, wherein a portion of the active region feature is disposed between the contact feature and the isolation feature; determining whether a thickness of the portion of the active region feature disposed between the contact feature and the isolation feature is less than a threshold value; and modifying the integrated circuit design layout if the thickness is less than the threshold value, wherein the modifying includes adding a supplementary active region feature adjacent to the portion of the active region feature disposed between the contact feature and the isolation feature. | 10-31-2013 |
20130299987 | SEMICONDUCTOR STRUCTURE HAVING ETCH STOP LAYER - A semiconductor structure includes a substrate, a conductive feature over the substrate, a conductive plug structure contacting a portion of an upper surface of the conductive feature, a first etch stop layer over another portion of the upper surface of the conductive feature, and a second etch stop layer over the first etch stop layer. The first etch stop layer is a doped etch stop layer. The first etch stop layer is to function as an etch stop layer during a predetermined etching process for etching the second etch stop layer. | 11-14-2013 |
20140145283 | Photodiode with Concave Reflector - A photodiode structure includes a photodiode and a concave reflector disposed below the photodiode. The concave reflector is arranged to reflect incident light from above back toward the photodiode. | 05-29-2014 |
20140167199 | SYSTEM AND METHOD FOR DIE TO DIE STRESS IMPROVEMENT - A semiconductor wafer having a plurality of chip die areas arranged on a wafer in an array, each chip die area including a seal ring area with one or more first sets of polygonal structures. The wafer further comprises scribe line areas between the chip die areas, the scribe line areas including one or more second sets of polygonal structures. The presence of proximate polygonal structures between the scribe line and seal ring areas balance stresses between the chip die areas during wafer dicing operation. | 06-19-2014 |
20140210029 | Backside Illumination Image Sensor Chips and Methods for Forming the Same - A die includes a first plurality of edges, and a semiconductor substrate in the die. The semiconductor substrate includes a first portion including a second plurality of edges misaligned with respective ones of the first plurality of edges. The semiconductor substrate further includes a second portion extending from one of the second plurality of edges to one of the first plurality of edges of the die. The second portion includes a first end connected to the one of the second plurality of edges, and a second end having an edge aligned to the one of the first plurality of edges of the die. | 07-31-2014 |
20140367820 | Methods of Manufacturing and Using a Photodiode with Concave Reflector - A photodiode structure includes a photodiode and a concave reflector disposed below the photodiode. The concave reflector is arranged to reflect incident light from above back toward the photodiode. | 12-18-2014 |
20150041857 | SEMICONDUCTOR STRUCTURE HAVING STRESSOR - A semiconductor structure includes a substrate, a shallow trench isolation (STI) structure embedded in the substrate, a stressor embedded in the substrate, and a conductive plug over and electrically coupled with the stressor. A same-material region is sandwiched by the STI structure and an entire sidewall of the stressor, and the same-material region is a continuous portion of the substrate. | 02-12-2015 |
20150044810 | Backside Illumination Image Sensor Chips and Methods for Forming the Same - A die includes a first plurality of edges, and a semiconductor substrate in the die. The semiconductor substrate includes a first portion including a second plurality of edges misaligned with respective ones of the first plurality of edges. The semiconductor substrate further includes a second portion extending from one of the second plurality of edges to one of the first plurality of edges of the die. The second portion includes a first end connected to the one of the second plurality of edges, and a second end having an edge aligned to the one of the first plurality of edges of the die. | 02-12-2015 |
Chih-Ping Chao, Juhudong Town TW
Patent application number | Description | Published |
---|---|---|
20120086099 | SCHOTTKY DIODE - An integrated circuit device and method for fabricating the integrated circuit device is disclosed. The integrated circuit device includes a substrate, a diffusion source, and a lightly doped diffusion region in contact with a conductive layer. A junction of the lightly doped diffusion region with the conductive layer forms a Schottky region. An annealing process is performed to form the lightly doped diffusion region. The annealing process causes dopants from the diffusion source (for example, an n-well disposed in the substrate) of the integrated circuit device to diffuse into a region of the substrate, thereby forming the lightly doped diffusion region. | 04-12-2012 |
Ching-Hung Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20120173768 | Switching Device and Method For Input Unit - A input device and switching method thereof is provided. After a first input unit produces the input signals, a control unit turns off the a switch interface to disconnect signal path between a second input unit and the computer system. When a counting time is greater than a predefined time, the control unit activates the switch interface to reconnect signal path between the second input unit and the computer system. Thus, it can prevent unintentional input from touching a plurality of input units by the users. | 07-05-2012 |
Ching-Yan Chao, Hsinchu County TW
Patent application number | Description | Published |
---|---|---|
20120126263 | ORGANIC ELECTROLUMINESCENCE DEVICE AND METHOD OF MANUFACTURING THE SAME - An organic electroluminescence device and a method of manufacturing the same are provided. The organic electroluminescence device is suitable for being configured on a substrate. The organic electroluminescence device includes a first electrode, a first doped carrier transporting layer, a light-emitting layer, a second doped carrier transporting layer, and a second electrode. The first electrode is configured on the substrate. The first doped carrier transporting layer is configured on the first electrode. The light-emitting layer is configured on the first doped carrier transporting layer. The second doped carrier transporting layer is configured on the light-emitting layer and has a first surface in contact with the light-emitting layer and a second surface opposite to the first surface. The first surface is substantially a planar surface, and the second surface is a rough surface having a plurality of micro-protrusions. The second electrode is configured on the second surface. | 05-24-2012 |
Chun-Chi Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20120302198 | SYSTEM AND METHOD FOR TRACKING A MOBILE TELECOMMUNICATION APPARATUS - A system and a method for tracking a mobile telecommunication apparatus are provided. The system includes a first mobile telecommunication apparatus and a second mobile telecommunication apparatus. The first mobile telecommunication apparatus has a Global Positioning System (GPS) module to provide position information of the first mobile telecommunication apparatus. The second mobile telecommunication apparatus transmits a query instruction to the first mobile telecommunication apparatus by the Short Message Service (SMS). The first mobile telecommunication apparatus transmits the position information back to the second mobile telecommunication apparatus by the SMS in accordance with the query instruction. | 11-29-2012 |
Chun Chieh Chao, Tantzu TW
Patent application number | Description | Published |
---|---|---|
20120299177 | SEMICONDUCTOR COMPONENT AND METHOD OF FABRICATING THE SAME - A semiconductor component structure is provided, which includes a body formed with openings, an insulating layer formed on surfaces of the body and the openings, conductive bumps formed in the openings, and a re-distributed circuit formed by conductive traces electrically connecting the conductive bumps, wherein the conductive traces are formed on a portion of the insulating layer on the body. As the conductive traces and the conductive bumps are formed on and in the body prior to the formation of the re-distributed circuit. The process for fabricating the semiconductor component structure is simplified and the reliability of the semiconductor component structure is enhanced. A method for fabricating the semiconductor component is also provided. | 11-29-2012 |
Chun-Chieh Chao, Taichung TW
Patent application number | Description | Published |
---|---|---|
20120168936 | MULTI-CHIP STACK PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF - A multi-chip stack package structure includes: an inner-layer heat sink having a first surface and a second surface opposing one another and having a plurality of conductive vias penetrating the first surface and the second surface; a first chip disposed on the first surface of the inner-layer heat sink; and a second chip disposed on the second surface of the inner-layer heat sink. Thereby, a heat-dissipating path is provided within inner-layers of the multi-chip stack package structure, and the rigidity of the overall structure is enhanced. | 07-05-2012 |
20120224328 | INNER-LAYER HEAT-DISSIPATING BOARD, MULTI-CHIP STACK PACKAGE STRUCTURE HAVING THE INNER LAYER HEAT-DISSIPATING BOARD AND FABRICATION METHOD THEREOF - An inner-layer heat-dissipating board and a multi-chip stack package structure having the inner-layer heat-dissipating board are disclosed. The inner-layer heat-dissipating board includes a metal board body formed with a plurality of penetrating conductive through holes each comprising a plurality of nano wires and an oxidative block having nano apertures filled with the nano wires. The multi-chip stack package structure includes a first chip and an electronic component respectively disposed on the inner-layer heat-dissipating board to thereby facilitate heat dissipation in the multi-chip stack structure as well as increase the overall package rigidity. | 09-06-2012 |
20130326873 | METHOD OF FABRICATING MULTI-CHIP STACK PACKAGE STRUCTURE HAVING INNER LAYER HEAT-DISSIPATING BOARD - An inner-layer heat-dissipating board and a multi-chip stack package structure having the inner-layer heat-dissipating board are disclosed. The inner-layer heat-dissipating board includes a metal board body formed with a plurality of penetrating conductive through holes each comprising a plurality of nano wires and an oxidative block having nano apertures filled with the nano wires. The multi-chip stack package structure includes a first chip and an electronic component respectively disposed on the inner-layer heat-dissipating board to thereby facilitate heat dissipation in the multi-chip stack structure as well as increase the overall package rigidity. | 12-12-2013 |
Chung-Hsiang Chao, Pingtung County TW
Patent application number | Description | Published |
---|---|---|
20130164602 | ENERGY STORAGE DEVICE - An energy storage device including an active electrolyte, a first electrode and a second electrode is provided. The active electrolyte contains protons and ion pairs with a redox ability. The first electrode and the second electrode coexist in the active electrolyte and are separated from each other. The first electrode and the second electrode respectively include an active material producing a redox-reaction with the active electrolyte or an active material producing ion adsorption/desorption with the active electrolyte. The active electrolyte receives electrons from the first electrode and/or the second electrode so as to perform a redox-reaction for charge storage. | 06-27-2013 |
Darald Chao, Darlington GB
Patent application number | Description | Published |
---|---|---|
20090260605 | STAGED ARRANGEMENT OF EGR COOLERS TO OPTIMIZE PERFORMANCE - A compression ignition engine comprising at least one combustion chamber, an air intake system, a fuel system, an exhaust system and an exhaust gas recirculation system. The air intake system conveys air to the chamber. The exhaust system conveys exhaust gases from the combustion chamber. The exhaust gas recirculation system is capable of recirculating a portion of the exhaust gases into air intake system. The exhaust gas recirculation system comprises a cooler package and a valve. The valve controls the amount of air flow through the cooler package. The cooler package includes a first portion, a second portion and a control valve. The control valve of the cooler package is configured to control whether the air that flows through the cooler package flows only through one of the first or the second portion or through both of the first portion and the second portion in parallel. | 10-22-2009 |
Donald Y. Chao, Zhubei City TW
Patent application number | Description | Published |
---|---|---|
20130193446 | FINFET AND METHOD OF FABRICATING THE SAME - The disclosure relates to a fin field effect transistor (FinFET). An exemplary structure for a FinFET comprises a substrate comprising a major surface; a first fin and a second fin extending upward from the substrate major surface to a first height; an insulation layer comprising a top surface extending upward from the substrate major surface to a second height less than the first height, whereby portions of the fins extend beyond the top surface of the insulation layer; each fin covered by a bulbous epitaxial layer defining an hourglass shaped cavity between adjacent fins, the cavity comprising upper and lower portions, wherein the epitaxial layer bordering the lower portion of the cavity is converted to silicide. | 08-01-2013 |
20140134831 | FINFET AND METHOD OF FABRICATING THE SAME - A method of fabricating a fin field effect transistor (FinFET) comprises providing a substrate comprising a major surface, forming a first and second fin extending upward from the substrate major surface to a first height, forming an insulation layer comprising a top surface extending upward from the substrate major surface to a second height less than the first height, wherein a portion of the first and second fin extend beyond the top surface of the insulation layer. The method also includes selectively growing an epitaxial layer covering each fin, annealing the substrate to have each fin covered by a bulbous epitaxial layer defining an hourglass shaped cavity between adjacent fins, wherein the cavity comprises an upper and lower portion. The method includes forming a metal material over the bulbous epitaxial layer and annealing the substrate to convert the bulbous epitaxial layer bordering the lower portion of the cavity to silicide. | 05-15-2014 |
Fang-Hui Chao, Taichung City TW
Patent application number | Description | Published |
---|---|---|
20120088142 | CONNECTING ASSEMBLY FOR BATTERIES AND BATTERY ASSEMBLY - A connecting assembly of the present invention is used for connecting a first battery to a second battery. The connecting assembly includes a base plate, two side plates and two fixation plates. The base plate is provided for being placed on a top surface of the first battery. The side plates extend from the base plate and extend away from the first battery. The fixation plates extend lateral from the side plates. A predetermined distance is defined between the fixation plates and the base plate. The fixation plates are provided for the second battery to be connected therewith. As such, the second battery can be firmly assembled on the first battery by the connecting assembly. Batteries can be gathered up so as to be easily assembled. | 04-12-2012 |
20120264000 | HYBRID BATTERY MODULE - A hybrid battery module of the present invention includes a lithium iron battery pack and a lithium manganese battery pack. The lithium iron battery pack includes at least one lithium iron battery which is electrically connected in series, and the lithium iron battery has an anode and a cathode. The lithium manganese battery pack includes at least one lithium manganese battery which is electrically connected in series, and the lithium manganese battery has an anode and a cathode. The lithium iron battery pack and the lithium manganese battery pack are electrically connected in parallel to each other. Thereby, the hybrid battery module has high discharge efficiency, high electric capacity, a small volume and a light weight. Furthermore, the production cost of the present invention is lower than a complete lithium iron battery pack, and the hybrid battery module is much safer to be used than a complete lithium manganese battery pack. | 10-18-2012 |
Fang-Mei Chao, Dadu Township TW
Patent application number | Description | Published |
---|---|---|
20120091536 | CMOS STRUCTURE AND LATCH-UP PREVENTING METHOD OF SAME - A CMOS structure includes a PMOS portion and an NMOS portion isolated from each other via a P-well region disposed next to the PMOS portion and an N-well region disposed between the P-well region and the NMOS portion, an insulation layer overlying at least the N-well region, and a pad structure disposed over the N-well region. The pad structure further includes: a pad body disposed on the insulation layer; and at least one contact plug penetrating through the insulation layer, having one end coupled to the pad body and the other end coupled to a contact zone in the N-well region; wherein the contact zone is interfaced with the N-well region with P-type dopants. | 04-19-2012 |
Fang-Mei Chao, Taichung City TW
Patent application number | Description | Published |
---|---|---|
20130126974 | ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT - An electrostatic discharge protection circuit is used in an integrated circuit with a first sub-circuit working with a first working voltage source and a second sub-circuit working with a second working voltage source lower than the first working voltage source. The electrostatic discharge protection circuit includes a first metal-oxide-semiconductor transistor of a first conductive type, having a drain thereof electrically connected to a pad of the integrated circuit, and gate, source and bulk thereof electrically connected to a bulk voltage; and a guard ring of the first conductive type, surrounding the first metal-oxide-semiconductor transistor of the first conductive type and coupled to the second working voltage source. | 05-23-2013 |
George Yee-Ho Chao, Burnaby CA
Patent application number | Description | Published |
---|---|---|
20110244301 | BATTERY SAFETY INTERLOCK FOR INTRINSICALLY SAFE ELECTRONIC DEVICES - A printed circuit board assembly for a battery powered electronic device provides intrinsic safety features with a battery safety interlock element serving as both a physical and electrical barrier to prevent potential sparking at the battery and connecting terminal interfaces. | 10-06-2011 |
20110261549 | MOUNTING ADAPTER FOR MOUNTING ELECTRONIC DEVICE ON SUPPORT RAIL - A mounting adapter for mounting a device on a support rail includes a central body, at least one rail attaching member, and at least one detent. The rail attaching member projects rearward from the body and is configured for releasable attachment to at least one of the upper and lower flanges of the support rail. The detent projects forward from the body. The detent is resiliently deflectable relative to the body and configured for releasable attachment to the electronic device. | 10-27-2011 |
Guang Shiung Chao, Kaohsiung City TW
Patent application number | Description | Published |
---|---|---|
20120235174 | LIQUID CRYSTAL PANEL AND PIXEL STRUCTURE THEREOF - There is provided a pixel structure of a liquid crystal panel including a transparent substrate, and a gate line, a data line, a switching transistor, a first electrode, a second electrode and a shield layer formed on the transparent substrate. The gate line is substantially perpendicular to the data line. The switching transistor is located adjacent to a crossing point of the gate line and the data line, and is configured to input a display voltage of the data line to the second electrode according to the control of the gate line. The first electrode and the second electrode are arranged in such a way that the display voltage forms a transverse electric field between the first electrode and the second electrode. The shield layer overlaps at least a part of the gate and is electrically isolated from the first electrode and the second electrode. | 09-20-2012 |
20140111470 | THREE-DIMENSIONAL TOUCH DISPLAY PANEL AND METHOD FOR OPERATING THE SAME - The present invention provides a three-dimensional touch display panel including a display panel and an integrated panel. The integrated panel is disposed on the display panel, and the integrated panel includes a first transparent substrate, a first patterned transparent conductive layer disposed on the first transparent substrate, a second transparent substrate disposed opposite to the first transparent substrate, a second patterned transparent conductive layer disposed between the first transparent substrate and the second transparent substrate, a first plate-shaped transparent conductive layer disposed on the second transparent substrate, and a liquid crystal layer disposed between the first patterned transparent conductive layer and the first transparent conductive layer. The first patterned transparent conductive layer includes a plurality of first electrode stripes sequentially arranged along a first direction. The second patterned transparent conductive layer includes a plurality of second electrode stripes sequentially arranged along a second direction different from the first direction. | 04-24-2014 |
Guang-Shiung Chao, Renwu Township TW
Patent application number | Description | Published |
---|---|---|
20120081639 | LIQUID CRYSTAL DISPLAY DEVICE - A liquid crystal display device includes a first polarization plate, a first birefringent film atop the first polarization plate, an optically compensated bend mode (OCB-mode) cell atop the first birefringent film, a refractive film atop the OCB-mode cell, a second birefringent film atop the refractive film, and a second polarization plate atop the second birefringent film. With this structure, any phase retardation of polarized light occurred during the propagation of the polarized light from the first polarization plate to the second polarization plate is compensated by the first birefringent film, the refractive film, and the second birefringent film and a substantially cross-shaped radiation pattern of full viewing angle is obtained in an actual measurement at the light outgoing surface of the liquid crystal display device, proving the liquid crystal display device has effectively improved the problem of restricted viewing angle and provides good optical performance. | 04-05-2012 |
Hao Chieh Chao, Maastricht NL
Patent application number | Description | Published |
---|---|---|
20120171085 | DEVICE AND METHOD FOR TRANSPORTING MAGNETIC OR MAGNETISABLE BEADS - The present invention relates to a device ( | 07-05-2012 |
Hong-Wen Chao, New Taipei TW
Patent application number | Description | Published |
---|---|---|
20120086481 | POWER SUPPLY SYSTEM - A power supply system, for discharging a resume and reset (RSMRST) signal during the RSMRST signal pull down, includes a voltage regulating circuit, a delay circuit, a switch circuit, and a discharge circuit. The voltage regulating circuit receives a first voltage signal and converts the first voltage signal to a second voltage signal. The delay circuit is charged by the second voltage signal and outputs the second voltage signal once fully charged. The switch circuit receives the second voltage signal and then outputs a RSMRST signal. The discharge circuit discharges the delay circuit. The delay circuit is charged during a first state and discharged during a second state. | 04-12-2012 |
Hsiao-Shu Chao, Baoshan TW
Patent application number | Description | Published |
---|---|---|
20120210279 | DECOMPOSITION AND MARKING OF SEMICONDUCTOR DEVICE DESIGN LAYOUT IN DOUBLE PATTERNING LITHOGRAPHY - Provided is a system and method for assessing a design layout for a semiconductor device level and for determining and designating different features of the design layout to be formed by different photomasks by decomposing the design layout. The features are designated by markings that associate the various device features with the multiple photomasks upon which they will be formed and then produced on a semiconductor device level using double patterning lithography, DPL, techniques. The markings are done at the device level and are included on the electronic file provided by the design house to the photomask foundry. In addition to overlay and critical dimension considerations for the design layout being decomposed, various other device criteria, design criteria processing criteria and their interrelation are taken into account, as well as device environment and the other device layers, when determining and marking the various device features. | 08-16-2012 |
20120254811 | SYSTEMS AND METHODS FOR CREATING FREQUENCY-DEPENDENT RC EXTRACTION NETLIST - A method includes approximating a physical characteristic of a semiconductor substrate with a frequency-dependent circuit, and creating a technology file for the semiconductor substrate based on the frequency-dependent circuit. The physical characteristic of the semiconductor substrate identified by one of an electromagnetic simulation or a silicon measurement. The technology file is adapted for use by an electronic design automation tool to create a netlist for the semiconductor substrate and is stored in a non-transient computer readable storage medium. | 10-04-2012 |
20120288786 | RC EXTRACTION FOR SINGLE PATTERNING SPACER TECHNIQUE - A method includes performing a place and route operation using an electronic design automation tool to generate a preliminary layout for a photomask to be used to form a circuit pattern of a semiconductor device. The place and route operation is constrained by a plurality of single patterning spacer technique (SPST) routing rules. Dummy conductive fill patterns are emulated within the EDA tool using an RC extraction tool to predict locations and sizes of dummy conductive fill patterns to be added to the preliminary layout of the photomask. An RC timing analysis of the circuit pattern is performed within the EDA tool, based on the preliminary layout and the emulated dummy conductive fill patterns. | 11-15-2012 |
Ke Chao, Saitama JP
Patent application number | Description | Published |
---|---|---|
20110234485 | POSITION DETECTING DEVICE AND POSITION INPUT DEVICE - A position detecting device is provided, which is configured to minimize leakage of magnetic flux in an electromagnetic induction system. The position detecting device includes: a sensor unit including a plurality of first loop coils arranged in a first direction and a plurality of second loop coils arranged in a second direction intersecting with the first direction; a yoke sheet provided on a side of the sensor unit that is opposite to a side that faces a position indicator; an auxiliary loop coil provided at a corner part of the sensor unit; a signal transmitter configured to transmit a signal to one of the coils in order to generate a magnetic field to induce an induced current in a coil of the position indicator; and a controller configured to select one of the coils, and to control whether to transmit a signal from the signal transmitter to the selected one of the coils or to make the selected one of the coils receive a signal from the position indicator. | 09-29-2011 |
Kou-Liang Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20120261751 | RECTIFIER WITH VERTICAL MOS STRUCTURE - A method for manufacturing a rectifier with a vertical MOS structure is provided. A first trench structure and a first mask layer are formed at a first side of the semiconductor substrate. A second trench structure is formed in the second side of the semiconductor substrate. A gate oxide layer, a polysilicon structure and a metal sputtering layer are sequentially formed on the second trench structure. The rectifier further includes a wet oxide layer and a plurality of doped regions. The wet oxide layer is formed on a surface of the first multi-trench structure and in the semiconductor substrate. The doping regions are formed on a region between the semiconductor substrate and the second trench structure, and located beside the mask layer. The metal sputtering layer is formed on the first mask layer corresponding to the first trench structure. | 10-18-2012 |
20130122695 | TRENCH SCHOTTKY DIODE AND METHOD FOR MANUFACTURING THE SAME - A trench Schottky diode and its manufacturing method are provided. The trench Schottky diode includes a semiconductor substrate having therein a plurality of trenches, a gate oxide layer, a polysilicon structure, a guard ring and an electrode. At first, the trenches are formed in the semiconductor substrate by an etching step. Then, the gate oxide layer and the polysilicon structure are formed in the trenches and protrude above a surface of the semiconductor substrate. The guard ring is formed to cover a portion of the resultant structure. At last, the electrode is formed above the guard ring and the other portion not covered by the guard ring. The protruding gate oxide layer and the protruding polysilicon structure can avoid cracks occurring in the trench structure. | 05-16-2013 |
20130168779 | MOS P-N JUNCTION DIODE WITH ENHANCED RESPONSE SPEED AND MANUFACTURING METHOD THEREOF - A MOS P-N junction diode includes a semiconductor substrate, a mask layer, a guard ring, a gate oxide layer, a polysilicon structure, a central conductive layer, a silicon nitride layer, a metal diffusion layer, a channel region, and a metal sputtering layer. For manufacturing the MOS P-N junction diode, a mask layer is formed on a semiconductor substrate. A gate oxide layer is formed on the semiconductor substrate, and a polysilicon structure is formed on the gate oxide layer. A guard ring, a central conductive layer and a channel region are formed in the semiconductor substrate. A silicon nitride layer is formed on the central conductive layer. A metal diffusion layer is formed within the guard ring and the central conductive layer. Afterwards, a metal sputtering layer is formed, and the mask layer is partially exposed. | 07-04-2013 |
20150054115 | TRENCH SCHOTTKY RECTIFIER DEVICE AND METHOD FOR MANUFACTURING THE SAME - A trench Schottky rectifier device includes a substrate having a first conductivity type, a plurality of trenches formed in the substrate, and an insulating layer formed on sidewalls of the trenches. The trenches are filled with conductive structure. There is an electrode overlying the conductive structure and the substrate, and thus a Schottky contact forms between the electrode and the substrate. A plurality of embedded doped regions having a second conductivity type are formed in the substrate and located under the trenches. Each doped region and the substrate form a PN junction to pinch off current flowing toward the Schottky contact so as to suppress current leakage. | 02-26-2015 |
Kuang Cheng Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20120301122 | DYE SUBLIMATION HEATING MODULE AND SYSTEM THEREOF - A heating module for dye sublimation printing on an article comprises a first heating plate, an infrared heating source, and a metal shield. The infrared heating source is disposed under the first heating plate and emits a radiation. The metal shield can prevent the radiation, emitted by the infrared heating source, from projecting directly on the article. The first heating plate preheats a retransfer sheet to be softened and then molded on the article. Consequently, the infrared heating source heats the retransfer sheet for sublimation dye transfer on the article. | 11-29-2012 |
20130029608 | Methods of calibrating a device under test to communicate wirelessly - A method of calibrating a device under test (DUT) to communicate wirelessly includes providing predetermined reference signal strength values corresponding to a reference device, the reference signal strength values including a first group of signal strength values measured at each of a first plurality of transmission power levels. The method further includes measuring signal strength values for the DUT including a second group of signal strength values measured at each of a second plurality of transmission power levels, mapping the measured signal strength values in the second group of signal strength values to corresponding reference signal strength values in the first group of signal strength values to create a plurality of mapped data pairs, and generating a lookup table according to the mapped data pairs and storing the generated lookup table in a memory of the DUT. The method also includes calibrating the DUT according to the lookup table. | 01-31-2013 |
20130039181 | Methods of optimizing scanning parameters for a plurality of channels in a wireless band - A method of optimizing scanning parameters for a plurality of channels in a wireless band includes identifying channels in the plurality of channels as overlapping channels and identifying channels in the plurality of channels as non-overlapping channels, wherein each of the non-overlapping channels transmits and receives signals at frequencies that do not overlap frequencies of other non-overlapping channels. Then scanning parameters for each channel are optimized in order to assign the scanning parameters to be normal scanning parameters or extended scanning parameters, the extended scanning parameters indicating longer scanning times used for scanning channels than that of the normal scanning parameters. Next each overlapping channel is scanned with a networked electronic device using the normal scanning parameters. The method also includes scanning each non-overlapping channel with the networked electronic device using the extended scanning parameters. | 02-14-2013 |
20130071631 | Method For Forming A Metal-Plastic Composite And The Metal-Plastic Composite Made Thereby - Disclosed is a method for forming a metal-plastic composite which includes the steps of: a) activating a first surface of a metal substrate; b) applying an adhesive material on the first surface that has been activated to form an adhesive layer on the first surface; and c) placing the metal substrate together with the adhesive layer in a mold and injection molding a plastic material over the adhesive layer. A metal-plastic composite made by the method is also disclosed. | 03-21-2013 |
20130071635 | Method For Forming A Glass-Plastic Composite And The Glass-Plastic Composite Made Thereby - Disclosed is a method for forming a glass-plastic composite which includes the steps of: a) activating a first surface of a glass substrate, b) applying an adhesive material on the first surface that has been activated to form an adhesive layer on the first surface, and c) placing the glass substrate together with the adhesive layer in a mold and injection molding a plastic material over the adhesive layer. A glass-plastic composite made according to the method is also disclosed. | 03-21-2013 |
20130141514 | METHOD FOR SWITCHING VIDEO CALLS BETWEEN DEVICES - A method for switching a call with video or at least one image between a first communication device and a display device is disclosed. The method includes the first communication device determining whether the display device is within a predetermined distance from the first communication device; if the display device is within the predetermined distance from the first communication device, the first communication device obtaining functional information from the display device; the first communication device transmitting communication information corresponding to a second communication device to the display device; and the display device launching network communication software and making a first call to the second communication device according to the communication information. | 06-06-2013 |
20130174193 | DISPLAY SYSTEM, TELEVISION APPARATUS AND OPERATING METHOD FOR APPLICATION IMPLEMENTING THEREOF - An operating method of application for the television apparatus is provided. Wherein, the operating method includes: receiving a channel selecting instruction; reading a channel list, the channel list includes a plurality of applications (APPs) and a plurality of physical channels corresponding to a plurality of channel numbers, wherein each of the APPs is assigned to one of the channel numbers respectively; mapping the channel selection instruction to one of the plurality of channel numbers in the channel list; and launching and executing a selected APP if the channel selection instruction is corresponding to the channel number of the selected APP. | 07-04-2013 |
20130176214 | TOUCH CONTROL METHOD - A touch control method is disclosed. The steps of the touch control method include: detecting a first and a second finger print areas generated according to a touching action by a user on the touch panel; calculating a first angle between the first finger print area and a first reference axis and a second angle between the second finger print area and a second reference axis respectively; judging whether each of the first and the second finger print areas corresponding to the touching action is performed by a first hand or a second hand of the user according to the first and the second angles; and controlling a movement of a cursor under an absolute coordinate according to the touching action of the user's first hand, and controlling a movement of the cursor under a relative coordinate according to the touching action of the user's second hand. | 07-11-2013 |
20130182015 | METHOD FOR ADAPTIVELY ADJUSTING SIZES OF VIRTUAL KEYS AND DISPLAY DEVICE USING THE SAME - A method for adaptively adjusting sizes of virtual keys and a display device using the same are provided. The display device displays a virtual keyboard, and the virtual keyboard is arranged with a plurality of virtual keys that can be chosen remotely by a plurality of direction keys of a remote controller. The method includes following: receiving cursor movement information and confirmation information transmitted by the remote controller; converting the cursor movement information and confirmation information into characters of virtual keys of a first key size configuration model of the virtual keyboard, and converting the characters into words; performing an operation on the words respectively by using a preset algorithm to generate a second key size configuration model of the virtual keyboard; and adjusting horizontal sizes of at least a part of the virtual keys of the virtual keyboard according to the second key size configuration model. | 07-18-2013 |
20130300660 | CURSOR CONTROL SYSTEM - A cursor control system is provided. A cursor position information is calculated according to a position information and an axial information of a hand held device. The display displays the cursor or executes a corresponding operating instruction according to the cursor position information. | 11-14-2013 |
20140096158 | METHOD OF CONTROLLING DISPLAY - A method of controlling a display includes displaying a first window on the display, setting the first window to receive commands, and displaying a second window on the display. When the second window is displayed, a portion of the first window is kept being displayed, and the first window is kept being set to receive commands. | 04-03-2014 |
20140132838 | CONTROL METHOD OF AN AUDIO/VIDEO SYSTEM - An audio/video system includes a display having a plurality of input sources and a first peripheral device connected to one of the input sources. The display provides a user interface for receiving a switching command for switching current input source of the display among the input sources from a user, and the display automatically generates a first standby command to the first peripheral device when the received switching command is not switching the current input source to the input source corresponding to the first peripheral device. | 05-15-2014 |
20140132839 | CONTROL METHOD OF AN AUDIO/VIDEO SYSTEM - An audio/video (A/V) display system comprising a display and a peripheral device connected to the display. The display is capable of displaying a user interface. The peripheral device transmits raw data of the peripheral device to the display. The display enables an option corresponding to the peripheral device in the user interface after receiving the raw data of the peripheral device. Both the display and the peripheral device are controlled by a control device. | 05-15-2014 |
20140169757 | METHOD FOR QUICKLY DETERMINING A COMPRESSION FORMAT OF AN AUDIO OR VIDEO FILE AND RELATED PLAYBACK DEVICE THEREOF - A method for quickly determining a compression format of an audio-video file by a playback device, where the playback device includes a receiver, a detector, a register, and a processor, is disclosed. The method includes receiving an audio-video file by the receiver; using the detector to detect whether a tag portion exists behind a header of the audio-video file; using the processor to skip the tag portion to set a starting point for loading the audio-video file when the detector detects the tag portion; using the processor to filter out audio-video compression formats not compatible with the tag portion; and using the processor to load a first part to the buffer from the starting point, and determine a compression format of the audio-video file according to the first part. | 06-19-2014 |
20140189744 | METHOD FOR GENERATING A FAVORITE CHANNEL LIST AND RELATED DEVICE THEREOF - A method for generating a favorite channel list, where a device for generating the favorite channel list includes a receiver and a processor, is disclosed. The method includes receiving a signal of a first channel of a television signal by the receiver; clearing channels stored in the favorite channel list by the processor before the receiver receives the television signal according to the television signal; and adding the first channel to the favorite channel list by the processor when the signal of the first channel is switched from a first program to an advertisement. | 07-03-2014 |
Kuang Chien Chao, Keelung City TW
Patent application number | Description | Published |
---|---|---|
20120301122 | DYE SUBLIMATION HEATING MODULE AND SYSTEM THEREOF - A heating module for dye sublimation printing on an article comprises a first heating plate, an infrared heating source, and a metal shield. The infrared heating source is disposed under the first heating plate and emits a radiation. The metal shield can prevent the radiation, emitted by the infrared heating source, from projecting directly on the article. The first heating plate preheats a retransfer sheet to be softened and then molded on the article. Consequently, the infrared heating source heats the retransfer sheet for sublimation dye transfer on the article. | 11-29-2012 |
Kuo-Chieh Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20130189076 | SERIES FAN ASSEMBLY STRUCTURE - A series fan assembly structure includes a first fan and a second fan mated with the first fan. The first fan includes a first frame body and at least one mating section diagonally positioned on two opposite corners of one side of the first frame body. The second fan includes a second frame body and at least one connection section diagonally positioned on two opposite corners of one side of the second frame body corresponding to the mating section. The connection section is connected with the mating section, whereby the series fan assembly structure is easy to rework and has better vibration absorption effect. | 07-25-2013 |
20140352126 | METHOD FOR COMBINING BEARING AND SLEEVE - A method for combining a sleeve and bearings, comprising the steps of: providing a base having a sleeve; disposing at least one bearing in the sleeve; and providing a laser beam to illuminate and melt a contact place between the perimeter of the bearing and the sleeve such that the bearing and the sleeve is combined firmly. Therefore, the effects of securing the bearings, reinforcing the structure thereof, and increasing the lifetimes of the bearings and the sleeve can be achieved. | 12-04-2014 |
20140355917 | CONNECTION STRUCTURE FOR A SHAFT AND A BEARING - A connection structure for a shaft and a bearing includes a shaft and at least one bearing. The bearing has a shaft hole for the shaft to insert therein, a first face and a second face opposite to the first face. An outer circumference of the shaft is welded with a circumference of the shaft hole in adjacency to the first face of the bearing to form at least one first welding section connected between contact sections of the outer circumference of the shaft and the circumference of the shaft hole in adjacency to the first face. Via the first welding section, the shaft is integrally connected with the bearing. Therefore, the shaft and the bearing are more securely fixed with each other and the manufacturing cost is lowered. | 12-04-2014 |
Kuo-Chuan Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20130021430 | METHOD APPLIED TO ENDPOINT OF VIDEO CONFERENCE SYSTEM AND ASSOCIATED ENDPOINT - Method applied to endpoint of video conference system and associated endpoint; in a receiving endpoint which receives video conference packets, while obtaining pictures from contents of video and data within the video conference packets, capturing the pictures as images on a user capture command or a result of automatic scene change detection. | 01-24-2013 |
Kuo-Liang Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20130130459 | MOS P-N JUNCTION DIODE DEVICE AND METHOD FOR MANUFACTURING THE SAME - A MOS P-N junction diode device includes a substrate having a first conductivity type, a field oxide structure defining a trench structure, a gate structure formed in the trench structure and a doped region having a second conductivity type adjacent to the gate structure in the substrate. The method for manufacturing such diode device includes several ion-implanting steps. After the gate structure is formed by isotropic etching using a patterned photo-resist layer as a mask, an ion-implanting step is performed using the patterned photo-resist layer as a mask to form a deeper doped sub-region. Then, another ion-implanting step is performed using the gate structure as a mask to form a shallower doped sub-region between the gate structure and the deeper doped sub-region. The formed MOS P-N junction diode device has low forward voltage drop, low reverse leakage current, fast reverse recovery time and high reverse voltage tolerance. | 05-23-2013 |
20130228891 | MULTI-TRENCH TERMINATION STRUCTURE FOR SEMICONDUCTOR DEVICE AND MANUFACTURING MEHTOD THEREOF - A multi-trench termination structure for semiconductor device is disclosed, where the semiconductor device includes a semiconductor substrate and an active structure region. The multi-trench termination structure includes multiple trenches defined on an exposed face of the semiconductor substrate, a first mask layer formed on a partial exposed surface of the semiconductor substrate and corresponding to a termination structure region of the semiconductor device, a gate insulation layer formed in the trenches, a conductive layer formed on the gate insulation layer and protruding out of the exposed surface of the semiconductor substrate, and a metal layer formed over the first mask layer and conductive layer on the termination structure region of the semiconductor device. | 09-05-2013 |
20130249043 | WIDE TRENCH TERMINATION STRUCTURE FOR SEMICONDUCTOR DEVICE - A wide trench termination structure for semiconductor device includes a wide trench structure defined on a semiconductor substrate and having a width larger than that of narrow trench structures on an active region of the semiconductor device, an oxide layer arranged on an inner face of the wide trench structure, at least one trench polysilicon layer arranged on the oxide layer and on inner sidewall of the wide trench structure, a metal layer arranged on the oxide layer not covered by the trench polysilicon layer and on the trench polysilicon layer, and a field oxide layer arranged on the semiconductor substrate and outside the wide trench structure. | 09-26-2013 |
20140004681 | TRENCH ISOLATION MOS P-N JUNCTION DIODE DEVICE AND METHOD FOR MANUFACTURING THE SAME | 01-02-2014 |
20140030882 | MANUFACTURING METHOD OF MULTI-TRENCH TERMINATION STRUCTURE FOR SEMICONDUCTOR DEVICE - A multi-trench termination structure for semiconductor device is disclosed, where the semiconductor device includes a semiconductor substrate and an active structure region. The multi-trench termination structure includes multiple trenches defined on an exposed face of the semiconductor substrate, a first mask layer formed on a partial exposed surface of the semiconductor substrate and corresponding to a termination structure region of the semiconductor device, a gate insulation layer formed in the trenches, a conductive layer formed on the gate insulation layer and protruding out of the exposed surface of the semiconductor substrate, and a metal layer formed over the first mask layer and conductive layer on the termination structure region of the semiconductor device. | 01-30-2014 |
20140131793 | RECTIFIER WITH VERTICAL MOS STRUCTURE - A method for manufacturing a rectifier with a vertical MOS structure is provided. A first trench structure and a first mask layer are formed at a first side of the semiconductor substrate. A second trench structure is formed in the second side of the semiconductor substrate. A gate oxide layer, a polysilicon structure and a metal sputtering layer are sequentially formed on the second trench structure. The rectifier further includes a wet oxide layer and a plurality of doped regions. The wet oxide layer is formed on a surface of the first multi-trench structure and in the semiconductor substrate. The doping regions are formed on a region between the semiconductor substrate and the second trench structure, and located beside the mask layer. The metal sputtering layer is formed on the first mask layer corresponding to the first trench structure. | 05-15-2014 |
20140167205 | SUPER JUNCTION FOR SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A super junction for semiconductor device includes a silicon substrate with a first conductive type epitaxial layer, a plurality of highly-doped second conductive type columns formed in the first conductive type epitaxial layer, and a plurality of lightly-doped (first conductive type or second conductive type) side walls formed on outer surfaces of the highly-doped second conductive type. The semiconductor device is super-junction MOSFET, super junction MOSFET, super junction Schottky rectifier, super junction IGBT, thyristor or super junction diode. | 06-19-2014 |
20140308799 | TRENCH ISOLATION MOS P-N JUNCTION DIODE DEVICE AND METHOD FOR MANUFACTURING THE SAME - A trench isolation metal-oxide-semiconductor (MOS) P-N junction diode device and a manufacturing method thereof are provided. The trench isolation MOS P-N junction diode device is a combination of an N-channel MOS structure and a lateral P-N junction diode, wherein a polysilicon-filled trench oxide layer is buried in the P-type structure to replace the majority of the P-type structure. As a consequence, the trench isolation MOS P-N junction diode device of the present invention has the benefits of the Schottky diode and the P-N junction diode. That is, the trench isolation MOS P-N junction diode device has rapid switching speed, low forward voltage drop, low reverse leakage current and short reverse recovery time. | 10-16-2014 |
Li-Jen Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20120302162 | Method of Performing a Data Transaction Between a Portable Storage Device and an Electronic Device - A method of performing a data transaction between a portable storage device and an electronic device includes determining positions of the portable storage device by a positioning module of the portable storage device, calculating distance between a current position and a position of a previous data transaction to determine whether a position-based criterion is met by a processing module, establishing a data connection between the portable storage device and the electronic device when the position-based criterion is met, and performing the data transaction between the portable storage device and the electronic device. | 11-29-2012 |
20130024702 | CONNECTING MODULE FOR COUPLING OUTPUT ENDS OF A HOST DEVICE TO AN EXTERNAL STORAGE DEVICE AND METHOD THEREOF - A connecting module includes a plurality of input ends and an output end. The output end of the connecting module is coupled to an external storage device. When at least two input ends of the connecting module are coupled to corresponding output ends of the host device, the connecting module outputs power supplied by the host device to the external storage device via the plurality of input ends. This way, the connecting module outputs power to the external device when at least two input ends of the connecting module are coupled to the host device, for ensuring the external storage device to receive sufficient power at the instant the external storage device receives power. | 01-24-2013 |
Ling Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20130095512 | DEVICE FOR SORTING, CLASSIFYING, AND ASSAYING PARTITION BEHAVIOR OF CELL MEMBRANE BIOMOLECULES AND METHODS BASED THEREON - A biomolecule partitioning device (BPD) is provided that can be used to separate and sort membrane species into raft-like membrane regions without using detergent or crosslinkers. The BPD can comprise one or more microfluidic channels coated with coexistent lipid phases (raft-like and fluid-like lipid compositions) as a contiguous supported lipid bilayer (SLB). The geometry of the phases can be patterned with spatial and temporal control within each channel. Methods for the separation and sorting are also provided. The method can comprise the steps of introducing cell membrane species into an SLB; patterning coexistent phases; applying an electric field or hydrodynamic flow to move the species; sorting migrating species into regions based on their partitioning preference; and collecting sorted species in a quantification area. The BPD can also be used to measure partitioning kinetics or to assay for activity changes of biomolecules as a function of local lipid environment. | 04-18-2013 |
Ling-Hsi Chao, Taoyuan TW
Patent application number | Description | Published |
---|---|---|
20120160648 | KEYSWITCH AND KEYBOARD - A keyswitch includes a cover, a frame, a keycap, two connecting parts, and a base. The cover has an opening. The frame is disposed under the cover. The base is disposed under the frame. The keycap is located in the opening. The keycap has two opposite edges. The two connecting parts are connected between the two opposite edges and the frame. The cover abuts against the two connecting parts to restrain the keycap from moving up. | 06-28-2012 |
20120160652 | KEYBOARD WITH PLATE-TYPE KEYCAP ASSEMBLY - A plate-type keycap assembly is used in a keyboard. A main body, a keycap, and a connecting part of the keycap assembly are integrated monolithically and form a plate structure with substantially equal thickness. When the main body of the keycap assembly is constrained by a cover and a pedestal part, the keycap in the keyboard is formed as a cantilever structure via the connecting part. The cantilever structure enables the keycap for moving up and down steadily, which no longer needs scissors-type structure in the keyboard. Accordingly, the keyboard may be simplified and miniaturized when utilizing such keycap assembly. | 06-28-2012 |
20120160653 | LUMINOUS KEYBOARD - A plurality of light-transmittable or transparent keycaps is disposed on a luminous keyboard. Between a bottom surface of each keycap and a circuit board, printed layers with various patterns corresponding to each keycap are disposed therebetween. The pattern of each printed layer is composed by a light-transmittable section and an opaque section. A light source module, which is composed by a light guide plate and a light emitting diode, can further be added to the luminous keyboard, under each keycap, so as to provide a self luminous light source for the keyboard. With the light-transmittable or transparent keycaps, the patterns or texts of the printed layers can be shown. | 06-28-2012 |
20120160656 | KEYBOARD WITH ECCENTRICAL TRIGGERING MECHANISM - In a cantilever keycap of a keyboard, an elastic piece, which is used for providing the click sense and a restoring force for the keycap, is disposed under an extension section, or the intersection of the extension section and a press section, and the elastic piece locates farther than the press section from the pivot of the keycap. The distance between a contact point, which presses the elastic piece, and the pivot is larger than that between the press section and the pivot. Hence, a shorter stroke of a user pressing the press section produces a longer stroke of the keycap that presses and deforms the elastic piece, which effectively adds up the click sense. | 06-28-2012 |
Ming-Chi Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20120280297 | DRAM WITH DOPANT STOP LAYER AND METHOD OF FABRICATING THE SAME - A DRAM with dopant stop layer includes a substrate, a trench-type transistor and a capacitor electrically connected to the trench-type transistor. The trench-type transistor includes a gate structure embedded in the substrate. A source doping region and a drain doping region are disposed in the substrate at two sides of the gate structure. A boron doping region is disposed under the source doping region. A dopant stop layer is disposed within the boron doping region or below the boron doping region. The dopant stop layer includes a dopant selected from the group consisting of C, Si, Ge, Sn, Cl, F and Br. | 11-08-2012 |
Ming-Hsien Chao, Taichung City TW
Patent application number | Description | Published |
---|---|---|
20130256120 | PRODUCTION METHOD FOR FORMING AN ANTIBACTERIAL FILM ON THE SURFACE OF AN OBJECT - A production method combining cathode arc and magnetron sputtering methods to form an antibacterial film on the surface of an object. Inside the vacuum chamber, both a cathode arc target source and a magnetron sputtering target source are configured. On the cathode arc target source, at least one of a zirconium, titanium, or chromium target is installed. On the magnetron sputtering target source, a silver target is installed. Argon and nitrogen are filled into the vacuum chamber to respectively ionize the silver target and one of the zirconium target, titanium target, or chromium target. Remote control is used to adjust the ionization proportion between one of the zirconium, titanium, or chromium target and the silver target to be 90-99%:1-9%. The surface of the object is formed with one of the zirconium nitride-silver mixed antibacterial film, titanium nitride-silver mixed antibacterial film, or chromium nitride-silver mixed antibacterial film. | 10-03-2013 |
Ming-Lai Chao, Kaohsiung City TW
Patent application number | Description | Published |
---|---|---|
20130309042 | THREADED FASTENER - A threaded fastener includes a top head portion, a shank, a thread and first and second flutes. The shank includes a threaded portion that extends axially along a central axis and a connecting portion that extends upwardly and axially along the central axis from the threaded portion to the top head portion. The thread extends upwardly and helically around an outer periphery of the threaded portion and along the central axis. The first flute is indentedly formed on the threaded portion and extends upwardly along the central axis. The second flute is indentedly formed on the threaded portion and above the first flute, and extends upwardly and axially along the central axis and opposite to the first flute. | 11-21-2013 |
Nien-Shang Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20130024715 | Thermal Protection Method for Computer System and Device Thereof - A thermal protection method for a computer system including at least a processor includes monitoring the temperature and loading of the processor via a system firmware in the computer system, obtaining the current performance state level and at least an operable performance state levels of the processor when the system firmware determines that the temperature and loading of the processor exceeds a predetermined value respectively, wherein the performance state level is associated to the frequency of the processor, and setting the processor to one of the operable performance state levels, wherein the frequency of the performance state level is lower than the frequency of the current performance state level, according to the current performance state level and the operable performance state levels. | 01-24-2013 |
Paul C.p. Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20120306374 | DRIVING CIRCUIT FOR DUAL ORGANIC LIGHT EMITTING DIODES, AND DUAL-PIXEL CIRCUIT INCORPORATING THE SAME - A dual-pixel circuit includes first and second OLEDs, and a driving circuit that includes first and second driving transistors, a capacitor, and a switching module operable between first and second modes based on a data voltage, first and second scan voltages, and first and second bias signals. When the switching module is operated in the first mode, the first OLED is forward-biased to emit light, and the second OLED is reverse-biased. When the switching module is operated in the second mode, the first OLED is reverse-biased, and the second OLED is forward-biased to emit light. | 12-06-2012 |
Paul C.-P. Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20120262224 | CHARGE PUMP DEVICE - A charge pump device is coupled to first and second input terminals receiving an AC signal and comprises an electric switch set and two voltage boost circuits. The electric switch set is coupled to the first and second input terminals and a ground terminal and switches the conduction status thereof according to the AC signal. The two voltage boost circuits are interconnected and coupled to the first and second input terminals and the electric switch set. The boost circuits receive the AC signal according to the conduction status, respectively boost voltage in positive and negative semi-periods of the AC signal, and alternatively output a voltage at least two times the peak voltage of the AC signal, to a load. The present invention not only boosts voltage by several folds within a cycle but also outputs voltage by dual phases to reduce ripple of output voltage. | 10-18-2012 |
Po-Heng Chao, Taoyuan Hsien TW
Patent application number | Description | Published |
---|---|---|
20130258616 | EXTERNAL STRUCTURE OF OUTDOOR ELECTRONIC APPARATUS - An external structure of an outdoor electronic apparatus for packaging a circuit board having a power line is provided. The external structure includes a housing having an opening and a waterproof gasket. The waterproof gasket includes a main body, a platform portion, a first protrusion, and a bushing portion. The main body covers the opening. The platform portion, located at the inner side of the main body, extends into the housing from the opening. The platform portion seals the opening and tightly fits with the housing. The first protrusion is located on the platform portion for abutting against the circuit board. The bushing portion, located at the outer side of the main body, has a channel. The channel passes through the main body and the platform portion and can be passed through by the power line. The bushing portion and the power line tightly fit to each other. | 10-03-2013 |
Samuel Chao, Concord CA
Patent application number | Description | Published |
---|---|---|
20090098564 | Biomarkers for diagnosing schizophrenia and bipolar disorder - The invention relates to the identification and selection of novel biomarkers and the identification and selection of novel biomarker combinations which are differentially expressed in blood and useful in diagnosing schizophrenia and/or bipolar disorder as well as monitoring therapeutic efficacy of treatment for schizophrenia or bipolar disorder. The measurement of expression levels of the products of the biomarkers and combinations of biomarkers of the invention can be used to diagnose schizophrenia and/or bipolar disorder. Measurement of the expression level of products of biomarkers of the invention using polynucleotides and proteins which specifically and/or selectively hybridize to the products of the biomarkers of the invention are also encompassed within the scope of the invention as are compositions and kits containing said polynucleotides and proteins. Further encompassed by the invention is the use of the polynucleotides and proteins to monitor the efficacy of therapeutic regimens. The invention also provides for the identification of methods of using the products of the biomarkers of the invention in the identification of novel therapeutic targets of schizophrenia and/or bipolar disorder and a method of screening the genes of said biomarkers for additional markers of disease. | 04-16-2009 |
20090208942 | Method and Apparatus for Correlating Levels of Biomarker Products with Disease - In one aspect the invention is a method of testing for one or more colorectal pathologies or one or more subtypes of colorectal pathology (in one embodiment colorectal cancer) in a test individual by providing data corresponding to a level of products of selected biomarkers and applying the data to a formula to provide an indication of whether the test individual has one or more colorectal pathologies or one or more subtypes of colorectal pathology. In some aspects the method is computer based and a computer applies the data to the formula. In other aspects a computer system is configured with instructions that cause the processor to provide a user with the indication of whether the test individual has colorectal pathology. Also encompassed are kits for measuring data corresponding to the products of selected biomarkers which in some embodiments include a computer readable medium. Also encompassed are kits and methods of monitoring therapeutic efficacy of treatments for one or more colorectal pathologies. | 08-20-2009 |
20100099086 | Method and apparatus for determining a probability of colorectal cancer in a subject - A method of determining a probability that a human test subject has colorectal cancer as opposed to not having colorectal cancer is disclosed. The method comprises, for each gene of a set of one or more genes selected from the group consisting of ANXA3, CLEC4D, IL2RB, LMNB1, PRRG4, TNFAIP6 and VNN1: determining a level of RNA encoded by the gene in blood of the test subject, thereby generating test data; providing positive control data representing levels of RNA encoded by the gene in blood of human control subjects having colorectal cancer, and providing negative control data representing levels of RNA encoded by the gene in blood of human control subjects not having colorectal cancer; and determining a probability that the test data corresponds to the positive control data and not to the negative control data, where the probability that the test data corresponds to the positive control data and not to the negative control data represents the probability that the test subject has colorectal cancer as opposed to not having colorectal cancer. | 04-22-2010 |
20100143916 | OSTEOARTHRITIS BIOMARKERS AND USES THEREOF - The invention relates to the identification and selection of novel biomarkers and the identification and selection of novel biomarker combinations which are differentially expressed in osteoarthritis and/or in a particular stage of osteoarthritis, as well as a means of selecting the novel biomarker combinations. The measurement of expression of the products of the biomarkers and combinations of biomarkers of the invention demonstrates particular advantage in one or more of the following: (a) diagnosing individuals as having arthritis, (b) differentiating between two stages of osteoarthritis (OA) and (c) diagnosing individuals as having a particular stage of osteoarthritis (OA). As would be understood, in order to measure the products of biomarkers of the invention, polynucleotides and proteins which specifically and/or selectively hybridize to the products of the biomarkers of the invention are also encompassed within the scope of the invention as are kits containing said polynucleotides and proteins for use in (a) diagnosing individuals as having arthritis, (b) differentiating between two stages of osteoarthritis (OA) and (c) diagnosing individuals as having a particular stage of osteoarthritis (OA). Further encompassed by the invention is the use of the polynucleotides and proteins which specifically and/or selectively hybridize to the product of the biomarkers of the invention to monitor disease progression in an individual and to monitor the efficacy of therapeutic regimens. The invention also provides for methods of using the products of the biomarkers of the invention in the identification of novel therapeutic targets for osteoarthritis. The invention also provides for methods of using the products of the biomarkers of the invention in the identification of compounds that bind and/or modulate the activity of the genes of the invention. The compounds identified via such methods are useful for the development of assays to study osteoarthritis and osteoarthritis progression. Further, the compounds identified via such methods are useful as lead compounds in the development of prophylactic and therapeutic compositions for the prevention, treatment, management and/or amelioration of osteoarthritis or a symptom thereof. | 06-10-2010 |
20110020808 | BIOMARKERS FOR DIAGNOSING SCHIZOPHRENIA AND BIPOLAR DISORDER - The invention relates to the identification and selection of novel biomarkers and the identification and selection of novel biomarker combinations which are differentially expressed in blood and useful in diagnosing schizophrenia and/or bipolar disorder as well as monitoring therapeutic efficacy of treatment for schizophrenia or bipolar disorder. The measurement of expression levels of the products of the biomarkers and combinations of biomarkers of the invention can be used to diagnose schizophrenia and/or bipolar disorder. Measurement of the expression level of products of biomarkers of the invention using polynucleotides and proteins which specifically and/or selectively hybridize to the products of the biomarkers of the invention are also encompassed within the scope of the invention as are compositions and kits containing said polynucleotides and proteins. Further encompassed by the invention is the use of the polynucleotides and proteins to monitor the efficacy of therapeutic regimens. The invention also provides for the identification of methods of using the products of the biomarkers of the invention in the identification of novel therapeutic targets of schizophrenia and/or bipolar disorder and a method of screening the genes of said biomarkers for additional markers of disease. | 01-27-2011 |
20110020809 | MILD OSTEOARTHRITIS BIOMARKERS AND USES THEREOF - The invention relates to the identification and selection of novel biomarkers and the identification and selection of novel biomarker combinations which are differentially expressed in individuals with mild osteoarthritis as compared with individuals without osteoarthritis. Polynucleotides and proteins which specifically and/or selectively hybridize to the products of the biomarkers of the invention are also encompassed within the scope of the invention as are kits containing said polynucleotides and proteins for use in diagnosing mild osteoarthritis. Further encompassed by the invention is the use of the polynucleotides and proteins which specifically and/or selectively hybridize to the product of the biomarkers of the invention to monitor disease regression in an individual and to monitor the efficacy of therapeutic regimens. The invention also provides for methods of using the products of the biomarkers of the invention in the identification of novel therapeutic targets for osteoarthritis. | 01-27-2011 |
20130013214 | METHOD AND APPARATUS FOR CORRELATING LEVELS OF BIOMARKER PRODUCTS WITH DISEASE - In one aspect the invention is a method of testing for one or more colorectal pathologies or one or more subtypes of colorectal pathology (in one embodiment colorectal cancer) in a test individual by providing data corresponding to a level of products of selected biomarkers and applying the data to a formula to provide an indication of whether the test individual has one or more colorectal pathologies or one or more subtypes of colorectal pathology. In some aspects the method is computer based and a computer applies the data to the formula. Also encompassed are kits for measuring data corresponding to the products of selected biomarkers which in some embodiments include a computer readable medium. Also encompassed are kits and methods of monitoring therapeutic efficacy of treatments for one or more colorectal pathologies. | 01-10-2013 |
20130017965 | OSTEOARTHRITIS BIOMARKERS AND USES THEREOF - The invention relates to the identification and selection of novel biomarkers and the identification and selection of novel biomarker combinations which are differentially expressed in osteoarthritis and/or in a particular stage of osteoarthritis, as well as a means of selecting the novel biomarker combinations. The measurement of expression of the products of the biomarkers and combinations of biomarkers demonstrates particular advantage in one or more of the following: (a) diagnosing individuals as having arthritis, (b) differentiating between two stages of osteoarthritis (OA) and (c) diagnosing individuals as having a particular stage of OA. Polynucleotides and proteins which specifically and/or selectively hybridize to the products of the biomarkers are within the scope of the invention as are kits containing said polynucleotides and proteins and the use of said polynucleotides and proteins. The biomarker products can be used to identify therapeutic targets for osteoarthritis, and compounds that bind and/or modulate the gene activity. | 01-17-2013 |
20130165336 | Biomarkers for Diagnosing Schizophrenia and Bipolar Disorder - The invention relates to the identification and selection of novel biomarkers and the identification and selection of novel biomarker combinations which are differentially expressed in blood and useful in diagnosing schizophrenia and/or bipolar disorder as well as monitoring therapeutic efficacy of treatment for schizophrenia or bipolar disorder. The measurement of expression levels of the products of the biomarkers and combinations of biomarkers of the invention can be used to diagnose schizophrenia and/or bipolar disorder. Measurement of the expression level of products of biomarkers of the invention using polynucleotides and proteins which specifically and/or selectively hybridize to the products of the biomarkers of the invention are also encompassed within the scope of the invention as are compositions and kits containing said polynucleotides and proteins. Further encompassed by the invention is the use of the polynucleotides and proteins to monitor the efficacy of therapeutic regimens. | 06-27-2013 |
20140057258 | METHOD OF DIAGNOSING MILD OSTEOARTHRITIS - The invention relates to the identification and selection of novel biomarkers and the identification and selection of novel biomarker combinations which are differentially expressed in individuals with mild osteoarthritis as compared with individuals without osteoarthritis. Polynucleotides and proteins which specifically and/or selectively hybridize to the products of the biomarkers of the invention are also encompassed within the scope of the invention as are kits containing said polynucleotides and proteins for use in diagnosing mild osteoarthritis. Further encompassed by the invention is the use of the polynucleotides and proteins which specifically and/or selectively hybridize to the product of the biomarkers of the invention to monitor disease regression in an individual and to monitor the efficacy of therapeutic regimens. The invention also provides for methods of using the products of the biomarkers of the invention in the identification of novel therapeutic targets for osteoarthritis. | 02-27-2014 |
Sheau-Chiou Chao, Tainan TW
Patent application number | Description | Published |
---|---|---|
20130103016 | AUTOMATIC BEAUTY THERAPY EQUIPMENT - An automatic beauty therapy equipment contains a displacement driving device including a pedestal to be driven by a displacing mechanism so as to move straightly or curvedly in a first-axis direction, a second-axis direction, and a third-axis direction; a therapy device including a therapy element fixed in the pedestal; a controlling device including a controller electrically connecting with the displacement diving device and the therapy device, the controller being used to control the displacement driving device to urge the therapy element of the therapy device to move straightly or curvedly within a therapy area in the first-axis, the second-axis, and the third-axis directions, and the controller being served to set a therapy area so that the therapy element is driven to move vertically and swing with a curved profile of the therapy area to have a precise and stable beauty therapy in the therapy area. | 04-25-2013 |
Shen-Chang Chao, Hong Kong HK
Patent application number | Description | Published |
---|---|---|
20110029610 | Content Sharing in Mobile Devices - Sharing content via a mobile device includes creating a first list of content available for sharing and storing the list in a mobile device, creating a second list of contacts having content sharing permissions and storing the second list in the mobile device, and sharing the first list with a contact in the second list via a wireless network. Sharing the first list with a contact in the second list via a wireless network does not include the use of an intermediary content sharing server. | 02-03-2011 |
20110055894 | Firewall and NAT Traversal for Social Networking and/or Content Sharing On Mobile Devices - A method for facilitating firewall and NAT traversal during social networking and/or content sharing via a mobile device uses an instant message protocol to establish a near real-time communications session between two user devices on opposite sides of the firewall or NAT enabled router. A first application on a mobile device provides social networking and/or content sharing. A second application on the mobile device establishes a communication session for exchanging near real-time messages between the mobile device and a second device over the firewall or NAT protected network. The second application is associated with the first application and allows the mobile device to access a file associated with the first application that is stored in the second device via the communication session. | 03-03-2011 |
Shih Chuan Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20130060976 | KEYBOARD SUPPORTING N-KEY ROLLOVER - A keyboard supporting N-key rollover (NKRO) is provided. The keyboard includes a first key data output module, which is coupled to a keyboard matrix for outputting an unlimited number of key data to a particular OS via a universal serial bus (USB) interface, and a second key data output module, which is coupled to the keyboard matrix for outputting a particular number of key data to any type of OS via the USB interface, synchronously | 03-07-2013 |
Shih-Pang Chao, Pingzhen City TW
Patent application number | Description | Published |
---|---|---|
20130043783 | LIGHT EMITTING DEVICE - A light emitting device of the present invention includes at least: at least more than one blue light chip, at least more than one red light chip and a fluorescent layer overlaid and bonded to the blue light light chip and the red light chip. The fluorescent layer is formed from a uniform mixture of a yellow phosphor and a red phosphor with the addition of a transparent plastic material. At least one portion of the absorbed light source is used to emit a light source with a wave length dissimilar to the wave length of the absorbed light or of the same wave length, thereby achieving the effectiveness to increase the illuminance and color rendering of white light. | 02-21-2013 |
Shih-Pin Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20120218225 | OPTICAL SCANNING TYPE TOUCH APPARATUS AND OPERATION METHOD THEREOF - An optical scanning-type touch apparatus and an operation method thereof are provided. The optical scanning-type touch apparatus includes a touch area, a light scanning module, an imaging module and a calculating unit. The light scanning module is disposed at one corner of the touch area to emit a scanning light for scanning the touch area. The imaging module is disposed at another corner of the touch area adjacent the light scanning module to obtain a first angle between the scattering light and a edge of the touch area, wherein the edge of the touch area is between the light scanning module and the imaging module. The calculating unit receives the first angle, a second angle and a distance between the light scanning module and the imaging module to calculate a position of the object on the touch area. | 08-30-2012 |
Shin-Min Chao, Taoyuan TW
Patent application number | Description | Published |
---|---|---|
20120212741 | METHOD AND INSPECTION DEVICE FOR BRIGHT SPOT DEFECT DETECTION OF A POLARIZER - A method of bright spot defect detection for a polarizer is to be performed by an inspection device and includes the steps of: a) obtaining gray values for pixels of an image of a detected region, that contains a target spot, on the polarizer; b) obtaining a gray value variation score from the gray values obtained for the detected region, the gray value variation score being indicative of gray value variation among the pixels of the image of the detected region; and c) comparing the gray value variation score obtained for the detected region with a threshold value to obtain a comparison result, and determining whether the target spot is a bright spot according to the comparison result. | 08-23-2012 |
Simon Chao, Tsao-Tun Chen TW
Patent application number | Description | Published |
---|---|---|
20130203561 | DUAL-PURPOSE FOLDABLE TREADMILL - A dual-purpose foldable treadmill includes a drive unit, a base frame, an arm frame, a cantilever panel and a tread frame. The arm frame extends in an upright direction from a wall of the base frame and terminates at a top joining end. The cantilever panel extends transversely from the top joining end. The tread frame is pivotally connected to and foldable relative to the base frame such that a lengthwise direction of the tread frame is parallel to the upright direction of the arm frame in the folded position. The folded treadmill can be used as a piece of furniture for storage or as a bench. | 08-08-2013 |
Sung-Hsuen Chao, Seneffe BE
Patent application number | Description | Published |
---|---|---|
20130309498 | Granulated Organopolysiloxane Products - A granulated product comprises a liquid organosilicon compound supported on a particulate carrier which is agglomerated into granules by a binder. A process for the production of a granulated product comprises depositing an organosilicon compound and a binder in a liquid state on a particulate carrier and subjecting the carrier thus treated to conditions in which the binder is solidified, thereby agglomerating carrier particles into granules. The particulate carrier is anhydrous sodium sulfate of mean particle size 1 to 40 μm. | 11-21-2013 |
20150059102 | Drainage Of An Aqueous Composition - In a process for separating a solid material from a suspension of the solid material in water, an organopolysiloxane polyalkylene oxide copolymer comprising a branched organopolysiloxane structure is added to the suspension of solid material in water and the suspension is drained. The organopolysiloxane polyalkylene oxide copolymer comprising a branched organopolysiloxane structure increases the rate of drainage of the suspension. | 03-05-2015 |
Tsu-Min Chao, Guanyin Township TW
Patent application number | Description | Published |
---|---|---|
20130057146 | CONCENTRATED LIGHT EMITTING DEVICE - A concentrated light emitting device includes a transparent casing, a printed circuit board in the transparent casing, a drive module and a light emitting element, which is a single element, plural elements arranged alternately or a module, on the printed circuit board. The drive module and the light emitting element are on one or two sides of the printed circuit board, the drive module includes a regulator circuit without electrolytic capacitors and the light emitting element is an LED or an organic LED. The light emitting device is used in a fluorescent lamp of a smaller diameter, like a T5 fluorescent lamp (i.e., a fluorescent lamp of a diameter of ⅝″ or 16 mm). The present invention is capable of matching with an external drive module and providing a dedicated bracket for the external drive module, which can reduce production cost and can be installed more conveniently. | 03-07-2013 |
Tsung-Yi Chao, Taoyuan TW
Patent application number | Description | Published |
---|---|---|
20120208929 | RESIN COMPOSITION - A resin composition for LED encapsulation is provided. The resin composition includes an epoxy resin, a curing agent and a stress adjusting agent. The resin composition of the present invention improves reliability of LED products and meets requirements in industry. | 08-16-2012 |
Tyrone Chao, Burnaby CA
Patent application number | Description | Published |
---|---|---|
20130092187 | METHOD AND APPARATUS FOR REMOVING WASTE FROM A SOILED CONTAINER - An apparatus and method for removing waste from a soiled container that houses laboratory animals and has an opening is disclosed. The apparatus includes a conveyor having a receiving end for receiving containers from a stack of containers. The stack is disposed such that the openings are upwardly oriented. The apparatus also includes a manipulator that aligns with and engages an uppermost container of the stack and causes the uppermost container to be separated from the stack and to be flipped over onto the receiving end of the conveyor such that the opening is downwardly disposed. Waste discarded from the container falls through openings in the conveyor, and a waste receptacle disposed below the conveyor collects the discarded waste. The conveyor advances to transport the container away from the receiving end toward a discharge end of the conveyor. | 04-18-2013 |
Wei-Chung Chao, Hsinchu Country TW
Patent application number | Description | Published |
---|---|---|
20130271400 | SHAKE UNLOCK MOBILE TOUCH DEVICE AND METHOD FOR UNLOCKING THE SAME - A shake unlock method for unlocking a shake unlock mobile touch device has steps of displaying an initial unlock image, receiving a touch signal that occurs when the initial unlock image is touched, displaying a shaking control image and an unlock endpoint on the touch panel, receiving a series of continuous location coordinates after the mobile touch device is shaken and varying coordinates of the shaking control image according to the received series of continuous location coordinates, and unlocking a lock mode of the mobile touch device when detecting the coordinates of the shaking control image coincide with coordinates of the unlock endpoint. Accordingly, the drawback of unlocking a conventional mobile touch device arising from the difficulty of dragging an image with single-handed operation can be eliminated without requiring additional hardware equipment. | 10-17-2013 |
Wei-Chung Chao, Hsinchu County TW
Patent application number | Description | Published |
---|---|---|
20130270142 | STORED-VALUE CONTAINER - A stored-value container has a body and a stored-value chip mounted on the body. The stored-value chip stores payment information for transaction deduction after being read by an external device. When using the stored-value container to buy beverage, instead of paying with cash or a stored-value card, a consumer can hand the stored-value container to a store clerk to finish payment directly through the stored-value chip. Accordingly, with the stored-value container, consumers can finish the purchasing procedure quickly without carrying cash or a stored-value card and also take environmental protection into account. | 10-17-2013 |
Wei-Kai Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20130179718 | SERVER RACK SYSTEM AND POWER MANAGEMENT METHOD APPLICABLE THERETO - A server rack system including a plurality of power supply units, a monitoring circuit, a rack management controller (RMC), and a plurality of server nodes is provided. The monitoring circuit is for monitoring the power supply units. The RMC is for monitoring the power supply units. When the monitoring circuit and/or the RMC finds that at least one of the power supply units failed to output a normal voltage, an operation status of the server nodes is lowered or at least one of the server nodes is forcibly shut down. | 07-11-2013 |
Wei-Sheng Chao, Kaohsiung City TW
Patent application number | Description | Published |
---|---|---|
20120205773 | SCHOTTKY DIODE WITH LOWERED FORWARD VOLTAGE DROP - A Schottky diode with a lowered forward voltage drop has an N− type doped drift layer formed on an N+ type doped layer. The N− type doped drift layer has a surface formed with a protection ring inside which is a P-type doped layer. The surface of the N− type doped drift layer is further formed with an oxide layer and a metal layer. The contact region between the metal layer and the N− type doped drift layer within the P-type doped layer forms a Schottky barrier. An upward extending N type doped layer is formed on the N+ type doped layer and under the Schottky barrier to reduce the thickness of the N− type doped drift layer under the Schottky barrier. This lowers the forward voltage drop of the Schottky diode. | 08-16-2012 |
Wen-Hsuan Chao, Miaoli County TW
Patent application number | Description | Published |
---|---|---|
20130153819 | THERMOELECTRIC COMPOSITE MATERIAL - An embodiment of the present disclosure provides a thermoelectric composite material including: a thermoelectric matrix including a thermoelectric material; and a plurality of nano-carbon material units located in the thermoelectric matrix and spaced apart from each other, wherein a spacing between two neighboring nano-carbon material unit is about 50 nm to 2 μm. | 06-20-2013 |
Wen-Shin Chao, Ho Mei Chen TW
Patent application number | Description | Published |
---|---|---|
20130264956 | LED DRIVER CAPABLE OF CONTROLLING COLOR/COLOR TEMPERATURE WITH A POWER CARRIER - An LED driver capable of controlling color/color temperature with a power carrier connects a power switch with a dimmer for linking an input end of an LED color/color temperature output controller. An LED array disposed on an output end of the controller allows a power cord to transmit a controlling signal. A synchronous and dimmer action detection differentiates an action of the dimmer or pressing times from an ON/OFF count, so that the LED array presents different color temperatures/colors accordingly. An LED condition memory saves the color temperature/color according to an output signal. In adjusting illumination, the dimmer changes an output current for altering the power of the LED array accordingly, which presents a stable light but avoids deviating the color temperature/color and flickering. | 10-10-2013 |
Wilson Wai Hang Chao, Burnaby CA
Patent application number | Description | Published |
---|---|---|
20130212255 | METHOD AND SYSTEM FOR GENERATING TRANSACTION DATA FROM NETWORK TRAFFIC DATA FOR AN APPLICATION SYSTEM - A method for generating transaction data from network traffic data for an application system which is distributed across a plurality of network connected nodes, comprising: gathering the network traffic data, the network traffic data including syntactic information; storing the network traffic data and the syntactic information in field-sets; deriving semantic information from the network traffic data and the syntactic information with a first module which implements a first semantic model relating to first transactions, and modifying the field-sets to include the semantic information; passing the field-sets to a second module; deriving additional semantic information from the network traffic data, the syntactic information, and the semantic information with the second module which implements a second semantic model relating to second transactions, and further modifying the field-sets to include the additional semantic information; and, outputting the field-sets from the second module to provide the transaction data for the application system. | 08-15-2013 |
Wu Chin Chao, New Taipei City TW
Patent application number | Description | Published |
---|---|---|
20130076299 | CHARGING DEVICE CAPABLE OF AUTOMATICALLY DISTRIBUTING CHARGING CURRENT - The charging device contains a connection unit, a measurement unit, an identification unit, a processing unit, a display unit, a current distribution unit, etc. The connection unit has at last a device connection element for connecting an electronic device. The charging device automatically distributes charging current based on preset parameters and multiple charging devices could be cascaded. As such, all connected electronic devices could be fully charged at high speed under full specification sequentially, and the maximum charging current provided and the number of connected electronic devices is expanded. | 03-28-2013 |
Yaping Chao, Tokyo JP
Patent application number | Description | Published |
---|---|---|
20110207177 | SUGAR PRODUCTION PROCESS AND ETHANOL PRODUCTION PROCESS - The present invention provides a pretreatment method which enables the promotion of the enzymatic glycosylation of lignocellulose under relatively mild conditions by using a tree bark as a raw material with less energy. Specifically the present invention provides a step for producing a sugar from a tree bark, which is characterized by having the following steps: an alkali treatment step of immersing the tree bark in an alkali compound solution; a refining treatment step of refining the alkali treated tree bark mechanically into fine pieces; and an enzymatic glycosylation step of glycosylating the refined tree bark with an enzyme. The present invention also provides a method of producing an ethanol. | 08-25-2011 |
20130157318 | METHOD FOR ENZYMATIC SACCHARIFICATION TREATMENT OF LIGNOCELLULOSE-CONTAINING BIOMASS, AND METHOD FOR PRODUCING ETHANOL FROM LIGNOCELLULOSE-CONTAINING BIOMASS - A method for the enzymatic saccharification of a lignocellulosic raw material, including adding a pretreated lignocellulosic raw material as a material suitable for an enzymatic saccharification reaction, together with an electrolyte containing a water-soluble salt, to water that contains a celluolose saccharification enzyme; saccharifying the raw material by an enzymatic saccharification reaction, as a suspension of the raw material having an electrical conductivity adjusted to 5-25 mS/cm; separating and recovering a reaction product and an enzyme-containing solution from the enzymatically saccharified treatment suspension; and recycling the recovered enzyme-containing solution as the enzyme for the enzymatic saccharification step. | 06-20-2013 |
Ya-Shin Chao, Taichung City TW
Patent application number | Description | Published |
---|---|---|
20130141853 | ELECTRONIC APPARATUS - An electronic apparatus including a main body and a detachable input device is provided. The main body has a first connecting interface. The detachable input device has an input interface and a second connecting interface. When the detachable input device is installed on the main body, the first connecting interface contacts the second connecting interface, and the detachable input device transmits signals to the main body through the first connecting interface and the second connecting interface, and receives electric power from the main body through the first connecting interface and the second connecting interface. When the detachable input device is detached from the main body, the first connecting interface is separate from the second connecting interface, and the detachable input device transmits signals to the main body in a wireless manner. | 06-06-2013 |
Yen-Chang Chao, Taichung City TW
Patent application number | Description | Published |
---|---|---|
20130102152 | SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor manufacturing apparatus includes at least one inner retaining ring, and an outer retaining ring. The at least one inner retaining ring applies a first pressure to the polishing pad, and retains a substrate on the polishing pad. The outer retaining ring applies a second pressure to the polishing pad, and retains the at least one inner retaining ring on the polishing pad. Control of the first pressure is independent with respect to control of the second pressure. | 04-25-2013 |
20130288582 | METHOD OF FORMING DIAMOND CONDITIONERS FOR CMP PROCESS - A method for making a conditioner disk used in a chemical mechanical polishing (CMP) process comprises applying a first layer of at least one binder over a substrate; disposing a plurality of diamond particles on the first layer of the at least one first binder at the plurality of locations; and fixing the plurality of diamond particles to the substrate by heating the substrate to a raised temperature and then cooling the substrate. The plurality of diamond particles disposed over the substrate are configured to provide a working diamond ratio higher than 50% when the conditioner disk is used in a CMP process. | 10-31-2013 |
Yi-Ping Chao, Zhubei City TW
Patent application number | Description | Published |
---|---|---|
20130228671 | CMOS SENSOR ARRAY - A CMOS sensor includes a pixel configured to output a voltage based on incident light received by the pixel. A first circuit is coupled to the pixel and is configured to determine a reset voltage of the pixel. A second circuit is coupled to the first circuit and is configured to select a gain level based on the reset voltage of the pixel. A gain circuit is coupled to the second circuit and is configured to set a voltage level of the gain selected by the second circuit. | 09-05-2013 |
20140217265 | CMOS SENSOR ARRAY - A CMOS sensor includes a pixel configured to output a voltage based on incident light received by the pixel. Circuitry is coupled to the pixel and is configured to determine a reset voltage of the pixel and to select a gain level based on the reset voltage of the pixel. A gain circuit is coupled to the circuitry and is configured to set a voltage level of the gain selected by the circuitry. | 08-07-2014 |
Yuan-Te Chao, Pingtung TW
Patent application number | Description | Published |
---|---|---|
20130153388 | TOUCH DEVICES AND FABRICATION METHODS THEREOF - A touch device and a fabrication method thereof are provided. The touch device includes a cover lens, a first light shielding pattern and a touch sensing element disposed on the cover lens, a passivation layer covering the touch sensing element and the first light shielding pattern, and a second light shielding pattern disposed on the passivation layer, wherein the second light shielding pattern overlaps with a part of the first light shielding pattern. | 06-20-2013 |
Yuan-Te Chao, Pingtung County TW
Patent application number | Description | Published |
---|---|---|
20130021724 | TOUCH PANEL AND METHOD FOR MANUFACTURING THE SAME - A touch panel and a method for manufacturing the same are disclosed. The touch panel includes a display module, a touch panel module and a first castor oil layer. In this touch panel, the display module connects to the touch panel module by a first adhesive layer. There is a first sealing space existed between the display module and the touch panel module. The first castor oil layer is set in the first sealing space. In this way, the purposes of being reproduced easily and saving costs can be achieved. | 01-24-2013 |
Yu-Chang Chao, Zhongpu Township TW
Patent application number | Description | Published |
---|---|---|
20120127011 | Method, System and Devices for Remote Control and Be-Controlled - A remote control method applied to a remote control system, including a remote control device and at least one be-controlled device, includes the following steps. The remote control device discovers the at least one be-controlled device dynamically via a network and retrieves a device control profile from the at least one be-controlled device. The device control profile includes a composite finite state machine representing the dependency of various operation states of the at least one be-controlled device and multiple control codes coded in a bit-string format. Then the remote control device retrieves a current operation state code from the at least one be-controlled device via the network periodically. The remote control device analyzes the current operation state code based on the device control profile to accordingly generate a user interface to control the at least one be-controlled device. | 05-24-2012 |
Yu-Chang Chao, Chiayi County TW
Patent application number | Description | Published |
---|---|---|
20130166751 | DISTRIBUTED RESOURCE MANAGEMENT SYSTEMS AND METHODS FOR RESOURCE MANAGEMENT THEREOF - Distributed resource management systems and methods thereof are provided. Distributed resource management system at least includes resource managers (RMs) and resource consumers (RCs). RMs obtain current usage information of the resources of the distributed resource management system and generate first distributed resource graphs according to the current usage information of the resources. RMs obtain identification information of the RMs and generate second distributed resource graphs according to the identification information. RCs obtain a resource expense information regarding resource expense required by a plurality of jobs and generates third distributed resource graphs according to the resource expense information. A compound distributed resource graph (CDRG) is obtained by combining the first, second, and third distributed resource graphs and then the jobs to be performed by a corresponding amount of the resources within the distributed resource management system are determined according to the CDRG. | 06-27-2013 |
20140122574 | REMOTE MANAGEMENT SYSTEM WITH ADAPTIVE SESSION MANAGEMENT MECHANISM - A remote management system with adaptive management mechanism is disclosed, by using an adaptive feedback session management decision (AFSMD) server to connect a plurality of clients and a plurality of cluster nodes respectively. AFSMD server includes a session ID map manager for recording mapping between session and cluster node forwarded to; a decision grade producer, for producing a decision grade to determine the session management manner required for the current session; a session connection number query (SCNQ) for communicating with a storage to obtain a total connection number of a client; a cluster node communication interface, for communicating with cluster nodes and for information cluster nodes if session needs duplication; and a session management decision controller for overseeing the entire session management decision flow to achieve higher efficiency. | 05-01-2014 |
Yung-Hua Chao, Hukou Township TW
Patent application number | Description | Published |
---|---|---|
20120184257 | Multiparty lines Communication Method - A multiparty communication management method employs an initiative computer device to initiate a multiparty communication for connecting to plural receiving communication devices. Next, any receiving communication devices is employed to call an initiative communication device via the user interface or DTMF, whereby the initiative communication device is joined the multiparty lines communication. Finally, the initiative computer device can directly control the voice signals of any of receiving communication devices. By aforementioned method, conferees of the multiparty communication can request the initiator to manage the communication instead of redundant commands required in the art, thereby providing a multiparty communication management method with higher operation rate and greater convenience. | 07-19-2012 |
Yung-Jui Chao, Taoyuan Hsien TW
Patent application number | Description | Published |
---|---|---|
20130294039 | WALL-MOUNTING STRUCTURE FOR WALL-MOUNTED ELECTRONIC DEVICE - A wall mounting structure for wall-mounted electronic device includes a device shell having a coupling structure disposed in an accommodation open chamber therein at two opposite lateral sides, a circuit board mounted in the accommodation open chamber, a cover plate having sliding coupling rods respectively extended from two side flanges thereof and detachably coupled to the coupling structure of the device shell and a bottom flange attached to the bottom side of the device shell to support the device shell, and two mounting brackets affixed to the cover plate at two opposite lateral sides for fastening to a wall of an external object. | 11-07-2013 |
Yun-Peng Chao, Taichung City TW
Patent application number | Description | Published |
---|---|---|
20120309093 | METHOD FOR PREPARING XYLOSE-UTILIZING STRAIN - A method for preparing a xylose-utilizing strain of | 12-06-2012 |
20130157319 | Method for Simultaneous Fermentation of Pentose and Hexose - The present invention relates to a method for simultaneous fermentation of pentose and hexose. The present invention modifies the metabolic pathways of a target microorganism in order to enable the target microorganism to rapidly metabolize pentose and hexose at the same time. This present invention simplified the fermentation process, decreased the cost, and increased the efficiency of the fermentation process. | 06-20-2013 |
Yu-Ying Chao, Taoyuan City TW
Patent application number | Description | Published |
---|---|---|
20120255770 | Carrier and Method for Fabricating Thereof - A method for fabricating a carrier is disclosed, wherein the carrier is applied for a microelectromechanical sensing device. The method includes the steps of: providing a first substrate, wherein the first substrate includes a first metal layer, a first dielectric layer, and a first opening; providing a second substrate, wherein the second substrate includes a second metal layer, a second dielectric layer, and a second opening; providing a reticular element; pressing the first substrate, the reticular element, and the second substrate to form a composite substrate, wherein the first opening and the second opening form a hole, and the reticular element is positioned in the hole; and forming at least one conductive via in the composite substrate. | 10-11-2012 |
Zhijun Chao, Ottawa CA
Patent application number | Description | Published |
---|---|---|
20120322493 | System and Method for Uplink Power Control in a Communications System - A system and method for power control in a communications system are provided. A method for controller operations includes determining a power level for a communications device, and adjusting the power level for the communications device to increase a bandwidth utilization of the communications device, where the adjusting is based on a minimum performance metric for the communications device. The method also includes signaling the adjusted power level to the communications device. | 12-20-2012 |
20130188576 | Systems and Methods for Uplink Resource Allocation - A method embodiment for transmission scheduling includes implementing, by a first base station (BS), a soft-persistent scheduling scheme. The soft-persistent scheduling scheme includes allocating a first resource block to a first UE and other resource blocks to other UEs for a first transmission time interval (TTI), calculating a first priority of the first UE for the first resource block for a second TTI, wherein calculating the first priority involves including a first bonus in the first priority, and wherein the second TTI is later than the first TTI, calculating other priorities for the other UEs and the other resource blocks for the second TTI, and allocating the first and the other resource blocks to the first and other UEs for the second TTI in accordance with the first priority of the first UE as modified by the first bonus and the other priorities of the other UEs. | 07-25-2013 |
Zhijun Chao, Kanata CA
Patent application number | Description | Published |
---|---|---|
20120028584 | System and Method for Self-Organized Inter-Cell Interference Coordination - A system and method for self-organized inter-cell interference coordination are provided. A method for controller operations includes receiving signal power measurements at a controller, determining an interference level based on the signal power measurements, generating relationship information based on the interference level, and determining frequency reuse modes for communications controllers controlled by the controller based on the relationship information. | 02-02-2012 |
20120028664 | System and Method for Automatic Fractional Frequency Reuse Planning - A system and method for automatic fractional frequency reuse (FFR) planning are provided. A method for controller operations includes determining a group of frequency reuse modes, assigning at least one frequency reuse mode to a controller based on mutual relationship information, where the at least one frequency reuse mode is from the group of frequency reuse modes, and sharing the at least one frequency reuse mode with communications controllers coupled to the controller. | 02-02-2012 |