Patent application number | Description | Published |
20110078463 | METHOD, SYSTEM AND APPARATUS FOR LOW-POWER STORAGE OF PROCESSOR CONTEXT INFORMATION - A method and system for saving and/or retrieving context information of a processor core for a power state transition. The processor core resides in a complex power domain variously transitioning between a plurality of power states. The processor core includes a local context storage area for storage and retrieval of processor core context information. A low power context storage resides in a nominal power domain external to the complex power domain. Context information of the processor core is stored to the low power context storage based on whether a power state transition of the complex power domain includes a transition to power down the processor core. | 03-31-2011 |
20110161542 | EMULATION OF AN INPUT/OUTPUT ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER - Embodiments of systems, apparatuses, and methods for emulating an input/output Advanced Programmable Interrupt Controller are disclosed. In one embodiment, an apparatus includes a first interrupt controller having a first programming model, and emulation logic to emulate a second interrupt controller having a second programming model that is different from the first programming model. The emulation logic is also to mask one of a plurality of interrupt requests to the first interrupt controller for each of the plurality of interrupt requests handled by the emulation logic. | 06-30-2011 |
20120079482 | COORDINATING DEVICE AND APPLICATION BREAK EVENTS FOR PLATFORM POWER SAVING - Systems and methods of managing break events may provide for detecting a first break event from a first event source and detecting a second break event from a second event source. In one example, the event sources can include devices coupled to a platform as well as active applications on the platform. Issuance of the first and second break events to the platform can be coordinated based on at least in part runtime information associated with the platform. | 03-29-2012 |
20120159144 | METHOD AND APPARATUS FOR MULTI-MODE MOBILE COMPUTING DEVICES AND PERIPHERALS - Embodiments of a method and apparatus are described for operating a mobile computing device in different modes using different operating systems. An apparatus may comprise, for example, a memory operative to store multiple operating systems, a processor operative to execute the multiple operating systems, an operating system management module operative to select a first operating system when the mobile computing device is in a first mode or a second operating system when the mobile computing device is in a second mode and the mobile computing device is coupled to one or more external devices. Other embodiments are described and claimed. | 06-21-2012 |
20120166172 | PROVIDING LEGACY COMPUTING COMPATIBILITY - In some embodiments if a transaction is directed at existing hardware, then the transaction is directed to existing hardware. If the transaction is not directed at existing hardware, then the transaction is sent through a behavioral model. Other embodiments are described and claimed. | 06-28-2012 |
20120166779 | METHOD, APPARATUS AND SYSTEM TO SAVE PROCESSOR STATE FOR EFFICIENT TRANSITION BETWEEN PROCESSOR POWER STATES - Techniques to provide processor state for implementing a power state transition of a processor. In an embodiment, an operating system executing on a processor detects an opportunity to transition the processor to an idle processor power state. In particular embodiments, the operating system initiates the transition by invoking a task switch, wherein information describing a state of the processor is saved to a task switch segment. | 06-28-2012 |
20120166843 | METHOD, APPARATUS AND SYSTEM TO TRANSITION SYSTEM POWER STATE OF A COMPUTER PLATFORM - Techniques to tie a processor power state transition on a platform to another power state transition on the platform. In an embodiment, processor governor functionality of an operating system detects an idle condition of a processor executing the operating system. Based on the processor idle condition and one or more indicated conditions of other platform devices, tying logic may determine a system power state to transition the platform to. For example, the tying logic may select from one of a plurality of idle standby system power states. | 06-28-2012 |
20130086287 | Protocol Neutral Fabric - An embodiment integrates non-PCI compliant devices with PCI compliant operating systems. A fabric system mimics the behavior of PCI. When non-PCI compliant devices do not know how to respond to PCI enumeration, embodiments provide a PCI enumeration reply and thus emulate a reply that would typically come from a PCI compliant device during emulation. Embodiments allow system designers to incorporate non-standard fabric structures with the benefit of still using robust and mature PCI infrastructure found in modem PCI compliant operating systems. More generally, embodiments allow an operating system compliant with a first standard (but not a second standard) to discover and communicate with a device that is non-compliant with the first standard (but possibly is compliant with the second standard). Other embodiments are described herein. | 04-04-2013 |
20130124898 | METHOD, SYSTEM AND APPARATUS FOR LOW-POWER STORAGE OF PROCESSOR CONTEXT INFORMATION - A method and system for saving and/or retrieving context information of a processor core for a power state transition. The processor core resides in a complex power domain variously transitioning between a plurality of power states. The processor core includes a local context storage area for storage and retrieval of processor core context information. A low power context storage resides in a nominal power domain external to the complex power domain. Context information of the processor core is stored to the low power context storage based on whether a power state transition of the complex power domain includes a transition to power down the processor core. | 05-16-2013 |
20140101674 | COORDINATING DEVICE AND APPLICATION BREAK EVENTS FOR PLATFORM POWER SAVING - Systems and methods of managing break events may provide for detecting a first break event from a first event source and detecting a second break event from a second event source. In one example, the event sources can include devices coupled to a platform as well as active applications on the platform. Issuance of the first and second break events to the platform can be coordinated based on at least in part runtime information associated with the platform. | 04-10-2014 |
20140258749 | DYNAMICALLY ENTERING LOW POWER STATES DURING ACTIVE WORKLOADS - Systems and methods may provide for identifying runtime information associated with an active workload of a platform, and making an active idle state determination for the platform based on at least in part the runtime information. In addition, a low power state of a shared resource on the platform may be controlled concurrently with an execution of the active workload based on at least in part the active idle state determination. | 09-11-2014 |