Patent application number | Description | Published |
20080304348 | Current-mode memory cell - Methods and corresponding systems for reading a memory cell include a first current sourced from a first current source into a summing node, wherein the first current source is coupled to a first reference. A second current is sourced from a second current source into the summing node, wherein the second current source is coupled to the first reference through a programmable fuse. A third current is sunk from the summing node with a current sink, wherein the current sink is coupled to a second reference, and wherein a third current limit is greater than a first current limit and less than the sum of the first current limit and the second current limit. A voltage at the summing node is output in response to the first current, the second current, and the third current. The first and second current sources, and the current sink can be current mirrors. | 12-11-2008 |
20100127687 | Programmable Voltage Reference - A programmable voltage reference includes a temperature compensated current source and a voltage reference circuit. The temperature compensated current source includes an output configured to provide a reference current. The voltage reference circuit includes an input coupled to the output of the temperature compensated current source and a reference output. The voltage reference circuit includes a self-cascode metal-oxide semiconductor field-effect transistor structure that includes a first device that is diode-connected and operates in a weak inversion saturation region and a second device that operates in a weak inversion triode region. A length of the second device is selectable. The voltage reference circuit is configured to provide a reference voltage on the reference output based on the reference current. | 05-27-2010 |
20110121809 | VOLTAGE REFERENCE CIRCUIT - A bandgap voltage reference unit on an integrated circuit ( | 05-26-2011 |
20110185212 | DATA PROCESSING SYSTEM HAVING BROWN-OUT DETECTION CIRCUIT - A brown-out detection circuit comprises a first resistive element, a first transistor, a second transistor, and a comparator. The first resistive element has a first terminal coupled to a first power supply voltage terminal, and a second terminal. The first transistor is of a first conductivity type and has a first current electrode coupled to the second terminal of the first resistive element, a control electrode, and a second current electrode. The second transistor is of a second conductivity type and has a first current electrode coupled to the second current electrode of the first transistor, a control electrode, and a second current electrode coupled to a second power supply voltage terminal. The comparator has a first input terminal coupled to the first terminal of the first resistive element, a second input terminal coupled to the second terminal of the first resistive element, and an output terminal for providing a brown-out detection signal. | 07-28-2011 |
20110241713 | TEST STRUCTURE ACTIVATED BY PROBE NEEDLE - A test structure ( | 10-06-2011 |
20120013365 | LOW VOLTAGE DETECTOR - A low voltage detector ( | 01-19-2012 |
20120105108 | BROWN-OUT DETECTION CIRCUIT - A data processing system ( | 05-03-2012 |
20120281491 | DATA PROCESSING SYSTEM HAVING BROWN-OUT DETECTION CIRCUIT - A data processing system includes a brown-out detection circuit with a first resistive element, a first transistor, a second transistor, and a comparator. The first resistive element has a first terminal coupled to a first power supply voltage terminal, and a second terminal. The first transistor has a first current electrode coupled to the second terminal of the first resistive element, a control electrode, and a second current electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a control electrode, and a second current electrode coupled to a second power supply voltage terminal. The comparator has a first input terminal coupled to the first terminal of the first resistive element, a second input terminal coupled to the second terminal of the first resistive element, and an output terminal for providing a brown-out detection signal. | 11-08-2012 |
20120323508 | LOW VOLTAGE DETECTOR - A low voltage detector ( | 12-20-2012 |
20130082726 | TEST STRUCTURE ACTIVATED BY PROBE NEEDLE - A test structure ( | 04-04-2013 |
20130200943 | CHARGE PUMP VOLTAGE REGULATOR - A regulator ( | 08-08-2013 |
20130285734 | DELAY COMPENSATION CIRCUIT | 10-31-2013 |
20130336066 | SENSE AMPLIFIER CIRCUIT - A sense amplifier ( | 12-19-2013 |
20140210565 | AMPLITUDE LOOP CONTROL FOR OSCILLATORS - Systems and methods for amplitude loop control for oscillators. In some embodiments, an electronic circuit may include oscillator circuitry configured to produce a periodic signal, and control circuitry operably coupled to the oscillator circuitry, the control circuitry including switched capacitor circuitry configured to determine a difference between maximum and minimum peak voltage values of the periodic signal, the control circuit configured to control a voltage amplitude of the periodic signal based upon the difference. In other embodiments, a method may include receiving a clock signal from a clock generator, determining, using a switched capacitor circuit, a first peak voltage value of the clock signal, determining, using the switched capacitor circuit, a second peak voltage value of the clock signal, and controlling a bias current applied to the clock generator based upon a difference between the first and second peak voltage values. | 07-31-2014 |
20150109054 | READY-FLAG CIRCUITRY FOR DIFFERENTIAL AMPLIFIERS - Ready-flag circuitry for differential amplifiers. In some embodiments, a semiconductor device may include an amplifier including two inputs, and a ready-flag circuit operably coupled to the amplifier, the ready-flag circuit configured to monitor two or more internal nodes of the amplifier and to produce a signal indicating whether a voltage or current difference between the two inputs has been minimized. In other embodiments, a method may include monitoring, via a ready-flag circuit, a first and a second internal node of a differential amplifier, wherein the differential amplifier is part of a bandgap voltage reference circuit and producing, via the ready-flag circuit, a signal indicating whether an output of the bandgap voltage reference circuit has reached a nominal value. | 04-23-2015 |
20150180454 | DELAY COMPENSATION CIRCUIT - An integrated circuit includes a delay compensation circuit ( | 06-25-2015 |
Patent application number | Description | Published |
20140073915 | APPARATUS AND METHOD FOR VOLUMETRIC IMAGING OF BLOOD FLOW PROPERTIES - Apparatus, method and computer accessible medium can be provided for determining presence of individual scattering objects in at least one blood vessel. For example, with at least one detector arrangement, it is possible to detect interferometric radiation from at least one portion of the blood vessel(s), and provide data associated therewith. The interferometric radiation can be based on a first radiation provided from the portion at a second radiation provided from a reference. Further, with a computer arrangement, it is possible to determine the presence of the individual scattering objects in the portion of the blood vessel(s) based on the data. It is also possible to identify individual passage of the scattering objects and/or measure at least one characteristic of the passage. | 03-13-2014 |
20140316218 | SYSTEMS AND METHODS FOR MONITORING BRAIN METABOLISM AND ACTIVITY USING ELECTROENCEPHALOGRAM AND OPTICAL IMAGING - Systems and methods for monitoring and/or controlling a brain state of a subject are provided. In certain embodiments, the method includes acquiring physiological data from sensors including electrophysiological sensors and optical sensors, assembling, using data from the electrophysiological sensors, a time-series signal indicative of a brain activity of the subject, and identifying, using the time-series signal, a burst suppression state described by a burst suppression period and a burst period. The method also includes computing, using data from the optical sensors, parameters associated with the burst suppression state, the parameters indicative of least one of a metabolic process and a hemodynamic process, and estimating, using the parameters, time-series signal, and burst period, a response function describing a time course of the parameters correlated with a burst during the burst suppression period. The method further includes controlling a treatment using the response function to generate a target burst suppression state. | 10-23-2014 |