Atsushi Shiraishi
Atsushi Shiraishi, Nagano-Ken JP
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20110058193 | Printing Apparatus, Layout Adjustment Method, Program And Recording Medium - Disclosed is a printing apparatus including an image input unit, a first image narrowing unit, and gives a high weight for image data photographed during a time period in which the number of shots is large, a second image narrowing unit, and gives a high weight for image data photographed during a time period in which the number of shots is large, a weight synthesis unit, a layout decision unit, an image data extraction unit, an image assignment unit, an image color determination unit, and an additional information adjustment unit. The first image narrowing unit counts a group of a plurality of image data photographed at a predetermined time under a specific setting as one group including a number of shots, and calculates the number of shots for each predetermined time period based on the shooting date and time of the image data. | 03-10-2011 |
Atsushi Shiraishi, Kyoto-Shi JP
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20110028585 | PHOTOBASE GENERATOR - The object of the present invention is to provide a photobase generator capable of efficiently generating amines (tertiary amines and amidine) high in catalytic activity by sensing light with a wavelength of from 350 to 500 nm (especially, from 400 to 500 nm). | 02-03-2011 |
20120142806 | PHOTOSENSITIVE COMPOSITION - Provided is a photosensitive composition which can be cured with low energy consumption, even when a substance (such as a colorant) that attenuates or shades an illumination light is contained in a high concentration or even when the photosensitive composition is in the form of a thick film. Specifically provided is a photosensitive composition which comprises the following four components: (1) a radical initiator (A); (2) an acid generator (B) or a base generator (C); (3) a polymerizable substance (D); and (4) a colorant (E), a metal oxide powder (F), or a metal powder (G). Further, the photosensitive composition is characterized in that the radical initiator (A), the acid generator (B), and/or the base generator (C) generates an active species (H) through irradiation with an active ray of light; the active species (H) reacts the radical initiator (A), the acid generator (B), or the base generator (C) to form another species (I); and thus the polymerization of the polymerizable substance (D) by means of the active species (I) proceeds, said active species (H) or (I) being an acid or a base. | 06-07-2012 |
Atsushi Shiraishi, Sayama-Shi JP
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20100265282 | DRIVING APPARATUS FOR LIQUID CRYSTAL LIGHT MODULATOR AND VARIABLE OPTICAL ATTENUATOR EMPLOYING DRIVING APPARATUS - A liquid crystal light modulator | 10-21-2010 |
Atsushi Shiraishi, Saitama JP
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20100026947 | LIQUID CRYSTAL PANEL - The present invention is directed to the provision of a liquid crystal panel that can solve the problem that bubbles are formed in a liquid crystal layer. More specifically, the invention provides a liquid crystal panel includes a first plastic substrate; a second plastic substrate, a liquid crystal layer sealed between the first and second plastic substrates, a transparent conductive layer provided on the first or the second plastic substrate and having a patterned region for driving the liquid crystal layer, and an opening provided in the patterned region of the transparent conductive layer. | 02-04-2010 |
Atsushi Shiraishi, Kanagawa JP
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20100011158 | MEMORY CONTROLLER, MEMORY SYSTEM, AND CONTROL METHOD FOR MEMORY SYSTEM - A memory controller for performing processing for writing data in an interleaved manner and in units of pages in a semiconductor memory section made up of chip | 01-14-2010 |
20140244904 | MEMORY DEVICE AND COMPUTER SYSTEM - A memory device according to an embodiment includes a non-volatile storage device from which data is read and to which data is written, an interface that is connected to the host device by a multiple upstream lanes and/or a multiple downstream lanes and performs data communication in both directions with the host device, and a memory controller. The memory controller changes a connection state of each lane on the basis of lane settings which are determined on the basis of at least one of an amount of data transmitted and the sequentiality of data when the data is transmitted between the memory device and the host device. | 08-28-2014 |
Atsushi Shiraishi, Fukuoka JP
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20090189309 | Method of resin sealing permanent magnets in laminated rotor core - A laminated rotor core ( | 07-30-2009 |
Atsushi Shiraishi, Kodaira JP
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20080257968 | IC CARD - An IC card has a card substrate having semiconductor integrated circuit chips mounted thereon and a plurality of connector terminals formed thereon. The connector terminals are exposed from a casing. The connector terminals are laid out in plural sequences in staggered form between sequences adjacent to one another forward and backward as viewed in an IC card inserting direction. Owing to the adoption of the staggered layout, a structure or configuration wherein the amounts of protrusions of socket terminals of a card socket are changed and the socket terminals are laid out in tandem, can be adopted with relative ease. If a connector terminal arrangement of a downward or low-order IC card is adopted as a specific connector terminal sequence as it is, whereas a function dedicated for an upward or high-order IC card is assigned to another staggered connector terminal arrangement, then backward compatibility can also be implemented with ease. | 10-23-2008 |
20090181721 | IC CARD - A multifunction IC card (MFC) has compatibility with a multimedia card, an SD card, etc. in that connector terminals (# | 07-16-2009 |
20090187703 | MEMORY CARD AND ITS INITIAL SETTING METHOD - In the initial setting of a memory card | 07-23-2009 |
Atsushi Shiraishi, Miyakonojo JP
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20090019210 | NONVOLATILE MEMORY APPARATUS - The service life of memory cards is to be substantially elongated against the occurrence of faulty blocks. A control logic searches blocks in a nonvolatile memory cell array for any acquired fault on the basis of a fault-inviting code in a management information section. If any faulty block is detected, the faulty block will be subjected to write/read comparison of data to judge whether or not the data in the block are normal. Any block determined to be normal will undergo rewriting of its fault-inviting code and registered as a normal block. Further, the registered block is stored into a write management table in the management area as a writable block. This enables an essentially normal block judged faulty on account of an erratic error or some other reason to be restored. | 01-15-2009 |
Atsushi Shiraishi, Tokyo JP
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20080229989 | Thread cutting device of sewing machine - A thread cutting device includes a thread catching member having a catching portion, wherein the thread catching member moves back and forth across a path of a lower thread reeled out from a bobbin so as to catch the lower thread by the catching portion and cuts the lower thread by cooperating with a fixed knife, a first power transmitting portion which transmits a power to the thread catching member, a first cam member provided on a lower shaft rotated by a sewing machine motor and transmits a first moving force to the thread catching member through the first power transmitting portion, a second power transmitting portion which transmits a second moving force from a stepping motor to the thread catching member through the first power transmitting portion. | 09-25-2008 |
Atsushi Shiraishi, Kitakyushu-Shi JP
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20110115126 | METHOD OF RESIN SEALING PERMANENT MAGNETS IN LAMINATED ROTOR CORE - A laminated rotor core ( | 05-19-2011 |
20120305180 | METHOD OF RESIN SEALING PERMANENT MAGNETS IN LAMINATED ROTOR CORE - A laminated rotor core ( | 12-06-2012 |
20140151926 | METHOD OF RESIN SEALING PERMANENT MAGNETS IN LAMINATED ROTOR CORE - A laminated rotor core ( | 06-05-2014 |
Atsushi Shiraishi, Osaka JP
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20110302699 | SOCK - To provide a functional area partially within the toe area on the sole side of the sock. Providing a needle-lowering area | 12-15-2011 |
Atsushi Shiraishi, Kawasaki-Shi JP
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20130036339 | MEMORY DEVICE - According to the embodiments, a memory device includes a memory to which data is written using memory cells as a write unit and a controller which controls the memory. In response to a request to write data with a logical address to the memory from a host device, the controller requests the host device to transmit a segment of the write data with a size specified by the controller. The controller writes the write data with additional data to the memory. The write-data segment has a size determined to allow the combined size of the write-data segment and corresponding additional data to be the largest while smaller than the size of the write unit or has a multiple integral of the size. | 02-07-2013 |
20130067143 | MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME - According to one embodiment, a memory device includes a nonvolatile memory, a command storage module in which a command is stored, and a controller which receives the command from a host device, stores the command in the command storage module, executes the command stored in the command storage module, and after having completed the execution of the command, transmits, to the host device, a first signal reporting the completion of the execution of the command. | 03-14-2013 |
20130073793 | MEMORY DEVICE - According to one embodiment, a memory device includes a nonvolatile memory which stores data in units of a write unit includes cells, and a controller which controls the memory and partitions memory space of the memory. In response to a request to write write-data to the memory from a host, the controller requests the host to transmit a segment of the write-data with a specified size. The write-data segment has a size of an integral multiple of a size determined to allow for a set of the write-data segment and corresponding additional data to be the largest while smaller than the write unit. Before completion of processing a first command which requests access to a first partition, the controller accepts a second command which requests access to a second partition. | 03-21-2013 |
Atsushi Shiraishi, Kawasaki JP
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20160103478 | MEMORY SYSTEM AND MEMORY CONTROLLER - According to embodiments, a second control unit creates parity from information loaded into a volatile second memory. When shifting from a normal mode to a sleep mode, the second control unit stores the created parity and the information loaded in the second memory into a buffer of a non-volatile first memory, and issues a power supply shutdown request. A power supply circuit shuts down power supply to the second memory and the second control unit in response to the issued power supply shutdown request. | 04-14-2016 |