Patent application number | Description | Published |
20110113292 | Method, Device, Computer Program Product and Data Processing Program For Handling Communication Link Problems Between A First Communication Means and A Second Communication Means - A method for handling communication link problems between a first communication means and a second communication means. Data signals, control signals and/or error information are transferred between the first communication means and the second communication means using the communication link. The method includes activating a static identification pattern in the first communication means representing an error information, and stopping a clock signal (Clk) inside the first communication means to freeze a present error condition, in response to a communication link problem being detected, and transferring the activated static identification pattern permanently and/or repeatedly to the second communication means using the communication link. | 05-12-2011 |
20140032983 | Computer Program Product for Handling Communication Link Problems Between a First Communication Means and a Second Communication Means - A computer program product for handling communication link problems between a first communication means and a second communication means. Data signals, control signals and/or error information are transferred between the first communication means and the second communication means using the communication link. The method includes activating a static identification pattern in the first communication means representing an error information, and stopping a clock signal (Clk) inside the first communication means to freeze a present error condition, in response to a communication link problem being detected, and transferring the activated static identification pattern permanently and/or repeatedly to the second communication means using the communication link. | 01-30-2014 |
20140344823 | INTERRUPTION OF CHIP COMPONENT MANAGING TASKS - Embodiments include an apparatus comprising a processor and a computer readable storage medium having computer usable program code. The computer usable program code can be configured to determine whether priority of a requested task is higher than a priority of a currently executing task. The computer usable program code can be further configured to determine whether a value indicates that the currently executing task can be interrupted. The computer usable program code can be configured to trigger execution of the requested task on the processor, if the value indicates that the currently executed task can be interrupted. The computer usable program code can be further configured to wait for lapse of a time period and, interrupt the currently executing task upon detection of lapse of the time period or detection of a change to the value, if the value indicates that the currently executing task cannot be interrupted. | 11-20-2014 |
20140344824 | INTERRUPTION OF CHIP COMPONENT MANAGING TASKS - Embodiments include receiving, at a microcontroller of a chip, a request to execute a first task having a first priority. Embodiments further include determining that a second task having a second priority is currently executing. Embodiments further include determining that the first priority is higher than the second priority. Embodiments further include determining whether a value in a register indicates that the second task can be interrupted. If it is determined that the second task can be interrupted, embodiments further include triggering execution of the second task. If it is determined that the second task cannot be interrupted, embodiments further include waiting for lapse of a time period since receipt of the request to execute the first task, and interrupting the second task upon detecting lapse of the time period, or detecting, prior to the lapse of the time period, that the second task can be interrupted. | 11-20-2014 |
20150113346 | ELECTRONIC CIRCUIT HAVING SERIAL LATCH SCAN CHAINS - The invention relates to an electronic circuit ( | 04-23-2015 |
20160092375 | DATA ACCESS PROTECTION FOR COMPUTER SYSTEMS - A protection circuit can be used with a computer system having a master device and at least one slave device that are connected by an inter-integrated circuit (I2C) bus. A first access request is received that includes an address that identifies a first slave device. In response to a permissible mode, the first access request is communicated to the first slave device using the I2C bus. A sticky protection bit can be set. In response to the sticky protection bit being set, the protection circuit can be placed in a protected mode. A second access request is received. The second access request can be determined to be a protected access to the first slave device. In response to the determining and the protected mode, the second access request to the first slave device can be denied. | 03-31-2016 |
20160092387 | DATA ACCESS PROTECTION FOR COMPUTER SYSTEMS - A protection circuit can be used with a computer system having a master device and at least one slave device that are connected by an inter-integrated circuit (I2C) bus. A first access request is received that includes an address that identifies a first slave device. In response to a permissible mode, the first access request is communicated to the first slave device using the I2C bus. A sticky protection bit can be set. In response to the sticky protection bit being set, the protection circuit can be placed in a protected mode. A second access request is received. The second access request can be determined to be a protected access to the first slave device. In response to the determining and the protected mode, the second access request to the first slave device can be denied. | 03-31-2016 |
20160125188 | CONFIDENTIAL EXTRACTION OF SYSTEM INTERNAL DATA - Secure extraction of state information of a computer system is provided. A method includes obtaining, by a security engine of a system, a public encryption key associated with a private decryption key; generating an extraction key that is inaccessible outside of the security engine; encrypting the extraction key with the public encryption key, to thereby obtain an encrypted extraction key; collecting state information of the system; encrypting the collected state information with the extraction key and storing the encrypted collected state information; and based on a request for access to the stored encrypted collected state information by a request for the extraction key, providing the extraction key to facilitate decryption of the stored encrypted state information. | 05-05-2016 |