Patent application number | Description | Published |
20120233361 | HOST DEVICE SUSPENDING COMMUNICATION LINK TO CLIENT DEVICE BASED ON CLIENT DEVICE NOTIFICATION - A communication link between a host device and a client device can be suspended based on a suspend request or notification provided by the client device. The suspend request can be transmitted by a client device to a host device if the client device determines that suspension is appropriate, and can be sent in response to receiving a polling request from the host device. After receiving a suspend request, the host device can initiate an operation to suspend the communication link between the devices. | 09-13-2012 |
20130290572 | CLIENT DEVICE CONFIGURATION BASED ON INFORMATION STORED BY HOST DEVICE - A host device can enable operation with a client device based on stored or cached enumeration information. The enumeration information can be initially received from the client device during a first configuration process, and stored or cached in volatile and/or non-volatile storage accessible by the host device. During subsequent configuration processes, operation with the client device can be enabled based on the stored or cached enumeration information. Operation between the host device and the client device can be facilitated through a communication protocol, such as the universal serial bus (USB) protocol. A host device and client device can be connected via a traditional USB or USB High Speed Inter-Chip (HSIC) connection. | 10-31-2013 |
20140013137 | SYSTEMS AND METHODS FOR SUSPENDING IDLE DEVICES - A method for suspending an idle device includes receiving, by a processor, an indication that a device having a communication channel is connected to a host device. The method then includes determining a first timeout value associated with the communication channel and a second timeout value associated with the first device. The first timeout value corresponds to an amount of time allotted for an operation to complete in the communication channel, and the second timeout value corresponds to an amount of time allotted for the device to be designated as idle before the device is suspended. The device is determined to be idle when the operation is pending in the communication channel for an amount of time that is greater than the first timeout value. The device is suspended when the device has been idle for an amount of time that is greater than the second timeout value. | 01-09-2014 |
20140075054 | DEVICE-DEPENDENT SELECTION BETWEEN MODES FOR ASYMMETRIC SERIAL PROTOCOLS - A portable communication device (PCD) can automatically switch into different operating modes of an asymmetric communication protocol (such as USB) depending on the type of accessory connected. For example, the accessory can signal whether the PCD should operate in a first mode or a second mode using a hardware indicator such as identification resistor across two pins of a multi-pin connector and/or a software indicator such as a command protocol. The PCD can detect the accessory's signal and switch to the operating mode requested by the accessory. | 03-13-2014 |
20140181469 | METHODS AND APPARATUS FOR REDUCING POWER CONSUMPTION WITHIN EMBEDDED SYSTEMS - Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a “device”-initiated and “host”-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption. | 06-26-2014 |
20150346001 | System on a Chip with Always-On Processor - In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down. | 12-03-2015 |
20150346806 | System on a Chip with Fast Wake from Sleep - In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down. | 12-03-2015 |
20150347287 | System on a Chip with Always-On Processor Which Reconfigures SOC and Supports Memory-Only Communication Mode - In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down. | 12-03-2015 |