Patent application number | Description | Published |
20090121321 | Wafer and a Method of Dicing a Wafer - A wafer includes a plurality of chips, each of the chips being spaced from each other by kerf-line regions including a reduced width. | 05-14-2009 |
20090189280 | Method of Forming a Non Volatile Memory Device - In one embodiment, a method of forming a semiconductor device is disclosed. A high-k dielectric is deposited of over a semiconductor body, and a portion of the high-k dielectric is wet etched an etchant selected from the group consisting of hot phos, piranha, and SC1. | 07-30-2009 |
20120080795 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING SAME - One or more embodiments relate to a method for forming a semiconductor structure, comprising: providing a workpiece; forming a dielectric barrier layer over the workpiece; forming an opening through the dielectric barrier layer; forming a seed layer over the dielectric barrier layer and within the dielectric barrier layer opening; and electroplating a first fill layer on the seed layer. | 04-05-2012 |
20130228929 | Protection Layers for Conductive Pads and Methods of Formation Thereof - In one embodiment, a method of forming a semiconductor device includes forming a metal line over a substrate and depositing an alloying material layer over a top surface of the metal line. The method further includes forming a protective layer by combining the alloying material layer with the metal line. | 09-05-2013 |
20140077379 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING SAME - One or more embodiments relate to a method for forming a semiconductor structure, comprising: providing a workpiece; forming a dielectric barrier layer over the workpiece; forming an opening through the dielectric barrier layer; forming a seed layer over the dielectric barrier layer and within the dielectric barrier layer opening; and electroplating a first fill layer on the seed layer. | 03-20-2014 |
20140167226 | Wafer and a Method of Dicing a Wafer - A wafer includes a plurality of chips, each of the chips being spaced from each other by kerf-line regions including a reduced width. | 06-19-2014 |
20140319688 | Protection Layers for Conductive Pads and Methods of Formation Thereof - In one embodiment, a method of forming a semiconductor device includes forming a metal line over a substrate and depositing an alloying material layer over a top surface of the metal line. The method further includes forming a protective layer by combining the alloying material layer with the metal line. | 10-30-2014 |
20150147839 | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device may include: forming a metal layer structure over a semiconductor workpiece; forming a first layer over the metal layer structure, the first layer including a first material; forming at least one opening in the first layer and the metal layer structure; depositing a second layer to fill the at least one opening and at least partially cover a surface of the first layer facing away from the metal layer structure, the second layer including a second material that is different from the first material; removing the second layer from at least the surface of the first layer facing away from the metal layer structure; and removing the first layer. | 05-28-2015 |