Patent application number | Description | Published |
20130268694 | PASS-THROUGH CONVERGED NETWORK ADAPTOR (CNA) USING EXISTING ETHERNET SWITCHING DEVICE - According to one embodiment, a switch system includes a peripheral component interconnect express (PCIe) interface block coupled to a plurality of PCIe ports, the plurality of PCIe ports being adapted for coupling to one or more external PCIe devices, wherein the PCIe interface block includes logic adapted for providing direct memory access (DMA) for each PCIe lane thereof, multiple switched Ethernet ports adapted for coupling to one or more external Ethernet devices, switching logic adapted for switching between the multiple switched Ethernet ports and the plurality of PCIe ports, and a local processor coupled to the PCIe interface block. The external host includes a pass-through PCIe adaptor coupled to the switch system via a PCIe port. Other systems, computer program products, and methods are described according to more embodiments. | 10-10-2013 |
20130322264 | PROVIDING REAL-TIME INTERRUPTS OVER ETHERNET - In one embodiment, a method includes sending a request to one or more distributed fabric protocol (DFP) system members in order to retrieve one or more events from the one or more DFP system members, wherein the one or more events are received as data encapsulated in a packet(s), receiving one or more acknowledgements to the request from the one or more DFP system members at a local network switch of the DFP system master, upon receipt of the at least one packet: decoding the at least one packet to retrieve details of the one or more events using a dedicated processor of the DFP system master, creating and sending a message signaled interrupt (MSI) comprising the details of the one or more events to a local processor of the DFP system master using the dedicated processor, and reading the MSI using the local processor of the DFP system master. | 12-05-2013 |
20130322290 | PROVIDING I2C BUS OVER ETHERNET - In one embodiment, a system includes a local processor, a peripheral component interconnect express (PCIe) switch electrically coupled to the local processor, one or more local I | 12-05-2013 |
20140056175 | INTEGRATED DEVICE MANAGMENT OVER ETHERNET NETWORK - A clustered network may include a plurality of switch boxes where a master switch box may communicate and control hardware devices in remote switch boxes. The switch boxes in the network may each include a multiplexer, for example, a field programmable array (FPGA) that may process message requests related to hardware devices of a switch box. If the hardware device is in a remote switch box, then the FPGA of the master switch box may process the status data from the remote switch box so that a local processor in the master switch box can read the status data. | 02-27-2014 |
20140198638 | LOW-LATENCY LOSSLESS SWITCH FABRIC FOR USE IN A DATA CENTER - In one embodiment, a system includes a switch configured for communicating with a low-latency switch and a buffered switch, the switch having a processor adapted for executing logic, logic adapted for receiving a packet at an ingress port of a switch, logic adapted for receiving congestion information, logic adapted for determining that at least one congestion condition is net based on at least the congestion information, logic adapted for applying a packet forwarding policy to the packet when the at least one congestion condition is met, logic adapted for forwarding the packet to a buffered switch when the packet satisfies the packet forwarding policy, and logic adapted for forwarding the packet to a low-latency switch when the at least one congestion condition is not met. | 07-17-2014 |
20140282611 | DISTRIBUTED AND SCALED-OUT NETWORK SWITCH AND PACKET PROCESSING - Embodiments of the invention relate to scaled-out and distributed network packet processors and switch central cores. One embodiment relates to a system including multiple central core processing devices, wherein each central core processing device includes: a virtual central core interface for establishing scaled-out and distributed virtual communication connections with the central core processing devices and a packet processor interface manager connected with multiple packet processing interfaces. Multiple packet processors each include: a packet processor thread manager for managing and processing packets received by central core processing devices and multiple central core processing interfaces for providing connectivity between the packet processors and the plurality of central core processing devices. The packet processing interfaces and the central core processing interfaces provide scaled-out and distributed connectivity of the packet processors to one or more central core processing devices. | 09-18-2014 |
20140337559 | PASS-THROUGH CONVERGED NETWORK ADAPTOR (CNA) USING EXISTING ETHERNET SWITCHING DEVICE - According to one embodiment, a switch system includes an external host connected via a peripheral component interconnect express (PCIe) port to a switch system, the external host being configured to perform functionality of a management plane and a control plane for the switch system, the external host having a processor. In another embodiment, a computer program product includes a computer readable storage medium having computer readable program code embodied therewith, the computer readable program code including computer readable program code configured to perform functionality of a management plane and a control plane for a switch system using a processor of an external host. Other systems, computer program products, and methods are described according to more embodiments. | 11-13-2014 |
20150139246 | PROVIDING REAL-TIME INTERRUPTS OVER ETHERNET - In one embodiment, a method includes sending a request to one or more distributed fabric protocol (DFP) system members in order to retrieve one or more events from the one or more DFP system members, receiving one or more acknowledgements to the request from the one or more DFP system members at a local network switch of a DFP system master, upon receipt of at least one packet in which the one or more events are encapsulated as data: decoding the at least one packet to retrieve details of the one or more events using a dedicated processor of the DFP system master, creating and sending a message signaled interrupt (MSI) comprising the details of the one or more events to a local processor of the DFP system master using the dedicated processor, and reading the MSI using the local processor of the DFP system master. | 05-21-2015 |