45th week of 2012 patent applcation highlights part 38 |
Patent application number | Title | Published |
20120282668 | Genetically Programmed Expression of Proteins Containing the Unnatural Amino Acid Phenylselenocysteine - The invention relates to orthogonal pairs of tRNAs and aminoacyl-tRNA synthetase that can incorporate the unnatural amino acid phenylselenocysteine into proteins produced in eubacterial host cells such as | 2012-11-08 |
20120282669 | Solubilized Phospholipids for Stabilizing Nucleic Acid Polymerases - Compositions and methods are provided that relate to solubilized phospholipids and their use in stabilizing nucleic acid polymerases. For example, a phospholipid with a tail containing at least 8 carbons can be solubilized in the presence of an amphipathic molecule. | 2012-11-08 |
20120282670 | COMPOSITIONS AND METHODS FOR ENHANCING PRODUCTION OF A BIOLOGICAL PRODUCT - Provided herein are methods, nucleic acids, polypeptides, compositions, and kits relating to the conjugation of a heterologous polypeptide to a molecule of interest during production of the polypeptide in cell culture. In various embodiments, the heterologous polypeptide is linked to a sortase ligation sequence and the molecule of interest is linked to a complementary sortase ligation sequence, such that expression of the heterologous protein in the presence of the molecule of interest and cells expressing a surface-associated sortase with the sortase catalytic domain exposed to the extracellular medium results in ligation of the heterologous polypeptide to the molecule of interest to form a conjugated polypeptide. | 2012-11-08 |
20120282671 | MULTI-ARM POLYETHYLENE GLYCOL DERIVATIVES, CONJUGATES AND GELS OF PHARMACEUTICALS AND THE SAME - A multi-arm polyethylene glycol (I) having different kinds of reactive groups and the uses thereof are disclosed, which is formed by polymerizing ethylene oxide with oligo-pentaerythritol as an initiator, wherein, PEG is same or different and is —(CH2CH2O)m-, the average value of m is an integer of 2-250; I is an integer of 1 or more. The method for producing the multi-arm polyethylene glycol having different kinds of reactive groups, the multi-arm polyethylene glycol active derivatives comprising linking groups X attached to PEG and terminal reactive groups F attached to X, the gels formed by the multi-arm polyethylene glycol active derivatives, the drug conjugates formed by the multi-arm polyethylene glycol active derivatives and drug molecules, and the uses thereof in preparing drugs are also disclosed. | 2012-11-08 |
20120282672 | Alpha-Amylase Mutants - The invention relates to a variant of a parent Termamyl-like alpha-amylase, which variant has alpha-amylase activity and exhibits an alteration in at least one of the following properties relative to the parent alpha-amylase: substrate specificity, substrate binding, substrate cleavage pattern, thermal stability, pH/activity profile, pH/stability profile, stability towards oxidation, Ca | 2012-11-08 |
20120282673 | FUNCTIONAL MUTATION IN RESPIRATORY SYNCYTIAL VIRUS - The present invention provides recombinant respiratory syncytial viruses that have an attenuated phenotype and that comprise one or more mutations in the viral P, M2-1 and/or M2-2 proteins, as well as live attenuated vaccines comprising such viruses and nucleic acids encoding such viruses. Recombinant RSV P, M2-1 and M2-2 proteins are described. Methods of producing attenuated recombinant RSV, and methods of quantitating neutralizing antibodies that utilize recombinant viruses of family Paramyxoviridae, are also provided. | 2012-11-08 |
20120282674 | METHOD FOR THE PREPARATION OF AN INFLUENZA VIRUS - The present invention relates to a method for the preparation of a pharmaceutical composition for the prevention or/and treatment of an influenza virus infection. | 2012-11-08 |
20120282675 | NOVEL LACTOBACILLUS PLANTARUM AND COMPOSITION CONTAINING SAME - The present invention provides | 2012-11-08 |
20120282676 | Compositions and Methods for Enhancing Lipid Production in Marine Microalgae - Methods for enhancing lipid production and growth rate of marine algae are provided. | 2012-11-08 |
20120282677 | PHOTOBIOREACTOR COMPRISING ROTATIONALLY OSCILLATING LIGHT SOURCES - The invention relates to a photobioreactor having illumination by light sources (light guides, LEDs) moved in rotational oscillation, and optionally membrane surfaces for gas transport moved in combination in rotational oscillation. | 2012-11-08 |
20120282678 | METHOD FOR RECOVERING INERT OR LIVING MICROPARTICLES AND USE AND INSTALLATION OF SAME - A method for recovering inert or living microparticles in which a rising liquid column is set up under negative pressure of an aqueous effluent that includes inert or living microparticles, and a foam is separated at the top of the column into a multiphase effluent enriched with inert or living microparticles relative to the aqueous effluent and into a mostly liquid effluent depleted of inert or living microparticles relative to the aqueous effluent. The invention also concerns the different applications of this method and an installation implementing this method. | 2012-11-08 |
20120282679 | METHODS OF AND SYSTEMS FOR DEWATERING ALGAE AND RECYCLING WATER THEREFROM - A method of dewatering algae and recycling water therefrom is presented. A method of dewatering a wet algal cell culture includes removing liquid from an algal cell culture to obtain a wet algal biomass having a lower liquid content than the algal cell culture. At least a portion of the liquid removed from the algal cell culture is recycled for use in a different algal cell culture. The method includes adding a water miscible solvent set to the wet algal biomass and waiting an amount of time to permit algal cells of the algal biomass to gather and isolating at least a portion of the gathered algal cells from at least a portion of the solvent set and liquid of the wet algal biomass so that a dewatered algal biomass is generated. The dewatered algal biomass can be used to generated algal products such as biofuels and nutraceuticals. | 2012-11-08 |
20120282680 | Further improved blasting method - The present invention relates to a method of deactivating an explosive composition in order to render the composition safe. The present invention also relates to a cartridge that contains an explosive composition and that is adapted to achieve deactivation of the explosive composition in the event that it is not detonated as intended during use. | 2012-11-08 |
20120282681 | Rapid Identification of Organisms in Bodily Fluids - There is provided a device that retains a collected sample for on-demand testing of a small portion of the collected sample while the rest of the sample remains for optional additional analysis. The on-demand test provides relatively immediate information about aspects of the sample, e.g. presence of microbes, chemistry, nutritional condition, presence of contaminants. | 2012-11-08 |
20120282682 | MICRO-CHANNEL STRUCTURE METHOD AND APPARATUS - A method is provided of forming a micro-channel structure for use in a biosensing device. A master structure is provided having a first configuration of micro-channels with respective first fluid flow characteristics. One or more regions of material are deposited onto the master structure using a fluidjet process so as to modify the first configuration into a second configuration having respective second fluid flow characteristics, different from the first. Functional biosensing devices formed using the method are also described. | 2012-11-08 |
20120282683 | SAMPLE ANALYSIS DEVICE - Disclosed is a sample analysis device provided with: a first sample processing portion which is disposed in a first layer and performs some of a plurality of processes on a sample in a container; a second sample processing portion which is disposed in a second layer located above or under the first layer and performs at least some other processes among the plurality of processes on the sample in the container, the some of the plurality of processes having been performed on the sample; and a container transfer portion which transfers the container, which contains the sample on which the some of the processes have been performed, from the first layer to the second layer. | 2012-11-08 |
20120282684 | AUTOMATED ANALYZER FOR CLINICAL LABORATORY - A laboratory automation system that is capable of carrying out clinical chemistry assays, immunoassays, amplification of nucleic acid assays, and any combination of the foregoing, said laboratory automation system employing at least one of micro-well plates and deep multi-well plates as reaction vessels. The use of micro-well plates as reaction vessels enables the laboratory automation system to assume a variety of arrangements, i.e., the laboratory automation system can comprise a variety of functional modules that can be arranged in various ways. In order to effectively carry out immunoassays by means of micro-well plates, a technique known as inverse magnetic particle processing can be used to transfer the product(s) of immunoassays from one micro-well of a micro-well plate to another. | 2012-11-08 |
20120282685 | EXPRESSION VECTOR SUITABLE FOR EXPRESSION OF A CODING SEQUENCE FOR GENE THERAPY - Provided is an expression vector for gene therapy having a novel combination of transcriptional regulatory elements, including a promoter, an enhancer, an intron, an untranslated region (UTR) and a locus control region (LCR). The expression vector enables sustained expression of a liver tissue-specific gene, and thus, can be effectively used for treating thrombosis, hemophilia, liver cancer, etc. | 2012-11-08 |
20120282686 | EXPRESSION VECTOR SUITABLE FOR EXPRESSION OF A CODING SEQUENCE FOR GENE THERAPY - Provided is an expression vector for gene therapy having a novel combination of transcriptional regulatory elements, including a promoter, an enhancer, an intron, an untranslated region (UTR) and a locus control region (LCR). The expression vector enables sustained expression of a liver tissue-specific gene, and thus, can be effectively used for treating thrombosis, hemophilia, liver cancer, etc. | 2012-11-08 |
20120282687 | EXPRESSION VECTOR SUITABLE FOR EXPRESSION OF A CODING SEQUENCE FOR GENE THERAPY - Provided is an expression vector for gene therapy having a novel combination of transcriptional regulatory elements, including a promoter, an enhancer, an intron, an untranslated region (UTR) and a locus control region (LCR). The expression vector enables sustained expression of a liver tissue-specific gene, and thus, can be effectively used for treating thrombosis, hemophilia, liver cancer, etc. | 2012-11-08 |
20120282688 | REACTOR SYSTEMS - This disclosure relates to equipment utilized to manufacture chemical agents, particularly biopharmaceuticals. In some embodiments, reactor systems comprising a mobile carriage assembly; a disposable reaction container removably attached to the carriage assembly; and, a carriage holder into which the mobile carriage assembly may be removably inserted are provided. | 2012-11-08 |
20120282689 | Expanding the Eukaryotic Genetic Code - This invention provides compositions and methods for producing translational components that expand the number of genetically encoded amino acids in eukaryotic cells. The components include orthogonal tRNAs, orthogonal aminoacyl-tRNA synthetases, orthogonal pairs of tRNAs/synthetases and unnatural amino acids. Proteins and methods of producing proteins with unnatural amino acids in eukaryotic cells are also provided. | 2012-11-08 |
20120282690 | ATMOSPHERE CONTROL COMPOSITION - The atmosphere control composition according to the present invention is an atmosphere control composition for use in the culture of cells, which comprises (a) an ascorbic acid component, (b) water, (c) a porous carrier, (d) an aldehyde-removing agent, (e) a transition metal catalyst and/or an alkaline earth metal hydroxide, wherein the aldehyde-removing agent comprises at least one component selected from the group consisting of ethylene urea, urea, arginine, lysine hydrochloride and a polyallylamine. According to the present invention, the atmosphere control composition feasible for preventing the generation of aldehyde can be provided without affecting the oxygen absorption ability and the carbon dioxide generation ability thereof. | 2012-11-08 |
20120282691 | EXTRACELLULAR MATRIX COATED SURFACE FOR CULTURING CELLS - A cell culture product is provided for propagating embryonic stem cells, and maintaining their self-renewal and pluripotency characteristics for extended periods of time in culture. The cell culturing product includes a substrate; and a coating thereon deposited from a coating solution. The coating solution includes a mixture of extracellular matrix proteins and an aqueous solvent, wherein the total protein concentration in the coating solution is about 10 μg/m1 to about 1 mg/ml. | 2012-11-08 |
20120282692 | Oocytes Derived from Ovarian Culture Initially Containing No Oocytes - Ovarian germ-line-competent embryonic stem cells (GLC-ESC) are cultured, either in the presence or absence of a compound having estrogenic activity. The GLC-ESC are either collected prior to specific commitment or are permitted to remain in the culture medium for a time sufficient to develop into oocytes, and the oocytes may be fertilized by adding sperm to the culture medium. The fertilized oocytes may be permitted to develop into embryos, which may be transferred into the uterus of an adult human female or frozen for later use. The invention provides a method for obtaining by in vitro fertilization an embryo that is genetically related to a human female who is not producing oocytes. | 2012-11-08 |
20120282693 | METHOD OF GENERATING NATURAL KILLER CELLS AND DENDRITIC CELLS FROM HUMAN EMBRYONIC STEM CELL-DERIVED HEMANGIOBLASTS - This invention provides methods of generating natural killer (NK) cells and dendritic cells (DCs). The methods utilize human hemangioblasts as intermediate cells to generate the NK cells and DCs. In various embodiments, the methods do not require the use of stromal feeder layers. | 2012-11-08 |
20120282694 | Methods for the Isolation and Expansion of Cord Blood Derived T Regulatory Cells - The present invention encompasses methods, and kits for the isolation and expansion of T regulatory cells having the CD45RA | 2012-11-08 |
20120282695 | CONSTRUCTS FOR ENHANCEMENT OF GENE EXPRESSION IN MUSCLE - Efficient and muscle-specific gene expression can be obtained with constructs containing two or more copies of USE and/or ΔUSE fused to the minimal promoter of the TnISlow gene. USE is a small (about 160-bp) upstream enhancer of the TnISlow gene that confers slow-twitch muscle fiber specificity. ΔUSE is generated from a 100-bp deletion at the 5′ end of USE. ΔUSE confers expression in slow- and fast-twitch muscle fibers. The strength and relatively small size (less than 600-bp) of these constructs make them useful for gene therapy applications. | 2012-11-08 |
20120282696 | FUNCTIONS AND TARGETS OF LET-7 MICRO RNAS - The present invention concerns methods and compositions for treating or assessing treatment of diseases related to mis-expression of genes or genetic pathways that can be modulated by let-7. Methods may include evaluating patients for genes or genetic pathways modulated by let-7, and/or using an expression profile to assess the condition of a patient or treating the patient with an appropriate miRNA. | 2012-11-08 |
20120282697 | SYNTHETIC COMPOSITION AND COATING FOR CELL CULTURE - A composition for forming a polymeric cell culture surface includes (i) a pre-polymer comprising a polymer backbone, a cationic moiety conjugated to the backbone, and a cross-linker moiety conjugated to the backbone; and (ii) a peptide-polymer comprising a polymer backbone and cell adhesive peptide conjugated to the backbone. Cross-linked coatings for cell culture that have a suitable amount of cell adhesive peptide and cationic moiety may be formed from the pre-polymer and peptide-polymer. | 2012-11-08 |
20120282698 | METHOD FOR HOMOLOGOUS RECOMBINATION IN EUKARYOTIC CELLS - A method to construct eukaryotic cells having a target sequence in a chromosomal DNA sequence replaced by a desired replacement sequence is disclosed. | 2012-11-08 |
20120282699 | MUTAGENESIS METHOD USING POLYETHYLENE GLYCOL MEDIATED INTRODUCTION OF MUTAGENIC NUCLEOBASES INTO PLANT PROTOPLASTS - Method for targeted alteration of a duplex acceptor DNA sequence in a plant cell protoplast, comprising combining the duplex acceptor DNA sequence with a donor mutagenic nucleobase, wherein the duplex acceptor DNA sequence contains a first DNA sequence and a second DNA sequence which is the complement of the first DNA sequence and wherein the donor mutagenic nucleobase comprises at least one mismatch with respect to the duplex acceptor DNA sequence to be altered, preferably with respect to the first DNA sequence, wherein the method further comprises a step of introducing the donor mutagenic nucleobase into the cell protoplasts using polyethylene glycol (PEG) mediated transformation and the use of PEG protoplast transformation for enhancing the rate of targeted mutagenesis. | 2012-11-08 |
20120282700 | MODIFIED FOOD GRADE MICROORGANISM FOR TREATMENT OF INFLAMMATORY BOWEL DISEASE - The present invention relates to microorganisms that express, or have attached to their surface, a TNFα binding polypeptide. Peptides expressed or attached on the surface of microorganism are more resistant to chemical and enzymatic degradation in the gastrointestinal tract. Such microorganisms are capable of binding TNFα and therefore reducing the content of free TNFα and alleviating its pro-inflammatory effects in the gut. The invention also relates to the use of such microorganisms as medicament in the treatment of inflammatory bowel disease. | 2012-11-08 |
20120282701 | DNA PROMOTERS AND ANTRHAX VACCINES - The invention is related to intracellularly induced bacterial DNA promoters and vaccines against | 2012-11-08 |
20120282702 | Novel Compounds and Synthesis of Tellurium-Derivatized Oligonucleotides for Structural and Functional Studies - Disclosed are compounds of formula (I), a derivative, or a tautomer thereof, or a pharmaceutically acceptable salt of said compound or said tautomer. Also disclosed are methods of preparing compound of formula (I), a derivative, or a tautomer thereof, or a pharmaceutically acceptable salt of said compound or said tautomer. Further disclosed are methods of conducting drug discovery and research comprises applying the compound of formula (I), a derivative, or a tautomer thereof, or a pharmaceutically acceptable salt of said compound or said tautomer in an investigation. | 2012-11-08 |
20120282703 | SPECIFIC DETECTION OF D-GLUCOSE BY A TETRAPHENYLETHENE-BASE FLUORESCENT SENSOR - A method of detecting the presence or absence of saccharide or saccharide level in a biological or artificial sample comprising contacting the sample with a water-soluble tetraphenylethene-cored probe having multiple functionalities of boronic acid and aggregation induced emission (AIE) characteristics, and detecting fluorescence. A method for detecting pH in a sample solution with a certain pH value comprising contacting the sample solution with a water-soluble tetraphenylethene-cored probe having multiple functionalities of boronic acid and aggregation induced emission (AIE) characteristics, and detecting fluorescence. | 2012-11-08 |
20120282704 | FLUORANTHENE COPOLYMERS AND METHODS OF MAKING AND USING THE SAME - The present application relates to copolymers having at least one optionally substituted fluoranthene as a first monomer unit and at least one optionally substituted pyrrole as a second monomer unit. The copolymer may, for example, emit green light when exposed to a blue or ultraviolet radiation. Methods of making the copolymer are also disclosed, as well as methods and apparatuses for producing light and detecting nitroaromatics using the copolymer. | 2012-11-08 |
20120282705 | Explosives Detection Substrate and Methods of Using the Same - Provided herein are explosives detection substrates which include an electrospun (electro)sprayed and/or dry spun aromatic polymer, such as polystyrene, and a small molecule fluorophore. Methods for detecting an explosive material using such substrates are also provided. | 2012-11-08 |
20120282706 | PREPARATION OF AN OPTICAL PH SENSOR BASED ON FLUORESCEIN AND 1-HEPTANESULFONIC ACID SODIUM CO-INTERCALATED LAYERED DOUBLE HYDROXIDE - This invention relates to the field of preparation technology of optical pH sensor by co-intercalated fluorescein and 1-heptanesulfonic acid sodium into layered double hydroxide. The sensor is composed by conductive materials and the surface LDH films by co-interacted FLU and HES. The synthesis method is: first: synthesis of LDH colloid suspension, subsequently, the FLU and HES co-intercalated LDH colloid solution was prepared following the ion-exchange method, then the thin film of FLU-HES/LDH was spreaded on the surface of the conductive material by electrophoretic deposition, and the oriental pH sensor was synthesized. The advantages of the present invention is: first, the LDH matrix provides chromophore molecules with a confined and stable environment; the novel electrophoretic deposition strategy in this work provides a method for precise control of thickness (ranging from nanometers to micrometers), and the oriental pH sensor show good pH responsive. | 2012-11-08 |
20120282707 | SAMPLE PROCESSING CARTRIDGE AND METHOD OF PROCESSING AND/OR ANALYSING A SAMPLE UNDER CENTRIFUGAL FORCE - The present invention relates to a sample processing cartridge ( | 2012-11-08 |
20120282708 | Method and Apparatus for Conducting an Assay - The present invention relates to methods and apparatus for conducting an assay. In particular, the present invention relates to a rotatable platform which can be used for conducting an assay, in particular multi-step assays. The present invention provides a rotatable platform adapted to immobilise a first binding partner in one or more discrete areas on a surface of said platform, or to selectively immobilise a second binding partner in one or more discrete areas on a surface of said platform. The invention also relates to methods, apparatus, a kit and the use of the rotatable platform for conducting an assay. In particular, the invention has been developed primarily for use in sequencing nucleic acid by pyrosequencing, however the invention is not limited to this field. | 2012-11-08 |
20120282709 | METHOD AND DEVICE FOR DNA SEQUENCE ANALYSIS USING MULTIPLE PNA - Provided are a DNA sequence analysis method of high precision providing improved optical limits by detecting wavelengths of lights emitted from labels in the state where a DNA is electrically tethered and completely stretch, and a nanodevice chip for automating the method. Also provided are a DNA sequence analysis method capable of removing binding errors through complementarily binding between a plurality of peptide nucleic acids (PNAs) labeled with labels emitting lights of different wavelengths and a target DNA to be sequenced, and resolving the limit in optical spatial resolution. | 2012-11-08 |
20120282710 | LIGAND BINDING DOMAINS OF NUCLEAR RECEPTORS IN CONTROLLABLE FORM AND METHODS INVOLVING THE SAME - The present invention relates to an isolated protein comprising a ligand binding domain of a nuclear receptor in controllable form, a method of producing the same, its use for the identification of a ligand, a test system comprising the isolated protein and a method for screening for a ligand for a nuclear receptor using the test system. | 2012-11-08 |
20120282711 | MAGNETIC TUNNEL JUNCTION (MTJ) FORMATION USING MULTIPLE ETCHING PROCESSES - A method of manufacturing a magnetic memory element includes the steps of forming a permanent magnetic layer on top a bottom electrode, forming a pinning layer on top the permanent magnetic layer, forming a magnetic tunnel junction (MTJ) including a barrier layer on top of the pinning layer, forming a top electrode on top of the MTJ, forming a hard mask on top of the top electrode, and using the hard mask to perform a series of etching processes to reduce the width of the MTJ and the top electrode to substantially a desired width, where one of these etching processes is stopped when a predetermined material in the pinning layer is detected thereby avoiding deposition of metal onto the barrier layer of the etching process thereby preventing shorting. | 2012-11-08 |
20120282712 | DOPANT MARKER FOR PRECISE RECESS CONTROL - Recess markers are implanted in a material during deposition and used during etching of the material for in-situ removal rate and removal homogeneity-over-radius definitions. An embodiment includes depositing a material on a substrate, implanting two dopants at two predetermined times, respectively, during deposition of the material, etching the material, detecting depths of the two dopants during etching, calculating the removal rate of the material in situ from the depths of the two dopants, and determining from the removal rate an etching stop position. Embodiments further include laterally implanting two dopants in a material at a predetermined depth during deposition, etching the material, detecting the positions and intensities of the two dopants during etching, and calculating lateral homogeneity of the material in situ from intensities of the dopants. Embodiments further include in situ corrective action for the removal process based on the determined removal rate and lateral homogeneity. | 2012-11-08 |
20120282713 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICE - A target space ratio of a monitor pattern on a substrate for inspection is determined to be different from a ratio of 1:1. A range of space ratios in a library is determined to include the target space ratio and not include a space ratio of 1:1. The monitor pattern is formed on a film to be processed by performing predetermined processes on the substrate for inspection. Sizes of the monitor pattern are measured. The sizes of the monitor pattern are converted into sizes of a pattern of the film to be processed having a space ratio of 1:1, and processing conditions of the predetermined processes are compensated for based on the sizes of the converted pattern of the film to be processed. After that, the predetermined processes are performed on a wafer under the compensated conditions to form a pattern having a space ratio of 1:1 on the film to be processed. | 2012-11-08 |
20120282714 | SUSCEPTOR WITH BACKSIDE AREA OF CONSTANT EMISSIVITY - Methods and apparatus for providing constant emissivity of the backside of susceptors are described. Provided is a method comprising: providing a susceptor in a deposition chamber, the susceptor comprising a susceptor plate and a layer comprising an oxide, a nitride, an oxynitride, or combinations thereof, the layer being stable in the presence of the reactive process gases; and locating the wafer on a support surface of the susceptor plate. The method can further comprise selectively depositing an epitaxial layer or a non-epitaxial layer on a surface of the wafer. The method can also further comprise selectively etching to maintain the oxide, nitride, oxynitride, or combinations thereof layer. | 2012-11-08 |
20120282715 | STRUCTURE MANUFACTURING METHOD AND LIQUID DISCHARGE HEAD SUBSTRATE MANUFACTURING METHOD - A method for processing a silicon substrate includes providing a combination of a first silicon substrate, a second silicon substrate, and an intermediate layer including a plurality of recessed portions, which is provided between the first silicon substrate and the second silicon substrate, forming a first through hole that goes through the first silicon substrate by executing etching of the first silicon substrate on a surface of the first silicon substrate opposite to a bonding surface with the intermediate layer by using a first mask, and exposing a portion of the intermediate layer corresponding to the plurality of recessed portions of the intermediate layer, forming a plurality of openings on the intermediate layer by removing a portion constituting a bottom of the plurality of recessed portions, and forming a second through hole that goes through the second silicon substrate by executing second etching of the second silicon substrate by using the intermediate layer on which the plurality of openings are formed as a mask. | 2012-11-08 |
20120282716 | SEMICONDUCTOR MEMBER, SEMICONDUCTOR ARTICLE MANUFACTURING METHOD, AND LED ARRAY USING THE MANUFACTURING METHOD - A novel semiconductor article manufacturing method and the like are provided. A method of manufacturing a semiconductor article having a compound semiconductor multilayer film formed on a semiconductor substrate includes: preparing a member including an etching sacrificial layer ( | 2012-11-08 |
20120282717 | THIN FILM TRANSISTOR, DISPLAY DEVICE AND LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME - As a wiring becomes thicker, discontinuity of an insulating film covering the wiring has become a problem. It is difficult to form a wiring with width thin enough for a thin film transistor used for a current high definition display device. As a wiring is made thinner, signal delay due to wiring resistance has become a problem. In view of the above problems, the invention provides a structure in which a conductive film is formed in a hole of an insulating film, and the surfaces of the conductive film and the insulating film are flat. As a result, discontinuity of thin films covering a conductive film and an insulating film can be prevented. A wiring can be made thinner by controlling the width of the hole. Further, a wiring can be made thicker by controlling the depth of the hole. | 2012-11-08 |
20120282718 | Diode-Based Devices and Methods for Making the Same - In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate. | 2012-11-08 |
20120282719 | METHODS FOR FORMING A MICRO ELECTRO-MECHANICAL DEVICE - Embodiments include methods for forming a device comprising a conductive substrate, a micro electro-mechanical systems (MEMS) structure, and a plurality of bond pads. The conductive substrate has a first side and a second side, the second side opposite the first side. The MEMS structure is formed over the first side of the conductive substrate. The plurality of bond pads are formed over the first side of the conductive substrate and electrically coupled to the first side of the conductive substrate. The conductive substrate and plurality of bond pads function to provide electrostatic shielding to the MEMS structure. | 2012-11-08 |
20120282720 | MESA HETEROJUNCTION PHOTOTRANSISTOR AND METHOD FOR MAKING SAME - A two-terminal mesa phototransistor and a method for making it are disclosed. The photo transistor has a mesa structure having a substantially planar semiconductor surface. In the mesa structure is a first semiconductor region of a first doping type, and a second semiconductor region of a second doping type opposite to that of the first semiconductor region, forming a first semiconductor junction with the first region. In addition, a third semiconductor region of the first doping type forms a second semiconductor junction with the second region. The structure also includes a dielectric layer. The second semiconductor region, first semiconductor junction, and second semiconductor junction each has an intersection with the substantially planar semiconductor surface. The dielectric covers, and is in physical contact with, all of the intersections. | 2012-11-08 |
20120282721 | Method for forming Chalcogenide Semiconductor Film and Photovoltaic Device - A method for forming a chalcogenide semiconductor film and a photovoltaic device using the chalcogenide semiconductor film are disclosed. The method includes steps of coating a precursor solution to form a layer on a substrate and annealing the layer to form the chalcogenide semiconductor film. The precursor solution includes a solvent, metal chalcogenide nanoparticles and at least one of metal ions and metal complex ions which are distributed on surfaces of the metal chalcogenide nanoparticles. The metals of the metal chalcogenide nanoparticles, the metal ions and the metal complex ions are selected from a group consisted of group I, group II, group III and group IV elements of periodic table and include all metal elements of a chalcogenide semiconductor material. | 2012-11-08 |
20120282722 | METALLIZATION METHOD FOR SILICON SOLAR CELLS - A method of forming contacts on a surface emitter of a silicon solar cell is provided. In the method an n-type diffusion of a surface is performed to form a doped emitter surface layer that has a sheet resistance of 10-40 Ω/□. The emitter surface layer is then etched back to increase the sheet resistance of the emitter surface layer. Finally the surface is selectively plated. | 2012-11-08 |
20120282723 | SOLID-STATE IMAGING DEVICE, METHOD FOR MANUFACTURING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS - A solid-state imaging device including a light-receiving portion, which serves as a pixel, and a waveguide, which is disposed at a location in accordance with the light-receiving portion and which includes a clad layer and a core layer embedded having a refractive index distribution in the wave-guiding direction. | 2012-11-08 |
20120282724 | METHOD OF MANUFACTURING SOLAR CELL WITH UPPER AND LOWER CONDUCTOR LAYERS STACKED TOGETHER - A method of manufacturing a solar cell comprises the steps of: forming a lower conductor layer on a front side of a substrate; firing the lower conductor layer at a first temperature to form a first portion embedded into a doped region of the substrate and a second portion; forming an anti-reflection coating (ARC) layer on the front side and the second portion, wherein the ARC layer covers the lower conductor layer such that the second portion is disposed in the ARC layer; forming an upper conductor layer, corresponding to the lower conductor layer and electrically connected to the lower conductor layer, on the ARC layer; and firing the upper conductor layer at a second temperature to form a first portion embedded into the ARC layer and a second portion, which is exposed out of the ARC layer. | 2012-11-08 |
20120282725 | SOLAR CELL MODULE AND METHOD FOR MANUFACTURING THE SAME - A solar cell module and a method for manufacturing the same are discussed. The method for manufacturing a solar cell module includes forming a front protective member including a hardened first silicone resin on a first surface of a front substrate; disposing a plurality of solar cells on the front protective member; forming a back protective member including a hardened second silicone resin and a fiber material on the plurality of solar cells; and disposing a back substrate on the fiber material. | 2012-11-08 |
20120282726 | METHOD FOR FORMING THIN SEMICONDUCTOR LAYER SUBSTRATES FOR MANUFACTURING SOLAR CELLS - Described is a method for forming thin semiconductor layer substrates for manufacturing solar cells, in which method in a provided semiconductor substrate alternately macroporous layers of low macroporosity and etched-away layers can be formed by electrochemical etching. The etched-away layers separate adjacent macroporous layers so that these are preferably self-supporting. In this arrangement an edge region of the semiconductor substrate, which edge region encompasses the macroporous layers at least in part, remains non-etched and is thus used for mechanically stabilizing the encompassed lightly-macroporous layers connected to it. The multilayer stack produced in this manner can subsequently, in a joint fluid process step, as an entity be subjected to further processing steps, for example can be coated with a passivating oxide. Subsequently, the macroporous layers can be separated, successively, from the stabilizing edge region of the semiconductor substrate, wherein a mechanical connection between the macroporous layer and the non-porous edge region is interrupted. Prior to tearing off the respective uppermost layer, processes that have a single-sided effect can be applied. In this way a multitude of thin semiconductor layer substrates in the form of macroporous layers including good surface passivation and a reflection-reducing surface texture can be produced with only a few process steps. | 2012-11-08 |
20120282727 | METHOD OF MANUFACTURING PHOTOVOLTAIC MODULES WITH IMPROVED RELIABILITY - A solar module includes a protective shell with at least two sealed sections formed by moisture barrier sealants. Each sealed section is separated from the adjacent sections and includes at least a portion of a solar cell. In this sectioned configuration, any local defect through the protective shell will only affect the performance of the portions of the solar cells within a particular section that contains this defect and will not affect the portions of the solar cells that are in other sections. | 2012-11-08 |
20120282728 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH REINFORCED PAD STRUCTURE - A method of fabricating a backside illuminated imaging sensor that includes a device layer, a metal stack, and an opening is disclosed. The device layer has an imaging array formed in a front side of the device layer, where the imaging array is adapted to receive light from a back side of the device layer. The metal stack is coupled to the front side of the device layer and includes at least one metal interconnect layer having a metal pad. The opening extends from the back side of the device layer to the metal pad to expose the metal pad for wire bonding. The method includes depositing a film on the back side of the device layer and within the opening, then etching the film to form a frame within the opening to structurally reinforce the metal pad. | 2012-11-08 |
20120282729 | METHODS FOR MANUFACTURING SEMICONDUCTOR APPARATUS AND CMOS IMAGE SENSOR - A method for manufacturing a semiconductor apparatus includes the first step of forming a silicon oxide film including a main portion on a second portion and a sub portion between a first portion and a silicon nitride film, the second step of forming a first conductivity type impurity region under the silicon oxide film, and the third step of forming a semiconductor element including a second conductivity type impurity region having an opposite conductivity to the first conductivity type impurity region in the first portion. In the second step, angled ion implantation is performed into a region under the sub portion at an implantation angle using the silicon nitride film as a mask. | 2012-11-08 |
20120282730 | Ink composition, Chalcogenide Semiconductor Film, Photovoltaic Device and Methods for Forming the same - An ink composition includes a solvent system, a plurality of metal chalcogenide nanoparticles, at least one of metal ions and metal complex ions and a sodium source. The at least one of the metal ions and the metal complex ions are distributed on the surface of the metal chalcogenide nanoparticles and adapted to disperse the metal chalcogenide nanoparticles in the solvent system. The sodium source is dispersed in the solvent system and/or is included in at least one of the metal chalcogenide nanoparticle, the metal ions and the metal complex ions. The metals of the metal chalcogenide nanoparticles, the metal ions and the metal complex ions are selected from a group consisted of group I, group II, group III, group IV elements of periodic table, and sodium and include all metal elements of a chalcogenide semiconductor material. | 2012-11-08 |
20120282731 | PHOTOPLATING OF METAL ELECTRODES FOR SOLAR CELLS - A method of photoplating a metal contact onto a surface of a cathode of a photovoltaic device is provided using light induced plating technique. The method comprises: a) immersing the photovoltaic device in a solution of metal ions, where the metal ions are a species which is to be plated onto the surface of the cathode of the photovoltaic device; and b) illuminating the photovoltaic device, using a light source of time varying intensity. This results in nett plating which is faster in a direction normal to the surface of the cathode than in a direction in a plane of the surface of the cathode. | 2012-11-08 |
20120282732 | METHOD FOR FABRICATING A BACK CONTACT SOLAR CELL - The present disclosure relates to a method for manufacturing a back electrode-type solar cell. The method for manufacturing a back electrode-type solar cell disclosed herein includes: A method for manufacturing a back electrode-type solar cell, comprising: preparing an n-type crystalline silicon substrate; forming a thermal diffusion control film on a front surface, a back surface and a side surface of the substrate; forming a p-type impurity region by implanting p-type impurity ions onto the back surface of the substrate; patterning the thermal diffusion control film so that the back surface of the substrate is selectively exposed; and forming a high-concentration back field layer (n+) at an exposed region of the back surface of the substrate and a low-concentration front field layer (n−) at the front surface of the substrate by performing a thermal diffusion process, and forming a p+ emitter region by activating the p-type impurity region. | 2012-11-08 |
20120282733 | METHOD FOR BAND GAP TUNING OF METAL OXIDE SEMICONDUCTORS - A method for band gap tuning of metal oxide semiconductors is provided, comprising: placing a metal oxide semiconductor in a plasma chamber; (a1) treating the metal oxide semiconductor with an oxygen plasma for oxidizing the metal oxide semiconductor to decrease band gap thereof; and (a2) treating the metal oxide semiconductor with a hydrogen plasma for reducing the metal oxide semiconductor to increase band gap thereof; or (b1) treating the metal oxide semiconductor with an oxygen plasma for oxidizing the metal oxide semiconductor to increase band gap thereof; and (b2) treating the metal oxide semiconductor with a hydrogen plasma for reducing the metal oxide semiconductor to decrease band gap thereof. | 2012-11-08 |
20120282734 | OXIDE THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - An oxide thin film transistor and a method of manufacturing the oxide TFT are provided. The oxide thin film transistor (TFT) including: a gate; a channel formed to correspond to the gate, and a capping layer having a higher work function than the channel; a gate insulator disposed between the gate and the channel; and a source and drain respectively contacting either side of the capping layer and the channel and partially on a top surface of the capping layer. | 2012-11-08 |
20120282735 | METHOD OF MANUFACTURING CHIP-STACKED SEMICONDUCTOR PACKAGE - A method of manufacturing a chip-stacked semiconductor package, the method including preparing a base wafer including a plurality of first chips each having a through-silicon via (TSV); bonding the base wafer including the plurality of first chips to a supporting carrier; preparing a plurality of second chips; forming stacked chips by bonding the plurality of second chips to the plurality of first chips; sealing the stacked chips with a sealing portion; and separating the stacked chips from each other. | 2012-11-08 |
20120282736 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR PACKAGE INCLUDING THE SAME - In a method of manufacturing a semiconductor device, a front end of line (FEOL) process may be performed on a semiconductor substrate to form a semiconductor structure. A back end of line (BEOL) process may be performed on the semiconductor substrate to form a wiring structure electrically connected to the semiconductor structure, thereby formed a semiconductor chip. A hole may be formed through a part of the semiconductor chip. A preliminary plug may have a dimple in the hole. The preliminary plug may be expanded into the dimple by a thermal treatment process to form a plug. Thus, the plug may not have a protrusion protruding from the upper surface of the semiconductor chip, so that the plug may be formed by the single CMP process. | 2012-11-08 |
20120282737 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - Performing electrolysis plating to a wiring is made possible, aiming at the increasing of pin count of a semiconductor device. Package substrate | 2012-11-08 |
20120282738 | CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF - A manufacturing method of a circuit structure is provided. A metal layer having an upper surface is provided. A surface passivation layer is formed on the metal layer. The surface passivation layer exposes a portion of the upper surface of the metal layer, and a material of the metal layer is different from a material of the surface passivation layer. The metal layer and the surface passivation layer are dipped into a modifier, and the modifier is selectively absorbed and attached to the surface passivation layer, so as to form a covering layer. The covering layer has a plurality of nanoparticles and covers the surface passivation layer. | 2012-11-08 |
20120282739 | MANUFACTURING A FILLING OF A GAP IN SEMICONDUCTOR DEVICES - A method for manufacturing a filling in a gap region between a first surface and a second surface includes applying a suspension comprising a carrier fluid and filler particles in the gap region between the first and the second surface; and withholding filler particles by a barrier element in the gap region to form a path of attached filler particles between the first surface and the second surface. | 2012-11-08 |
20120282740 | ELECTRONIC DEVICE AND PROCESS FOR MANUFACTURING ELECTRONIC DEVICE - The electronic device, which allows inhibiting the breaking-away of the element from the frame member, even if the temperature change of the electronic device is repeated, and the process for manufacturing the electronic device, are achieved. An electronic device includes a photo-sensitive element formed in a wafer, a frame member installed on the wafer to surround a functional unit, and an encapsulating resin layer filling a circumference of the frame member. | 2012-11-08 |
20120282741 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR DEVICE - Disclosed is a method of manufacturing a thin film transistor device that includes the following steps: forming slanted portions | 2012-11-08 |
20120282742 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a silicon semiconductor device includes the steps of diluting a silicon-containing raw material gas with hydrogen gas by a factor equal to or larger than 600, applying radiofrequency power to a gas mixture of the diluted raw material gas and hydrogen gas to induce electric discharge, depositing silicon out of the raw material gas decomposed by the electric discharge onto a substrate, and controlling the pressure of the gas mixture to be equal to or higher than 600 Pa. The power density Pw(W/cm | 2012-11-08 |
20120282743 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD - In a semiconductor device manufacturing method, a first semiconductor region which includes a narrow portion and a wide portion is formed in an upper portion of a semiconductor substrate, a gate insulating film is formed on at least side surfaces of the narrow portion, a gate electrode is formed on the gate insulating film, a mask pattern that covers the wide portion is formed, ion implantation of an impurity is performed with the mask pattern as a mask to form an extension impurity region in the narrow portion, the mask pattern is removed, a heat treatment is performed to activate the impurity, a gate sidewall is formed on a side surface of the gate electrode, epitaxial growth of a semiconductor film is performed on the narrow portion and the wide portion after the formation of the gate sidewall, and source-drain regions is formed on both sides of the gate electrode. | 2012-11-08 |
20120282744 | Reduced Threshold Voltage-Width Dependency and Reduced Surface Topography in Transistors Comprising High-K Metal Gate Electrode Structures by a Late Carbon Incorporation - Performance and/or uniformity of sophisticated transistors may be enhanced by incorporating a carbon species in the active regions of the transistors prior to forming complex high-k metal gate electrode structures. On the other hand, increased yield losses observed in conventional strategies may be reduced by taking into consideration the increased etch rate of the carbon-doped silicon material in the active regions. To this end, the carbon species may be incorporated after the application of at least some aggressive wet chemical processes. | 2012-11-08 |
20120282745 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device according to the present invention includes forming a first trench and a second trench by etching the first trench further, in an epitaxial layer formed over a substrate, extending a width of the second trench, forming an oxidize film by oxidizing the extended second trench, and filling an electrode material in the first trench and the second trench including the oxidized film formed therein. The method of fabricating a semiconductor device according to the present invention enables to fabricate a semiconductor device that improves the withstand voltage between a drain and a source and reduce the on-resistance. | 2012-11-08 |
20120282746 | INVERTED-TRENCH GROUNDED-SOURCE FET STRUCTURE USING CONDUCTIVE SUBSTRATES, WITH HIGHLY DOPED SUBSTRATES - This invention discloses an inverted field-effect-transistor (iT-FET) semiconductor device that includes a source disposed on a bottom and a drain disposed on a top of a semiconductor substrate. The semiconductor power device further comprises a trench-sidewall gate placed on sidewalls at a lower portion of a vertical trench surrounded by a body region encompassing a source region with a low resistivity body-source structure connected to a bottom source electrode and a drain link region disposed on top of said body regions thus constituting a drift region. The drift region is operated with a floating potential said iT-FET device achieving a self-termination. | 2012-11-08 |
20120282747 | EFFECTING SELECTIVITY OF SILICON OR SILICON-GERMANIUM DEPOSITION ON A SILICON OR SILICON-GERMANIUM SUBSTRATE BY DOPING - A method for selective deposition of Si or SiGe on a Si or SiGe surface exploits differences in physico-chemical surface behavior according to a difference in doping of first and second surface regions. By providing at least one first surface region with a Boron doping of a suitable concentration range and exposing the substrate surface to a cleaning and passivating ambient atmosphere in a prebake at a temperature lower or equal to 800° C., a subsequent deposition step will prevent deposition in the first surface region. This allows selective deposition in the second surface region, which is not doped with the Boron (or doped with another dopant or not doped). Several devices are, thus, provided. The method saves a usual photolithography sequence, which according to prior art is required for selective deposition of Si or SiGe in the second surface region. | 2012-11-08 |
20120282748 | Method for manufacturing stack structure of PMOS device and adjusting gate work function - The present disclosure provides a method for manufacturing a gate stack structure and adjusting a gate work function for a PMOS device, comprising: growing an ultra-thin interface oxide layer or oxynitride layer on a semiconductor substrate by rapid thermal oxidation or chemical method after conventional LOCOS or STI dielectric isolation is completed; depositing high-K gate dielectric and performing rapid thermal annealing; depositing a composite metal gate; depositing a barrier metal layer; depositing a polysilicon film and a hard mask and then performing photolithography and etching the hard mask; removing photoresist and etching the polysilicon film, the barrier metal layer, the metal gate, the high-K gate dielectric, and the interface oxide layer in sequence to form a gate stack structure of polysilicon film/barrier metal layer/metal gate/high-K gate dielectric; forming spacers, source/drain implantation in a conventional manner and performing rapid thermal annealing, whereby while source/drain dopants are activated, adjusting of metal gate effective work function of the PMOS device is achieved. | 2012-11-08 |
20120282749 | HIGH PERFORMANCE RESONANT ELEMENT - A method of forming a semiconductor device for processing a signal includes providing a circuit board including an input signal line, providing a high performance resonant element connected to the input signal line, and providing an output signal line connected to the high performance resonant element. The high performance resonant element includes a via. | 2012-11-08 |
20120282750 | SEMICONDUCTOR DEVICE HAVING CAPACITORS FIXED TO SUPPORT PATTERNS AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device containing a cylindrical shaped capacitor and a method for manufacturing the same is presented. The semiconductor device includes a plurality of storage nodes and a support pattern. The plurality of storage nodes is formed over a semiconductor substrate. The support pattern is fixed to adjacent storage nodes in which the support pattern has a flowable insulation layer buried within the support pattern. The buried flowable insulation layer direct contacts adjacent storage nodes. | 2012-11-08 |
20120282751 | METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING FINE PATTERNS - A method of fabricating an integrated circuit device includes forming first and second patterns extending in first and second directions, respectively, on a target layer. The first patterns comprise a metal oxide and/or metal silicate material having an etch selectivity with respect to that of the target layer. The second patterns comprise a material having an etch selectivity with respect to those of the first patterns and the target layer. The target layer is selectively etched using the first patterns and the second patterns as an etch mask to define holes respectively extending through the target layer to expose a layer therebelow. At least one of the first and second patterns is formed using respective mask patterns formed by a photolithographic process, and the at least one of the first and second patterns have a finer pitch than that of the respective mask patterns. | 2012-11-08 |
20120282752 | FABRICATING CURRENT-CONFINING STRUCTURES IN PHASE CHANGE MEMORY SWITCH CELLS - In one or more embodiments, methods of fabricating current-confining stack structures in a phase change memory switch (PCMS) cell are provided. One embodiment shows a method of fabricating a PCMS cell with current in an upper chalcogenide confined in the row and column directions. In one embodiment, methods of fabricating a PCMS cell with sub-lithographic critical dimension memory chalcogenide are shown. In another embodiment, methods of fabricating a PCMS cell with sub-lithographic critical dimension middle electrode heaters are disclosed. | 2012-11-08 |
20120282753 | Semiconductor Devices and Methods of Manufacture Thereof - Capacitor plates, capacitors, semiconductor devices, and methods of manufacture thereof are disclosed. In one embodiment, a capacitor plate includes at least one via and at least one conductive member coupled to the at least one via. The at least one conductive member comprises an enlarged region proximate the at least one via. | 2012-11-08 |
20120282754 | Methods of Forming Capacitors Having Dielectric Regions That Include Multiple Metal Oxide-Comprising Materials - Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10 | 2012-11-08 |
20120282755 | METHOD FOR FABRICATING NONVOLATILE MEMORY DEVICE - A method for fabricating a nonvolatile memory device includes forming a substrate structure having a tunnel dielectric layer and a floating-gate conductive layer formed over an active region defined by a first isolation layer forming a first inter-gate dielectric layer and a first control-gate conductive layer over the substrate structure, forming a trench by etching the first control-gate conductive layer, the first inter-gate dielectric layer, the floating-gate conductive layer, the tunnel dielectric layer, and the active region to a given depth, forming a second isolation layer to fill the trench; and forming a second control-gate conductive layer over the resultant structure having the second isolation layer formed therein. | 2012-11-08 |
20120282756 | Thin Film Filling Method - The present invention relates to a thin film filling method, including: feeding reactive gases including a silicon-containing gas, an oxygen-containing gas, an inert gas and a fluent gas into a reaction chamber; forming a first deposited thin film in the trench or gap through HDP CVD; feeding an etching gas and the fluent gas without feeding said silicon-containing gas and oxygen-containing gas, to sputter the surface of the first deposited thin film; feeding said silicon-containing gas and oxygen-containing gas without feeding said etching gas, so that a second deposited thin film is formed on the surface of the sputtered first deposited thin film; feeding said etching gas and fluent gas without feeding said silicon-containing gas and oxygen-containing gas, to sputtering the surface of said second deposited thin film; repeating the last two steps; feeding the silicon-containing gas and oxygen-containing gas without feeding the etching gas to form a plasmas of low pressure and high density, so that a third deposited thin film, which completely fills said trench or gap, is formed on the surface of the sputtered second deposited thin film. | 2012-11-08 |
20120282757 | METHOD FOR MANUFACTURING SOI SUBSTRATE - A semiconductor substrate and a base substrate are prepared; an oxide film is formed over the semiconductor substrate; the semiconductor substrate is irradiated with accelerated ions through the oxide film to form a separation layer at a predetermined depth from a surface of the semiconductor substrate; a nitrogen-containing layer is formed over the oxide film after the ion irradiation; the semiconductor substrate and the base substrate are disposed opposite to each other to bond a surface of the nitrogen-containing layer and a surface of the base substrate to each other; and the semiconductor substrate is heated to cause separation along the separation layer, thereby forming a single crystal semiconductor layer over the base substrate with the oxide film and the nitrogen-containing layer interposed therebetween. | 2012-11-08 |
20120282758 | METHOD FOR MAKING SEMI-CONDUCTOR NANOCRYSTALS - A method for making semi-conductor nanocrystals, including at least the steps of:
| 2012-11-08 |
20120282759 | METHOD FOR MAKING SEMI-CONDUCTOR NANOCRYSTALS ORIENTED ALONG A PREDEFINED DIRECTION - A method for making a semi-conductor nanocrystals, including at least the steps of:
| 2012-11-08 |
20120282760 | ENHANCING INTERFACE CHARACTERISTICS BETWEEN A CHANNEL SEMICONDUCTOR ALLOY AND A GATE DIELECTRIC BY AN OXIDATION PROCESS - In sophisticated transistor elements, long-term threshold voltage shifts in transistors comprising a threshold adjusting semiconductor alloy may be reduced by reducing the roughness of an interface formed between the threshold adjusting semiconductor material and the gate dielectric material. To this end, a portion of the threshold adjusting semiconductor material may be oxidized and may be removed prior to forming the high-k dielectric material. | 2012-11-08 |
20120282761 | METHOD FOR REUSE OF WAFERS FOR GROWTH OF VERTICALLY-ALIGNED WIRE ARRAYS - Reusing a Si wafer for the formation of wire arrays by transferring the wire arrays to a polymer matrix, reusing a patterned oxide for several array growths, and finally polishing and reoxidizing the wafer surface and reapplying the patterned oxide. | 2012-11-08 |
20120282762 | Method For Forming Gallium Nitride Semiconductor Device With Improved Forward Conduction - A method for forming a gallium nitride based semiconductor diode includes forming Schottky contacts on the upper surface of mesas formed in a semiconductor body formed on a substrate. Ohmic contacts are formed on the lower surface of the semiconductor body. In one embodiment, an insulating layer is formed over the Schottky and ohmic contacts and vias are formed in the insulating layer to the Schottky and ohmic contacts to form the anode and cathode electrodes. In another embodiment, vias are formed in the insulating layer to the Schottky contacts and vias are formed in the semiconductor body to the ohmic contacts. An anode electrode is formed in electrical contact with the Schottky contacts. A cathode electrode is formed in electrical contact with the ohmic contacts on the backside of the substrate. | 2012-11-08 |
20120282763 | Process Flow to Reduce Hole Defects in P-Active Regions and to Reduce Across-Wafer Threshold Voltage Scatter - Disclosed herein is a method of forming a semiconductor device. In one example, the method comprises performing at least one etching process to reduce a thickness of a P-active region of a semiconducting substrate to thereby define a recessed P-active region, performing a process in a process chamber to selectively form an as-deposited layer of a semiconductor material on the recessed P-active region, wherein the step of performing the at least one etching process is performed outside of the process chamber, and performing an etching process in the process chamber to reduce a thickness of the as-deposited layer of semiconductor material. | 2012-11-08 |
20120282764 | TECHNIQUE FOR EXPOSING A PLACEHOLDER MATERIAL IN A REPLACEMENT GATE APPROACH BY MODIFYING A REMOVAL RATE OF STRESSED DIELECTRIC OVERLAYERS - In a replacement gate approach, the sacrificial gate material is exposed on the basis of enhanced process uniformity, for instance during a wet chemical etch step or a CMP process, by forming a modified portion in the interlayer dielectric material by ion implantation. Consequently, the damaged portion may be removed with an increased removal rate while avoiding the creation of polymer contaminants when applying an etch process or avoiding over-polish time when applying a CMP process. | 2012-11-08 |
20120282765 | Method of Forming Metal Gates and Metal Contacts in a Common Fill Process - The method described herein involves a method of forming metal gates and metal contacts in a common fill process. The method may involve forming a gate structure comprising a sacrificial gate electrode material, forming at least one conductive contact opening in a layer of insulating material positioned adjacent the gate structure, removing the sacrificial gate electrode material to thereby define a gate electrode opening, and performing a common deposition process to fill the conductive contact opening and the gate electrode opening with a conductive fill material. | 2012-11-08 |
20120282766 | MITIGATION OF SILICIDE FORMATION ON WAFER BEVEL - A method for preventing formation of metal silicide material on a wafer bevel is provided, where the wafer bevel surrounds a central region of the wafer. The wafer is placed in bevel plasma processing chamber. A protective layer is deposited on the wafer bevel. The wafer is removed from the bevel plasma processing chamber. A metal layer is deposited over at least part of the central region of the wafer, wherein part of the metal layer is deposited over the protective layer. Semiconductor devices are formed while preventing metal silicide formation on the wafer bevel. | 2012-11-08 |
20120282767 | METHOD FOR PRODUCING A TWO-SIDED FAN-OUT WAFER LEVEL PACKAGE WITH ELECTRICALLY CONDUCTIVE INTERCONNECTS, AND A CORRESPONDING SEMICONDUCTOR PACKAGE - A semiconductor packaging process includes drilling apertures in a reconstituted wafer, then filling the apertures with conductive paste by wiping a quantity of the paste across a back surface of the wafer so that paste is forced into the apertures. The paste is cured to form conductive posts. The wafer is thinned, and redistribution layers are formed on front and back surfaces of the wafer, with the posts acting as interconnections between the redistribution layers. In an alternative process, blind apertures are drilled. A dry film resist is applied to the front surface of the wafer, and patterned to expose the apertures. Conductive paste is applied from the front. To prevent paste from trapping air pockets in the apertures, the wiping process is performed under vacuum. After curing the paste, the wafer is thinned to expose the cured paste in the apertures, and redistribution layers are formed. | 2012-11-08 |