14th week of 2012 patent applcation highlights part 24 |
Patent application number | Title | Published |
20120081942 | TEST CELLS FOR AN UNPROGRAMMED OTP MEMORY ARRAY - Test cells are included in a one-time programmable (OTP) memory array for detecting semiconductor fabrication misalignment, which can result in a potentially defective memory array. The test cells are fabricated at the same time as the normal OTP cells, except they are smaller in size along one dimension in order to detect mask misalignment along that dimension. Any fabricated test cell which cannot be programmed indicates a level of fabrication mask misalignment has occurred and the OTP memory array should not be used. | 2012-04-05 |
20120081943 | Polarization-Coupled Ferroelectric Unipolar Junction Memory And Energy Storage Device - A memory device is provided. The memory device includes a plurality of memory cells and a controller to write data to and read data from the memory cells. Each memory cell includes a first semiconductor material having a spontaneous polarization, a resistive ferroelectric material having a switchable spontaneous polarization, and a second semiconductor material having a spontaneous polarization, the resistive ferroelectric material being positioned between and in contact with the first and second semiconductor materials. The memory device can be configured to store energy that can be released by applying a voltage pulse to the memory device. | 2012-04-05 |
20120081944 | CROSSBAR ARRAY MEMORY ELEMENTS AND RELATED READ METHODS - Apparatus and related fabrication and read methods are provided for crossbar memory elements. An exemplary crossbar memory element includes a crossbar array structure including a set of access lines, unswitched resistance elements coupled electrically in series between the set of access lines and a reference voltage node, and switched resistance elements coupled electrically in series between the first set of access lines and the reference voltage node. To read from a selected access line, the switched resistance element associated with that access line is enabled while the remaining switched resistance elements are disabled. | 2012-04-05 |
20120081945 | MEMORY ARRAY WITH GRADED RESISTANCE LINES - A memory array with graded resistance lines includes a first set of lines intersecting a second set of lines. A line from one of the sets of lines includes a graded resistance along a length of the line. | 2012-04-05 |
20120081946 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device includes a memory cell array for storing user data provided by arranging memory cells each having a variable resistive element having a first electrode, a second electrode, and a variable resistor made of a metal oxide sandwiched between the first and second electrodes. The first and second electrodes are formed of a conductive material forming ohmic junction with the variable resistor and a conductive material forming non-ohmic junction with the variable resistor, respectively. The variable resistor changes between two or more different resistance states by applying a voltage between the electrodes. The resistance state after being changed is maintained in a nonvolatile manner. The variable resistive elements of all memory cells in the memory cell array are set to the highest of the two or more different resistance states in an unused state before the memory cell array is used to store the user data. | 2012-04-05 |
20120081947 | METAL-INSULATOR-METAL-INSULATOR-METAL (MIMIM) MEMORY DEVICE - The present memory device includes first and second electrodes, first and second insulating layers between the electrodes, the first insulating layer being in contact with the first electrode, the second insulating layer being in contact with the second electrode, and a metal layer between the first and second insulating layers. Further included may be a first oxide layer between and in contact with the first insulating layer and the metal layer, and a second oxide layer between and in contact with the second insulating layer and the metal layer. | 2012-04-05 |
20120081948 | SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF - In a conventional DRAM, errors in reading data are likely to occur when the capacitance of a capacitor is reduced. A plurality of cells is connected to one main bit line Each cell includes a sub bit line and 2 to 32 memory cells. Further, each cell includes a selection transistor and a reading transistor, and a sub bit line is connected to a gate of the reading transistor. Since the parasitic capacitance of the sub bit line is sufficiently small, data of electric charge of a capacitor of each memory cell can be amplified without an error in the reading transistor and output to the main bit line. | 2012-04-05 |
20120081949 | Active Bit Line Droop for Read Assist - A static random access memory (SRAM) includes an SRAM cell to store a bit of data. A word line accesses the SRAM cell, which, responsively, during a read, drives either a bit line true (BLT) or a bit line complement (BLC) low. Both BLT and BLC are precharged to a supply voltage, then, subsequently are discharged to a reference voltage, lower than the supply voltage, prior to the word line being activated. Because the bit lines are at a voltage lower than the supply voltage when the SRAM cell is activated, the SRAM cell stability is improved. | 2012-04-05 |
20120081950 | STRUCTURES AND METHODS FOR A FIELD-RESET SPIN-TORQUE MRAM - An apparatus and method of programming a spin-torque magnetoresistive memory array includes a conductive reset line positioned near each of a plurality of magnetoresistive bits and configured to set the plurality of magnetoresistive memory elements to a known state having magnetization perpendicular to the film plane of the magnetoresistive bits by generating a magnetic field when an electrical current flows therethrough. The conductive reset line is positioned such that the magnetic field is applied with a predominant component perpendicular to the film plane when an electrical current of predetermined magnitude, duration, and direction flows through the first conductive reset line. Another conductive reset line may be positioned wherein the magnetic field is created between the two conductive reset lines. A permeable ferromagnetic material may be positioned around a portion of the conductive reset line or lines to focus the magnetic field in the desired direction by positioning edges of permeable ferromagnetic material on opposed sides of the film plane. A spin torque transfer current is applied to selected ones of the magnetoresistive bits to switch the selected bit to a programmed state. | 2012-04-05 |
20120081951 | NON-VOLATILE MEMORY WITH STRAY MAGNETIC FIELD COMPENSATION - A method and apparatus for stray magnetic field compensation in a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM). In some embodiments, a first tunneling barrier is coupled to a reference structure that has a perpendicular anisotropy and a first magnetization direction. A recording structure that has a perpendicular anisotropy is coupled to the first tunneling barrier and a nonmagnetic spacer layer. A compensation layer that has a perpendicular anisotropy and a second magnetization direction in substantial opposition to the first magnetization direction is coupled to the nonmagnetic spacer layer. Further, the memory cell is programmable to a selected resistance state with application of a current to the recording structure. | 2012-04-05 |
20120081952 | SEMICONDUCTOR STORAGE DEVICE - To write information on a memory cell of SPRAM formed of an MOS transistor and a tunnel magnetoresistive element, the memory cell is supplied with a current in a direction opposite to a direction of a current required for writing the information on the memory cell, and then, the memory cell is supplied with a current required for writing. In this manner, even when the same information is sequentially written on the memory cell, since the currents in the two directions are caused to flow in pairs in the tunnel magnetoresistive element of the memory cell each time information is rewritten, deterioration of a film that forms the tunnel magnetoresistive element can be suppressed. Therefore, reliability of the SPRAM can be improved. | 2012-04-05 |
20120081953 | SEMICONDUCTOR MEMORY APPARATUS - A semiconductor memory apparatus includes: a first write control code generation unit configured to generate first write control codes which are updated with different cycles in a plurality of respective periods, in response to a programming verification flag signal and a programming enable signal, the first write control code generation unit determining the number of the plurality of periods depending upon a code value of the repetition times setting codes and an update cycle of the first write control codes in an initial period among the plurality of periods depending upon a code value of initial setting codes; and a data write unit configured to output a first programming current pulse with a magnitude corresponding to a code combination of the first write control codes which are updated. | 2012-04-05 |
20120081954 | PHASE CHANGE MEMORY APPARATUS HAVING ROW CONTROL CELL - A semiconductor integrated circuit includes a phase change memory apparatus includes a plurality of row control cells and a plurality of phase change memory cells formed on the row control cells while being electrically connected to the row control cells. The plurality of row control cells and the plurality of phase change memory cells are vertically stacked in a cell array area. | 2012-04-05 |
20120081955 | PHASE CHANGE RANDOM ACCESS MEMORY DEVICE - A phase change random access memory device includes: a sense amplifier driving unit configured to compare an input voltage applied through an input signal line with a reference voltage and amplify an output signal in response to the comparison result; an input unit configured to receive an input signal from the input signal line and transmit the received signal to the sense amplifier driving unit; and a coupling prevention unit including a plurality of MOS transistors sharing a bulk bias, coupled between the sense amplifier driving unit and the input unit, and configured to control a sensing margin in response to a level of the input signal. | 2012-04-05 |
20120081956 | SEMICONDUCTOR PHAST CHANGE MEMORY USING MULTIPLE PHASE CHANGE LAYERS - In accordance with some embodiments, a phase change memory may be formed in which the thermal conductivity in the region outside the programmed volume of phase change material is reduced. This may reduce the power consumption of the resulting phase change memory. The reduction in power consumption may be achieved by forming distinct layers of phase change material that have little or no mixing between them outside the programmed volume. For example, in one embodiment, a diffusion barrier layer may be maintained between the two distinct phase change layers. In another embodiment, a face centered cubic chalcogenide structure may be utilized. | 2012-04-05 |
20120081957 | FLASH MEMORY DEVICE AND WORDLINE VOLTAGE GENERATING METHOD THEREOF - A word line voltage generating method of a flash memory which includes generating a program voltage using a positive voltage generator; generating a plurality of negative program verification voltages corresponding to a plurality of negative data states using a negative voltage generator; and generating at least one or more program verification voltages corresponding to at least one or more states using the positive voltage generator. Generating a plurality of negative program verification voltages includes generating a first negative verification voltage; discharging an output of the negative voltage generator to become higher than the first negative verification voltage; and performing a negative charge pumping operation until an output of the negative voltage generator reaches a second negative verification voltage level. | 2012-04-05 |
20120081958 | NONVOLATILE MEMORY DEVICES AND METHODS FORMING THE SAME - Provided are nonvolatile memory devices and methods of forming the same. The nonvolatile memory device includes a plurality of word lines, a ground select line, string select line, and a dummy word line. Each of distances between the dummy word line and the ground select line and between the dummy word line and the word line is greater than a distance between a pair of the word lines adjacent to each other. | 2012-04-05 |
20120081959 | MEMORY SYSTEM AND PROGRAMMING METHOD THEREOF - Provided are a non-volatile memory system and a programming method thereof. The programming method of the non-volatile memory system includes adjusting a program-verify-voltage of a selected memory cell referring to program data to be written in an interfering cell configured to provide interference for the selected memory cell and programming the selected memory cell depending on the adjusted program-verify-voltage. | 2012-04-05 |
20120081960 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a plurality of memory cell data holding transistors provided in each block; a row decoder including transfer transistors, a voltage controller and a block selector in each block, the transfer transistors electrically connected to respective of the memory cell transistors, the voltage controller connected to gates of the respective transfer transistors and transferring a desired voltage to the gates of the respective transfer transistors, the block selector electrically connected to gates of the respective transfer transistors and configured to select blocks. A voltage generator generates the voltage to be supplied to the transfer transistors; and a controller controls the row decoder and the voltage generator circuit. When data is written, the gates of the respective transfer transistors are connected to the voltage controller in each non-selected block, and the gates of the respective transfer transistors are disconnected from the voltage controller in each selected block. | 2012-04-05 |
20120081961 | NONVOLATILE MEMORY APPARATUS CAPABLE OF REDUCING CURRENT CONSUMPTION AND RELATED DRIVING METHOD - Various exemplary embodiments of a nonvolatile memory apparatus are disclosed. In one exemplary embodiment, the memory apparatus may include: a page buffer; an even bit line connected to the page buffer; an odd bit line connected to the page buffer; an even memory cell string installed on the even bit line; an dd memory cell string installed on the odd bit line; and a bit line select unit configured to selectively generate a signal read path between the even bit line and the even memory cell string or between the odd bit line and the odd memory cell string. | 2012-04-05 |
20120081962 | LOW VOLTAGE PROGRAMMING IN NAND FLASH - A memory device includes a plurality of memory cells arranged in series in the semiconductor body, such as a NAND string, having a plurality of word lines. A selected memory cell is programmed by hot carrier injection. The program operation is based on metering a flow of carriers between a first semiconductor body region on a first side of the selected cell in the NAND string and a second semiconductor body region on a second side of the selected cell. A program potential higher than a hot carrier injection barrier level is applied to the selected cell, and then the drain to source voltage across the selected cell and the flow of carriers in the selected cell reach a level sufficient to support hot carrier injection, which is controlled by a switch cell adjacent the selected cell. | 2012-04-05 |
20120081963 | MULTI-STEP CHANNEL BOOSTING TO REDUCE CHANNEL TO FLOATING GATE COUPLING IN MEMORY - In a programming operation, selected storage elements which reach a lockout condition are subject to reduced channel boosting in a program portion of the next program-verify iteration, to reduce coupling effects on the storage elements which continue to be programmed. In subsequent program-verify iterations, the locked out storage elements are subject to full channel boosting. Or, the boosting can be stepped up over multiple program-verify iterations after lockout. The amount of channel boosting can be set by adjusting the timing of a channel pre-charge operation and by stepping up pass voltages which are applied to unselected word lines. The reduced channel boosting can be implemented for a range of program-verify iterations where the lockout condition is most likely to be first reached, for one or more target data states. | 2012-04-05 |
20120081964 | SENSING FOR NAND MEMORY BASED ON WORD LINE POSITION - In a NAND non-volatile memory system, a sensing process accounts for a relative position of a selected non-volatile storage element in a NAND string. In one approach, the storage elements are assigned to groups based on their position, and each group receives a common sensing adjustment during a verify or read process. A group which is closest to a source side of the NAND string may be the largest of all the groups, having at least twice as many storage elements as the other groups. The adjusting can include adjusting a sensing parameter such as body bias, source voltage, sensing time or sensing pre-charge level, based on the position of the sensed storage element or its associated word line position. The adjusting of the sensing may also be based on the control gate voltage and the associated data state involved in a specific sensing operation. | 2012-04-05 |
20120081965 | METHOD OF EVALUATING A SEMICONDUCTOR STORAGE DEVICE - A method of evaluating a semiconductor storage device of a floating gate type has calculating an electron density distribution of a tunnel insulating film of a memory cell by multiplying a change rate of a threshold voltage Vt of the memory cell of the semiconductor storage device with respect to the change of the logarithm of a time with ε*Cr*2k/Tox/q (where ε is the permittivity of the tunnel insulating film of the memory cell, Cr indicates a coupling ratio of the memory cell, Tox indicates the thickness of the tunnel insulating film, k indicates an attenuation rate of the existence probability when the charges are detrapped and is represented as k=(2mE/(h/2π) | 2012-04-05 |
20120081966 | COMBINED EEPROM/FLASH NON-VOLATILE MEMORY CIRCUIT - A non-volatile memory circuit includes memory rows and supporting circuits coupled to the memory rows, where at least one of the memory rows include at least one Electrically Erasable Programmable Read-Only Memory (EEPROM) memory element and at least one Flash memory element. The EEPROM and Flash elements are configured to share some of the supporting circuits and can be accessed in parallel. | 2012-04-05 |
20120081967 | METHOD AND SYSTEM FOR PROGRAMMING NON-VOLATILE MEMORY CELLS BASED ON PROGRAMMING OF PROXIMATE MEMORY CELLS - A multi-level non-volatile memory device programs cells in each row in a manner that takes into account the coupling from the programming of cells that are proximate the row to be programmed. In one example of the invention, after the row has been programmed, the proximate cells are verified by read, comparison, and, if necessary, reprogramming operations to compensate for charge added to proximate memory cells resulting from programming the row. In another example of the invention, a row of memory cells is programmed with charge levels that take into account the charge that will be added to the memory cells when proximate memory cells are subsequently programmed. | 2012-04-05 |
20120081968 | N WELL IMPLANTS TO SEPARATE BLOCKS IN A FLASH MEMORY DEVICE - A semiconductor memory device that has an isolated area formed from one conductivity and formed in part by a buried layer of a second conductivity that is implanted in a substrate. The walls of the isolated area are formed by implants that are formed from the second conductivity and extend down to the buried layer. The isolated region has implanted source lines and is further subdivided by overlay strips of the second conductivity that extend substantially down to the buried layer. Each isolation region can contain one or more blocks of memory cells. | 2012-04-05 |
20120081969 | PROGRAMMING METHOD FOR NON-VOLATILE MEMORY DEVICE - A method of programming a nonvolatile memory device comprises applying positive pulses and negative pulses simultaneously to a memory cell array to program at least one memory cell included in the memory cell array. | 2012-04-05 |
20120081970 | SEMICONDUCTOR MEMORY APPARATUS AND PROGRAM VERIFICATION METHOD - A non-volatile memory apparatus includes a memory cell array, a power supply configured to generate an operation voltage according to an operation mode and provide the memory cell array with the operation voltage, and a controller configured to provide the memory cell array with a first verification voltage and a second verification voltage in a program verification operation, detect a high speed program cell by the first verification voltage and the second verification voltage from selected memory cells to be programmed and set the high speed program cell to be in a program inhibition state, and detect a low speed program cell by the second verification voltage. | 2012-04-05 |
20120081971 | E/P DURABILITY BY USING A SUB-RANGE OF A FULL PROGRAMMING RANGE - A NAND Flash memory controller is used to perform an erase operation on a NAND Flash memory chip including to a cell on the NAND Flash memory chip; the cell is configured to store a first number of bits. It is determined whether the erase operation performed on the NAND Flash memory chip is successful. In the event it is determined that the erase operation performed on the NAND Flash memory chip is unsuccessful, the number of bits stored by the cell is reduced from the first number of bits to a second number of bits; the second number of bits is strictly less than the first number of bits. | 2012-04-05 |
20120081972 | MEMORY ARRAYS AND METHODS OF OPERATING MEMORY - Apparatus and methods for determining pass/fail condition of memories are disclosed. In at least one embodiment, a set of common lines, one for each rank of page buffers corresponding to a page, determine the pass/fail status of all connected memory cells, and the pass/fail status results for each line can be combined to determine a pass/fail for the page of memory. | 2012-04-05 |
20120081973 | METHOD AND APPARATUS FOR TIMING ADJUSTMENT - A strobe signal from a memory is delayed through delay circuits of a strobe delay selection section, thus obtaining a plurality of delayed strobe signals. A strobe latch section produces check data in synchronism with each of the delayed strobe signals, and a system latch section latches, with a system clock, check data latched by the strobe latch section. Based on a comparison by an expected value comparison section and a determination by a delay determination section, the optimal strobe signal with the optimal delay is selected from among the delayed strobe signals produced in the strobe delay selection section. Then, data from the memory is delayed through delay circuits in a data delay selection section, thus obtaining a plurality of delayed data, and the optimal data with the optimal delay is selected from among the plurality of delayed data based on the comparison by the expected value comparison section and the determination by the delay determination section. | 2012-04-05 |
20120081974 | INPUT-OUTPUT LINE SENSE AMPLIFIER HAVING ADJUSTABLE OUTPUT DRIVE CAPABILITY - An input-output line sense amplifier configured to drive input data signals over an input-output signal line to an output driver circuit, the input-output line sense amplifier having an output driver stage having a plurality of different programmable output drive capacities to tailor the output drive of the sense amplifier. | 2012-04-05 |
20120081975 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - When a leakage type determining circuit determines that leakage current components of a gate leakage and a substrate leakage are larger in a resume standby mode, a VDDR regulator generates a power supply voltage VDDR at a first voltage level lower than a power supply voltage VDD, and supplies the voltage as a power supply voltage VDDR | 2012-04-05 |
20120081976 | SEMICONDUCTOR MEMORY DEVICE HAVING AN ELECTRICALLY FLOATING BODY TRANSISTOR - A method for performing a holding operation to a semiconductor memory array having rows and columns of memory cells, includes: applying an electrical signal to buried regions of the memory cells, wherein each of the memory cells comprises a floating body region defining at least a portion of a surface of the memory cell, the floating body region having a first conductivity type; and wherein the buried region of each memory cell is located within the memory cell and located adjacent to the floating body region, the buried region having a second conductivity type. | 2012-04-05 |
20120081977 | SEMICONDUCTOR MEMORY DEVICE HAVING AN ELECTRICALLY FLOATING BODY TRANSISTOR - A method for performing a holding operation to a semiconductor memory array having rows and columns of memory cells, includes: applying an electrical signal to buried regions of the memory cells, wherein each of the memory cells comprises a floating body region defining at least a portion of a surface of the memory cell, the floating body region having a first conductivity type; and wherein the buried region of each memory cell is located within the memory cell and located adjacent to the floating body region, the buried region having a second conductivity type. | 2012-04-05 |
20120081978 | READ BOOST CIRCUIT FOR MEMORY DEVICE - A read boost circuit arranged to boost the voltage difference between a pair of complementary bit lines of a memory device during a read operation, the read boost circuit including: a first transistor adapted to be controlled by the voltage level on a first bit line of the pair of bit lines to couple a second bit line of the pair of bit lines to a first supply voltage; and a second transistor connected directly to ground and adapted to be controlled by the voltage level on the second bit line to couple the first bit line to ground. | 2012-04-05 |
20120081979 | SEMICONDUCTOR MEMORY APPARATUS - A semiconductor memory apparatus includes a first write control code generation unit configured to generate a first write control code which is updated with different cycles which have different periods, in response to a programming verification flag signal and a programming enable signal, and a data write unit configured to output a first programming current pulse with a magnitude corresponding to a code combination of the first write control code which is updated. | 2012-04-05 |
20120081980 | MEMORY - A memory including a memory cell array, a word line decoder, a first and a second reference bit line generators are provided. The memory cell array has first and last bit lines respectively disposed at two sides of the memory cell array. The word line decoder generates a pre-word line signal. The first and the second reference bit line generators respectively detect voltage level variations of the first and last bit lines according to the pre-word line signal, so as to generate a first and a second cut-back signals. The first reference bit line generator transmits the first cut-back signal to the second reference bit line generator, the second reference bit line generator transmits the first and the second cut-back signals to the word line decoder, and the word line decoder generates a word line signal according to the first and the second cut-back signals and the pre-word line signal. | 2012-04-05 |
20120081981 | NONVOLATILE MEMORY APPARATUS WITH CHANGEABLE OPERATION SPEED AND RELATED SIGNAL CONTROL METHOD - Various embodiments of a nonvolatile memory apparatus configured to operate in a first operation mode and a second operation mode are disclosed. In one exemplary embodiment, the apparatus may include: a controller configured to enable complementary signal input/output buffers in response to a command for entry into the first operation mode and disable the complementary signal input/output buffers in response to a command for transition to the second operation mode while operating under the first operation mode. | 2012-04-05 |
20120081982 | VERIFYING A DATA PATH IN A SEMICONDUCTOR APPARATUS - A semiconductor apparatus includes a memory array configured to store write data transmitted through data transmission lines and transmit stored data to the data transmission line as read data; a data write unit configured to drive the write data to the data transmission lines in response to a data write command; and a data read unit configured to sense the read data transmitted through the data transmission lines in response to a data read command when a data verification signal is deactivated and sense the write data transmitted through the data transmission lines in response to the data write command when the data verification signal is activated. | 2012-04-05 |
20120081983 | METHOD OF PROGRAMMING, ERASING AND REPAIRING A MEMORY DEVICE - A method of programming and erasing a memory device is provided. The memory device includes first and second electrodes and a switching layer therebetween. A first on-state resistance characteristic of the memory device is provided in programming the memory device by application of a first voltage to the gate of a transistor in series with the memory device. Other on-state resistance characteristics of the memory device, different from the first on-state resistance characteristic, may be provided by application of other voltages, different from the first voltage, to the gate of the transistor. | 2012-04-05 |
20120081984 | THREE-DIMENSIONAL STACKED SEMICONDUCTOR INTEGRATED CIRCUIT - Various embodiments of a three-dimensional, stacked semiconductor integrated circuit are disclosed. In one exemplary embodiment, the circuit may include a master slice, a plurality of slave slices, and a plurality of through-silicon vias for connecting the master slice to the plurality of slave slices. At least one of the plurality of through-silicon vias may be configured to transmit an operation control signal from the master slice to the plurality of slave slices. The at least one of the plurality of through-silicon vias is configured to be shared by the plurality of slave slices. | 2012-04-05 |
20120081985 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus includes: odd and even sub word line driving units configured to selectively drive odd sub word lines and even sub word lines among a plurality of sub word lines; a bit line sense amplifier including a plurality of sense amplifier driving lines which are electrically connected with bit lines; a first sense amplifier driving unit formed on one side of the bit line sense amplifier which extends in the same direction as the bit lines, and configured to drive odd sense amplifier driving lines among the plurality of sense amplifier driving lines; and a second sense amplifier driving unit formed on another side of the bit line sense amplifier which extends in the same direction as the bit lines, and configured to drive even sense amplifier driving lines among the plurality of sense amplifier driving lines according to driving of the even sub word lines. | 2012-04-05 |
20120081986 | Semiconductor Devices, Operating Methods Thereof, And Memory Systems Including The Same - At least one example embodiment discloses a semiconductor device. The semiconductor device includes a first sense amplifier selectively connected between a first bit line and a second bit line, a second sense amplifier selectively connected between the first bit line and the second bit line, a first power supply circuit configured to provide a power supply voltage to the first sense amplifier in response to a first control signal, a second power supply circuit configured to provide a ground voltage to the second sense amplifier in response to a second control signal, and a switching circuit configured to selectively connect the first power supply circuit with the second power supply circuit in response to a third control signal. | 2012-04-05 |
20120081987 | SUPPLY VOLTAGE DISTRIBUTION SYSTEM WITH REDUCED RESISTANCE FOR SEMICONDUCTOR DEVICES - A supply voltage distribution system for distributing a supply voltage through a semiconductor device, the supply voltage distribution system comprising:
| 2012-04-05 |
20120081988 | SEMICONDUCTOR CIRCUIT AND SEMICONDUCTOR SYSTEM - A semiconductor circuit includes a data driving circuit configured to change a slew rate in response to a control signal and drive data at a changed slew rate, a core/peripheral circuit block configured to provide the data to the data driving circuit, and a channel/memory module information setting unit configured to set the control signal according to channel/memory module information. | 2012-04-05 |
20120081989 | APPARATUS AND METHOD FOR PLASTIC EXTRUSION - An object of the invention is to improve capacity of process and not require a vent portion by an upper polygonal groove and a transition portion provided to a transport cylinder. | 2012-04-05 |
20120081990 | STIRRING ROTOR AND STIRRING DEVICE | 2012-04-05 |
20120081991 | PISTON AND A CONTAINER WITH SUCH A PISTON - The invention relates to a piston ( | 2012-04-05 |
20120081992 | STAND MIXER WIPING BEATER - A mixing beater for a small appliance includes a metallic frame including an arm; a rigid plastic shell extending over the arm; and only one scraper. The scraper extends over the rigid plastic shell and has a flexible blade configured to contact an inner surface of a mixing bowl when viewed in a first plane. | 2012-04-05 |
20120081993 | STAND MIXER WIPING BEATER WITH ADDITIONAL FEATURES - A mixing beater for a stand mixer includes a metallic frame having an arm, a plastic shell extending over the arm, and a scraper that extends over the plastic shell. The scraper has a wiping blade configured to contact an inner surface of a mixing bowl of the stand mixer. | 2012-04-05 |
20120081994 | Seismic Streamer Connection Unit - An apparatus includes a streamer cable section and a unit. The streamer cable section includes an associated group of seismic sensors. The unit connects to an end of the streamer cable section and includes a steering device, a controller, a network repeater and a router. The steering device is controllable to position the streamer section; the controller gathers seismic data provided by the associated group of seismic sensors and introduces the seismic data to a telemetry network of a streamer; the network repeater repeats a signal communicated along the telemetry network; and the router is disposed between the controller and the telemetry network. | 2012-04-05 |
20120081995 | COMBINED ELECTROMAGNETIC AND SEISMIC ACQUISITION SYSTEM AND METHOD - A method for marine geophysical surveying according to one aspect of the invention includes towing at least one geophysical sensor streamer in a body of water. The streamer includes a plurality of spaced apart electromagnetic field receivers disposed at spaced apart locations along the streamer. The streamer also includes a plurality of seismic sensors disposed at spaced apart locations. The seismic sensors each include at least one pressure responsive receiver and at least one particle motion responsive receiver. At selected times, a seismic energy source is actuated in the water. Particle motion and pressure seismic signals, and electromagnetic field signals are detected at the respective receivers. | 2012-04-05 |
20120081996 | Determining Sea Conditions in Marine Seismic Spreads - According to one or more aspects of the invention, a marine seismic survey method comprises towing at least two streamers below a sea surface forming a survey spread, each streamer comprising a survey sensor and a profiler; and at each profiler, emitting an acoustic signal; recording an echo of the emitted signal at the profiler; and determining a parameter from the recorded echo, the parameter comprising at least one selected from the group of a distance between the profiler and the sea surface, a water current vector and a sea surface slope. | 2012-04-05 |
20120081997 | Marine Vibrator with Improved Seal - A marine vibrator with improved seal is described. The marine vibrator includes a housing and piston within the housing for generating vibratory signals. The improved seal is comprised of a two-stage seal having a first seal disposed adjacent the water interface and a second seal disposed away from the water interface, thus improving the reliability of the marine vibrator. | 2012-04-05 |
20120081998 | Method for Offset Timing of Simultaneous Seismic Source Firing - A technique enables measuring of the actual firing sequence times in a seismic survey application. The actual firing sequence times are then employed in simultaneous source resolution methods. For example, simultaneous seismic sources may be deployed in a survey region. The seismic sources are then fired, and the actual firing times are determined and recorded for use in optimizing the seismic survey. | 2012-04-05 |
20120081999 | Interferometric Seismic Data Processing for a Towed Marine Survey - A method for processing seismic data. The method includes receiving the seismic data acquired at two or more sensors on a towed marine survey and regularizing the received seismic data into a spatial domain. After regularizing the seismic data, the method includes classifying the regularized seismic data below and equal to a predetermined frequency as low-frequency seismic data. The method then calculates a set of low-frequency Green's functions using interferometry on the low-frequency seismic data described above. The method then processes high-frequency seismic data of the seismic data to create a set of high-frequency Green's functions at one or more source locations of the towed marine survey. After creating the set of high-frequency Green's functions, the method merges the set of low-frequency Green's functions and the set of high-frequency Green's functions to create a set of broad-band Green's functions at the source locations. | 2012-04-05 |
20120082000 | System and Technique to Suppress the Acquisition of Torque Noise on a Multi-Component Streamer - A technique includes receiving particle motion data acquired by particle motion sensors while in tow. The particle motion data are indicative of a seismic signal and a torque noise, and the particle motion sensors are oriented to modulate a wavenumber of a first component of the torque noise away from a signal cone that is associated with the seismic signal. The technique includes estimating the first component of the torque noise and based at least in part on the estimated first component, estimating a second component of the torque noise inside the signal cone. The technique includes suppressing the second component of the torque noise based at least in part on the estimated second component. | 2012-04-05 |
20120082001 | Monitoring the Quality of Particle Motion Data During a Seismic Acquisition - A technique includes acquiring particle motion data from a plurality of particle motion sensors while in tow during a seismic survey. During the seismic survey, the particle motion data are processed without deghosting the particle motion data to determine whether at least some portion of the particle motion data is inadequate for an application that relies on the particle motion data. | 2012-04-05 |
20120082002 | SINGLE STATION WIRELESS SEISMIC DATA ACQUISITION METHOD AND APPARATUS - A seismic data acquisition apparatus having a recorder co-located with a sensor unit in a seismic spread and a communication device for direct communication with a central recorder. A memory located in the recorder and/or in the central controller holds location parameters associated with the sensor unit, and the parameters can be updated. Methods of seismic data acquisition including sensing seismic energy and recording the sensed energy at the sensor location. Delivering the recorded information to a central recorder by manually retrieving removable memory from each recorder, by wireless transmission of the information, or by removing the information from each recorder by inductive or cable connectors and a transfer device. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b) | 2012-04-05 |
20120082003 | Apparatus and Method for Reducing Noise in Seismic Data - A method of acquiring seismic data. The method includes receiving seismic signals at one or more sensors; sampling the received seismic signals into a plurality of samples, compressing at least some of the samples in selected packets before arranging the compressed samples into packets; arranging the samples into a plurality of packets; computing packet efficiency for a packet of the plurality of packets; transmitting the plurality of packets by varying time intervals between transmissions of the packets. | 2012-04-05 |
20120082004 | Method and System for Sensing Objects in a Scene Using Transducers Arrays and in Coherent Wideband Ultrasound Pulses - Pulses are transmitted into a scene by an array of the transducers, wherein each pulse has wideband ultrasound frequency, wherein the pulses are transmitted simultaneously, and wherein a pattern of the wideband ultrasound frequencies in each pulse is unique with respect to the patterns of each other pulse. The pulses as received when the pulse are reflected by the scene and objects in the scene. Each received pulse is sampled and decomposed using a Fourier transform to produce frequency coefficients, which are stacked to produce a linear system modeling a reflectivity of the scene and the objects. Then, a recovery method is applied to the linear system to recover the reflectivity of the scene and the objects. | 2012-04-05 |
20120082005 | MINER ACOUSTIC COMMUNICATION AND LOCATION SYSTEM - A miner communication and locating system is disclosed. Two technologies used in the system include a communicator, and a locator array that may be used with a computer. The communicator portion allows trapped miners to continually signal without physical effort that they have survived a cave-in or explosion in a direct, mechanical, and reliable manner. The locator array receives the communicator signal for use to accurately identify where the survivors are underground, and facilitate their rescue; a computer can be used to calculate the position of the communicator from information provided by a plurality of locators: global positioning system receivers may be used with the locator array. | 2012-04-05 |
20120082006 | SELF CALIBRATING SHOOTER ESTIMATION - Disclosed are systems and methods that can be used to detect shooters. The systems and methods described herein use arrival times of a shockwave, produced by a shot, at a plurality of sensors to assign weights to each of the plurality of sensors, and determine a shot trajectory based on the assigned weights. | 2012-04-05 |
20120082007 | LASER DETECTION AND TIMING METHOD AND APPARATUS - Timing apparatus which may be in the form of a stop watch and which includes a laser beam transmitter for transmitting a laser beam and a detector for detecting a reflected laser beam reflected from objects for example runners intercepting the transmitted beam. The apparatus includes a processor for calculating elapsed time of movement of the runners and their finishing order from the reflected signals received by the detector. | 2012-04-05 |
20120082008 | Low Power Radio Controlled Clock Incorporating Independent Timing Corrections - A timekeeping device that tracks the time provided by a digital broadcast and the protocol of that broadcast, defined by its data frame structure and modulation scheme, are adapted to allow for superior performance of the timekeeping devices in terms of range of operation, immunity to interference, ability to operate with lower cost antennas due to enhanced link robustness, and reduced energy consumption. The timekeeping device operates with infrequent receptions of the broadcast by relying on independent self-compensation. This alleviates the need for frequent receptions to ensure timing accuracy while reducing energy consumption. The mean and variability of successive measurements of timing drift are evaluated and an estimated upper bound for the drift-estimation error is set. Based on this bound, the device employs a reception strategy that relies on less frequent receptions, corresponding to the error in estimating the drift rather than to the magnitude of the drift itself | 2012-04-05 |
20120082009 | TIMEPIECE - This timepiece comprises a movement with a diameter of less than 40 mm which comprises a barrel ( | 2012-04-05 |
20120082010 | SPIRAL-SPRING BALANCE WHEEL REGULATING MEMBER - This spiral-spring and balance wheel regulating member includes a shaft mounted pivotably on the frame of a timepiece. The spiral spring includes at least one blade, whose inner end is designed to be fixed to the pivot shaft and whose outer end is made in one piece with a member ( | 2012-04-05 |
20120082011 | WATCH WINDER HAVING WIRELESS ENERGY TRANSFERRING FUNCTION - A watch winder includes a housing, a power supply disposed in the housing, a transmitter coil mounted at one side of the housing and electrically connected with a circuit board of the power supply, and a receiver coil mounted at another side of the housing and electrically connected with a circuit board of the power supply. The fist coil can be actuated by the power supply to transmit a signal, and the receiver coil can be used to receive a signal and convert the signal into an electrical current that can be transmitted to the circuit board for charging the power supply. Therefore, the electrical energy of the watch winder can be wireless transmitted through a non-contact interface. | 2012-04-05 |
20120082012 | TIMEPIECE WITH SPECIAL AESTHETIC EFFECTS - A timepiece which, in addition to a crystal, includes the following external elements: a back cover, a middle part, a dial, a bezel, and two wristband strands. At least one of these external elements is at least partially transparent or translucent. The back cover, the middle part, and the bezel define an internal volume of the watch case that houses a timepiece movement. At least one light source is housed within the internal volume and produces a light that passes through the transparent or translucent part of the external element. | 2012-04-05 |
20120082013 | Accelerometer-Based Control of Wearable Devices - Accelerometer-based detection for controlling audio-reporting watches, resulting in button-free operation. A wristwatch can use an accelerometer to detect the orientation and/or movement of a user's wrist and subsequently activate audio time reporting, without requiring the user to find and lush a small button. For example, a talking wristwatch can use this method to automatically report the time whenever a user moves or orients his or her wrist to a natural position for listening. A position such as that in close proximity to the ear can additionally facilitate private listening without disturbing others. Furthermore, the wristwatch can report time using personalized audio time components that the user has previously recorded, so that reporting is in a custom voice or language. In such applications, accelerometer-based control of audio-reporting watches offers significant advantages over conventional means of control, particularly in terms of ease of use and durability. | 2012-04-05 |
20120082014 | WRIST WORN DEVICE - A wrist worn device is provided. The wrist worn device includes a case, a back cover, a strap, and two spring pins. The case includes two pairs of spaced lugs. Each of the spaced lugs defines an axle hole. The back cover includes two opposite sidewalls. Each of the sidewalls defines a groove. The strap defines two through holes. Each of the through holes is adjacent to one of the opposite ends thereof. The strap includes two projections. Each of the projections protrudes from one of two opposite ends of the strap and is received in one of the grooves. Each of the spring pins extends through one of the through holes of the strap, and includes two telescoping axles. Each of the axles is received in one of the axle holes. | 2012-04-05 |
20120082015 | THERMALLY-ASSISTED RECORDING (TAR) PATTERNED-MEDIA DISK DRIVE WITH OPTICAL DETECTION OF WRITE SYNCHRONIZATION AND SERVO FIELDS - A thermally-assisted recording (TAR) bit-patterned-media (BPM) magnetic recording disk drive uses optical detection of synchronization fields for write synchronization and optical detection of servo sectors for read/write head positioning. The synchronization fields and servo sectors extend generally radially across the data tracks and are patterned into discrete nondata blocks separated by gaps in the along-the-track direction. A near-field transducer (NFT) directs laser radiation to the disk and generates a power absorption profile on the disk that has a characteristic along-the-track spot size less than the along-the-track length of the gaps between the nondata blocks in the synchronization fields and servo sectors. A sensor provides an output signal in response to radiation from the nondata blocks and gaps in the synchronization fields and servo sectors as the disk rotates to control the timing of the magnetic write field applied to the data islands and to control the positioning of the read/write head on the data tracks. | 2012-04-05 |
20120082016 | OPTICAL WAVEGUIDE AND THERMALLY-ASSISTED MAGNETIC RECORDING HEAD THEREWITH - An optical waveguide of the invention includes a core that is a waveguide through which light propagates; and a cladding that surrounds the core. The core has a plate shape and includes a wide core base part onto which the light is incident, a taper part that is connected to the core base part and of which a width is gradually tapered along a propagation direction, and a narrow front end core part that is connected to the taper part and that extends along the propagation direction. A grating is provided on one of planar surfaces of the wide core base part, the grating is formed by engraving a number of concave grooves having a rectangular cross section on the planar surface along a width direction thereof, the grating is formed to be optically coupled with laser light that is incident perpendicularly onto the grating formation surface, a frequency (grating pitch: pitch of the concave grooves) of the grating is smaller than a wavelength (defined as a wavelength in the cladding) of the perpendicularly incident laser light, and a groove depth H | 2012-04-05 |
20120082017 | STORAGE REGION PROVIDING DEVICE, STORAGE REGION PROVIDING METHOD, AND RECORDING MEDIUM - A storage region providing device provides a physical storage region (a physical region) as a virtual storage region (a logical region). The device accepts a writing request including data and information for specifying a partial logical region that is part of the logical region. In a case that part of the physical region is not allocated yet to a partial logical region specified by a writing request, the device allocates at least part of an initial allocation region of the physical allocation region to the partial logical region. The device moves data stored in the partial physical region included in the initial allocation region, to a movement destination region that is at least part of a reallocation region other than the initial allocation region of the physical region, and reallocates the movement destination region to the partial logical region. | 2012-04-05 |
20120082018 | OPTICAL DISC RECORDING DEVICE AND RECORDING SIGNAL GENERATING DEVICE - Provided are an optical disc recording device and a recording signal generating device which enable to correct displacement between a reproducing position of a reproduction signal from a concave-convex mark preformed in an optical disc, and a recording position of second information to be recorded in synchronism with the reproduction signal, and stably and speedily record the second information. A digital signal processor ( | 2012-04-05 |
20120082019 | INFORMATION RECORDING DEVICE, INFORMATION RECORDING METHOD, AND ELECTRONIC APPARATUS - An information recording device includes: a magnetic disk; an identify module; and a record module. The magnetic disk includes information tracks for recording information by a shingle recording method and an alternate track including an alternate sector for recording alternate information. The identify module is configured to identify a track group including the information tracks that includes update sectors for updating information and a defective sector. The record module is configured to perform recording for updating information on the identified track group without updating the alternate information of the alternate sector corresponding to the defective sector. | 2012-04-05 |
20120082020 | OPTICAL PICKUP DEVICE - An astigmatism element converges laser light in first and second directions to generate focal lines. A spectral element makes propagating directions of light fluxes entered into first through fourth areas different from each other to disperse the four light fluxes from each other. The direction along which the first and second areas are aligned is in parallel to a direction of a track image of a recording medium projected onto the spectral element. Each of the first and second areas has a surface area larger than a surface area of each of the third and fourth areas, and a boundary portion between the first and second areas, and the third and fourth areas includes a straight portion extending in a direction perpendicular to the direction of the track image. | 2012-04-05 |
20120082021 | OPTICAL PICKUP DEVICE - An optical pickup device, an optical drive using the same, and a method of forming a beam spot are provided. The optical pickup includes a light source system that includes a light source corresponding to at least one of a digital versatile disc (DVD) and a Blu-ray disc (BD). The light source forms a beam spot having an oval shape with a long axis and a short axis on an information recording track of the disc, and the light source is disposed such that the long axis is maintained at an angle ranging from 0° to 30° with respect to a radial direction passing through a rotation center of the disc. | 2012-04-05 |
20120082022 | METHOD AND APPARATUS FOR INFERRING USER EQUIPMENT INTERFERENCE SUPPRESSION CAPABILITY FROM MEASUREMENTS REPORT - UE that are able to cancel interference from CRS, a PDSCH, a PDCCH, or a PCFICH may do so without explicitly signaling the capability to the serving eNB. The serving eNB may transmit to the UE a plurality of cell identifiers to indicate from which cells interference should be canceled. The UE receives CRS, PDSCH, PDCCH, or PCFICH from the serving eNB and cancels CRS, PDSCH, PDCCH, or PCFICH interference, respectively from the signal received from the eNB. The UE cancels the interference from the cells that correspond to the cell identifiers. The UE may then transmit a report to the eNB with a quality measurement without the interference. | 2012-04-05 |
20120082023 | CODE MULTIPLEXING TRANSMISSION METHOD, TRANSMISSION APPARATUS AND RECEPTION APPARATUS - To obtain a high frequency diversity effect while suppressing inter-code interference in code multiplexing transmission in an OFDM-based radio access scheme, a transmission apparatus is provided with an orthogonal spreading code generating section ( | 2012-04-05 |
20120082024 | CONVERTER FOR PERFECT DESPREADING OF ORTHOGONAL CDMA SEQUENCES - The invention comprises a method for de-spreading of a data signal spread with a spread spectrum sequence. The invention is especially suited for the improvement of correlations of spread data signals after transmission. Therefor it can be integrated as software or hardware module into existing transmission systems. The method comprises the formation of a time-reversed spread data signal from the spread data signal, the formation of a sequence which arises through alternating multiplication of the chips of the spread data signal from the spread data signal, and the sequence of the time-reversed spread data signal, which arises from the time-reversed data signal through alternating multiplication of the chips by +1 and −1, the correlation of the spread data signal with the spread spectrum signal, of the time-reversed spread data signal with the time-reversed spread spectrum signal, of the spread data signal multiplied by the +1, −1 sequence with the spread spectrum sequence multiplied by the +1, −1 sequence and of the time-reversed spread data signal multiplied by the +1, −1 sequence with the time-reversed spread spectrum sequence multiplied by the +1, −1 sequence, and the summation of the four correlations. | 2012-04-05 |
20120082025 | PROTECTING MULTI-SEGMENT PSEUDOWIRES - The protection of multi-segment pseudowires by utilizing backup paths is disclosed herein. Disclosed embodiments include methods that establish at least one backup path for multi-segment pseudowires, the establishing being performed prior to detection of failure in the primary path. Upon detecting a path failure, the detected failure is signaled to the head-end, a backup path is chosen, and reachability information associated with the chosen backup path is signaled across the backup path before reverse traffic is switched to the backup path. In other disclosed embodiments, apparatus are configured to establish, prior to detection of failure in the primary path, at least one backup path for the multi-segment pseudowire. | 2012-04-05 |
20120082026 | APPARATUS AND METHOD FOR PROTECTION SWITCHING FOR MESH TOPOLOGY - Provided are a shared mesh protection switching apparatus and method. The shared mesh protection switching apparatus includes a plurality of linear protection switching processors allocated to the linear protection domains respectively and configured to provide a switching report signal in response to fault occurrence in the corresponding linear protection domains or a linear protection switching operation, and perform a function of limiting use of the shared section in response to a provided lock signal, and a mesh protection switching processor configured to select at least one linear protection domain to be limited in use of the network resources of the shared section according to a predetermined reference when the switching report signal is provided and provide the lock signal to a linear protection switching processor corresponding to the at least one selected linear protection domain. | 2012-04-05 |
20120082027 | Determining Optimum Delivery Conditions Associated with a Restoration Plan in a Communication Network - Technologies for determining optimum delivery conditions associated with a restoration plan that addresses potentially troubled nodes are generally disclosed. | 2012-04-05 |
20120082028 | METHOD FOR CONTROLLING LOAD, BASE STATION AND MANAGEMENT DEVICE - A method for controlling a load in a base station device, including: receiving load information from another base station; receiving, from the other base station, admission information that indicates that an admission of a process request for the other base station to perform a first process is permitted or rejected; storing history information in which the received load information is associated with the admission information; and determining, on the basis of load information newly received from the other base station and the stored history information, whether to request the other base station to perform a second process that causes a load that is equivalent to or lower than the first process. | 2012-04-05 |
20120082029 | Method of Handling APN Based Congestion Control and Related Communication Device - A method of initiating a service with an access point name (APN) of a wireless communication system for a mobile device in the wireless communication system is disclosed. The mobile device has a plurality of connections with the APN. The method comprises disconnecting at least one first connection of the plurality of connections from the APN, wherein the mobile device keeps at least one second connection of the plurality of connections connected; and initiating the service with the APN, after disconnecting the at least one first connection from the APN; wherein the APN is congested or overloaded. | 2012-04-05 |
20120082030 | PACKET RETRANSMISSION CONTROL SYSTEM, PACKET RETRANSMISSION CONTROL METHOD AND RETRANSMISSION CONTROL PROGRAM - A packet retransmission control system includes an application processing module on which an application for executing communication processing operates, a retransmission control determination module which determines whether to execute high-speed retransmission control by a lower layer based on a predetermined rule with respect to a packet whose sending is requested by the application processing module, a packet processing branching module which allocates a packet determined to be subjected to high-speed retransmission control and a packet determined not to be subjected to high-speed retransmission control, an MAC retransmission control module which executes retransmission control of a transmission packet by a retransmission time-out shorter in time than a protocol of a transport layer with respect to a packet determined to be subjected to high-speed retransmission control, and an external output module which externally outputs a packet sent from the MAC retransmission control module or the packet processing branching module. | 2012-04-05 |
20120082031 | DISTRIBUTED ADMISSION CONTROL - A first network client requests initiation of a data transfer with a second network client. An admission control facility (ACF) responds to the initiation request by performing admission analysis to determine whether to initiate the data transfer. The ACF sends one or more packets to the second network client. In response, the second network client sends acknowledgment packets back to the ACF. The ACF performs admission analysis based on the packets sent and the acknowledgment packets, and determines whether the data transfer should be initiated based on the analysis. The admission analysis may be based on a variety of factors, such as the average time to receive an acknowledgment for each packet, the variance of the time to receive an acknowledgment for each packet, a combination of these factors, or a combination of these and other factors. | 2012-04-05 |
20120082032 | Method, Apparatus, and System for Triggering Resource Configuration - A method, apparatus, and system for triggering resource configuration are disclosed. The method includes: if user equipment (UE) in Cell_Paging Channel (Cell_PCH) state figures out that the total amount of buffer occupancy at the radio link control (RLC) layer or the Transport Channel Traffic Volume is larger than configured threshold, the UE carries an indication in a MEASUREMENT REPORT message and transmit the message to the network side, wherein the indication is used to trigger the network side to configure resources for the UE. With the present invention, the resource configuration is quickly triggered, and the delay of the UE in the data transmission is minimized. | 2012-04-05 |
20120082033 | DYNAMIC CONTROL OF AIR INTERFACE THROUGHPUT - A method and network node for dynamically controlling throughput over an air interface between a mobile terminal and a radio telecommunication system. The method detects a type of service being utilized by the mobile terminal, and dynamically selects a target delay for the traffic between a base station and the mobile terminal. The detecting may be done by a Deep Packet Inspection (DPI) engine implemented in a core network node such as a Gateway GPRS Support Node (GGSN). When the mobile terminal activates a delay-sensitive service, the target delay is dynamically changed to a smaller value to reduce latency. When the mobile terminal deactivates all delay-sensitive services, the target delay is dynamically changed to a larger value to increase throughput. | 2012-04-05 |
20120082034 | DYNAMIC TE-LSP PRIORITY AND PREEMPTION - In one embodiment, a node of a computer network receives a request to establish a traffic engineering (TE) label switched path (LSP). The node accesses a pre-defined range of preemption-priority values that may be used with the requested TE-LSP. The node determines a preemption-priority value at which adequate network resources to accommodate the requested TE-LSP would be available that is as low as possible within the pre-defined range of preemption-priority values. The node signals the requested TE-LSP with the determined preemption-priority value. The node receives notifications from one or more other nodes within the computer network indicating information about other TE-LSPs that would be preempted if the requested TE-LSP were established at the determined preemption-priority value. In response to the information regarding other TE-LSPs that would be preempted, the node determines whether to proceed with establishment of the requested TE-LSP at the determined preemption-priority value. | 2012-04-05 |
20120082035 | METHOD AND SYSTEM FOR INCREASING THROUGHPUT IN A HIERARCHICAL WIRELESS NETWORK - A method and system for increasing throughput in a hierarchical wireless network is described. The hierarchical wireless network includes a plurality of nodes and each of the plurality of nodes has a primary path to the root node. First, one or more channels from a plurality of available channels are allocated to each disjoint sub-tree associated with the root node. Then, alternate one or more disjoint paths from at least one node in the plurality of nodes to the root node through alternate disjoint sub-trees associated with the root node are determined. Next, data from the at least one node is sent to the root node through a primary path and one or more alternate disjoint paths | 2012-04-05 |
20120082036 | WIRELESS SENSOR NETWORKS - A method of allocating resources in a wireless sensor network, the network having functions including medical monitoring of a patient using multiple network devices having sensors, the method including steps of: sensing, by a network device in the network, a life parameter of the patient; recognising the existence of an emergency condition with respect to the parameter; the network device sending a request for streaming towards a coordinator of the network; the coordinator receiving (S | 2012-04-05 |
20120082037 | METHOD AND APPARATUS FOR PAGING GROUP HANDLING - A method and apparatus for paging group handling includes grouping wireless transmit/receive units (WTRUs) into a paging group. The paging group is assigned a paging occasion, and an existence of a page is indicated to the WTRUs. | 2012-04-05 |
20120082038 | ENABLING COEXISTENCE BETWEEN FDD AND TDD WIRELESS NETWORKS - Systems and methods for detecting and mitigating interference between from a wireless time division duplex (TDD) communications device and a wireless frequency division duplex (FDD) communications device includes processing quality-indicator reports received from the FDD device to determine if the FDD device has experienced interference from the TDD device. Such interference may be mitigated by adjusting a downlink configuration of the FDD base station in communication with the FDD device. To detect and mitigate interference from an FDD device to a TDD device, it is determined if a monitored value of an operational parameter of the FDD device is within a fixed range of a maximum value of the operational parameter, and if so, a specific time interval or frequency of the FDD device is assigned for communication purposes. Similar interference detection and mitigation techniques may also be used for interference scenarios between two TDD systems including TDD devices. | 2012-04-05 |
20120082039 | METHODS AND APPARATUS FOR PROVIDING DIRECTIONAL INFORMATION FOR PEER DISCOVERY IN PEER-TO-PEER WIRELESS NETWORKS - Methods and apparatus for operating a local device to discover proximal information is disclosed. The method includes receiving a signal from a remote device, determining an identification and a relative bearing of the remote device based on the signal and displaying the identification and the relative bearing of the remote device. The apparatus for operating a local device to discover proximal information includes a processor configured to receive a signal from a remote device and determine an identification and a relative bearing of the remote device based on the signal and a display coupled to the processor, the display configured to display the identification and the relative bearing of the remote device. | 2012-04-05 |
20120082040 | METHOD AND APPARATUS FOR COLLISION DETECTION IN WIDER BANDWIDTH OPERATION - Embodiments of systems and methods for providing collision detection in a wider bandwidth are generally described herein. Other embodiments may be described and claimed. | 2012-04-05 |
20120082041 | POWER HEADROOM REPORTING - Systems, methods, apparatuses, and computer program products are described for power headroom reporting. A mobile device may identify a transmit power associated with each of a number of independently power controlled channels on one or multiple carriers configured for use by the mobile device. The transmit power may relate to one channel that is an uplink control channel, and one or more additional channels that are uplink shared channels. The identified transmit power of one channel (e.g., the uplink control channel) may be a virtual transmit power, while other identified transmit powers may be measured transmit powers for actual transmissions. The identified transmit powers may be added up, and the power headroom available for the mobile device may be calculated using the accumulated transmit powers. The mobile device may transmit a power headroom report to a base station. | 2012-04-05 |