Class / Patent application number | Description | Number of patent applications / Date published |
702124000 | Signal generation or waveform shaping | 39 |
20080228426 | SYNTHESIS AND GENERATION OF ARBITRARY WAVEFORMS WITH ISI COMPONENTS FOR JITTER TOLERANCE - An Arbitrary Waveform Generator has a controller programmed to generate a sequence of test waveforms using previously-defined waveform data files. The controller generates this series of test waveforms by direct synthesis to cause said each waveform to contain a respective different predetermined amount of Rj, Sj and ISI jitter components. In this way, the Arbitrary Waveform Generator produces a sequence of waveforms incorporating varying amounts of ISI to sweep said ISI jitter components from a an initial amount of ISI, for example, zero ISI, and continually increment said amount of ISI to a full unit interval of ISI in predetermined increments, for example, 0.1 UI steps. | 09-18-2008 |
20080234969 | TEST APPARATUS AND ELECTRONIC DEVICE - There is provided a test apparatus for testing a device under test. The test apparatus includes first and second period generators that respectively generate test period signals indicating test periods for testing the device under test, a plurality of input/output sections that are provided in correspondence with a plurality of terminals of the device under test, wherein each of the plurality of input/output sections, in accordance with a test period supplied thereto, outputs a test signal to a corresponding one of the plurality of terminals and receives an output signal output from the corresponding terminal, and a plurality of selecting sections that are provided in correspondence with the plurality of input/output sections, wherein each of the plurality of selecting sections selects one of the test period signals generated by the first and second period generators so as to be supplied to a corresponding one of the plurality of input/output sections. | 09-25-2008 |
20080281549 | Test Apparatus for Control Unit, Pattern Signal Creating Apparatus, and Test Program Generating Apparatus - An apparatus for assisting the creation of a test program, to be run on a simulator that automatically tests an electronic unit, to thereby reduce the number of preparatory steps and enhance the reliability of the automatic testing. The apparatus is a test apparatus including: a simulating unit for simulating a target to be controlled by a control unit; and a testing unit for testing the operation of the control unit based on a relationship between a pattern signal input to the control unit and an output signal output from the simulating unit in response to the pattern signal, wherein the testing unit tests the operation of the control unit at predetermined timing and, if a decision is not obtained that the control unit is operating properly, retries the decision a predetermined number of times. | 11-13-2008 |
20090006024 | ELECTROMAGNETIC EMISSIONS STIMULATION AND DETECTION SYSTEM - A system and method for detecting and identifying electronic devices based on their unintended electromagnetic emissions (“UEE”) signals is presented. During device classification, UEE signals are measured from a plurality of test devices and characteristic data is obtained from the UEE signal emitted from each test device. Using the characteristic data, a threshold value and ideal pulse template can be determined for each test device and stored in a memory. An ideal stimulation signal is also determined for each test device and stored in the memory. During device detection, the ideal stimulation signal is applied to the environment in which a target device is suspected of being located. Stimulated UEE signals are measured from the target device and processed. The processed measurement data is compared to stored power threshold values and ideal pulse templates to determine if the target device is present. | 01-01-2009 |
20090043528 | TESTING APPARATUS AND TESTING METHOD - Provided is a test apparatus that tests a device under test that outputs a plurality of modulated signals modulated with carrier signals having frequencies identical to each other, including a synthesizing section that synthesizes the plurality of modulated signals to output a synthesized signal; an AD converting section that samples the synthesized signal to output a digital signal corresponding to the synthesized signal; and a judging section that judges acceptability of the plurality of modulated signals output by the device under test, based on the digital signal. | 02-12-2009 |
20090105983 | TEST DEFINER, A METHOD OF AUTOMATICALLY DETERMINING AND REPRESENTING FUNCTIONAL TESTS FOR A PCB HAVING ANALOG COMPONENTS AND A TEST SYSTEM - A test definer, a method for automatically determining functional tests for a printed circuit board (PCB) having analog components and a test system. In one embodiment, the test definer includes: (1) a circuit builder configured to generate a representative circuit of the PCB based on schematic information thereof, (2) a circuit organizer configured to partition the representative circuit into testable sub-circuits and (3) a specification generator configured to automatically determine functionality tests for the PCB based on the sub-circuits, obtain expected values from the functionality tests and generate platform-independent specifications representing the functionality tests and the expected values. | 04-23-2009 |
20090204357 | WAVEFORM GENERATOR, WAVEFORM GENERATION APPARATUS, TEST APPARATUS AND COMPUTER READABLE MEDIUM - Provided is a waveform generating apparatus that generates analog signal based on fundamental waveform data including a predetermined number of samples, including: phase difference calculating section that calculates phase difference between the initial phase and final phase of a signal resulting from FSK-modulating, based on first set of modulation frequencies, input data sequence to be modulated onto a signal that the waveform generating apparatus generates; frequency calculating section that calculates correction frequency corresponding to quotient of dividing, by the predetermined number of samples, residue of dividing the phase difference by 2π; waveform producing section that produces fundamental waveform data representing a waveform corresponding to a signal resulting from FSK-modulating the input data sequence based on second set of modulation frequencies obtained by subtracting the correction frequency from the modulation frequencies in the first set; and output section that outputs a signal repeating the waveform represented by the fundamental waveform data. | 08-13-2009 |
20100070232 | METHOD AND SYSTEM FOR GENERATING AN INTEGRATED CIRCUIT CHIP FACILITY WAVEFORM FROM A SERIES OF CHIP SNAPSHOTS - Methods and corresponding test systems for generating a chip facility waveform from a series of chip snapshots. The methods including, (i) testing an integrated chip multiple times, each time increasing a clockstop delay delaying a clockstop generated by triggered error condition each time determining the state of state holding elements of the integrated circuit and (ii) testing an integrated circuit chip one time to generate a error condition and determining multiple times the states of state holding elements of the integrated circuit based on previous states of the state holding elements. | 03-18-2010 |
20100211348 | Method and apparatus for locating a fault in an electrical conductor, with interference compensation - A voltage pulse is transmitted into a test object, and returned reflection pulses are evaluated to determine the location of a fault in the test object. The return signal includes a reflection from the fault and undesired interfering reflection pulses, which are removed or compensated-out from the return signal to produce a corrected pulse diagram. A circuit arrangement for this includes a bi-directional coupler, a separation filter, a measured signal detection circuit with two input channels, a memory storing a database, a computer processor, and a measured signal evaluation unit. A method in this regard includes a first step of measuring the input impedance of the test object, and a second step of measuring the return signal pulses, transforming the return signal to the frequency domain, compensating the frequency domain data to remove interference, transforming the data back to the time domain, and representing or evaluating the pulse diagram. | 08-19-2010 |
20100228515 | MULTI-FRAME TEST SIGNALS MODULATED BY DIGITAL SIGNAL COMPRISING SOURCE FOR TESTING ANALOG INTEGRATED CIRCUITS - A method of generating multi-frame test signals, a testing apparatus, and method for testing integrated circuits (ICs) with the multi-frame test signals. An analog source generates an analog source signal at a constant power and a constant frequency that is modulated with a first modulating signal (e.g., I) to output a first test signal having first signal parameters including a power level, a frequency and a modulation scheme. The modulating is repeated with a second modulating signal (e.g., Q) to output a second test signal having second signal parameters including a power level, a frequency and a modulation scheme. At least one of the first and second signal parameters are different. The modulating signals are generated by a digital signal source. The first and second test signal are combined by placing the first test signal on the first frame (frame | 09-09-2010 |
20100280787 | FEEDBACK CONTROLLER PARAMETER GENERATION WITH STABILITY MONITORING - Stability of a control system for a materials testing system using specified filter parameters is confirmed by inputting to the control system a test signal having a predetermined waveform, automatically monitoring the output of the materials testing system, and automatically comparing the output to a threshold. If the output exceeds the threshold, a first action is taken. If the output does not exceed the threshold, input of a command signal to the control system is permitted. | 11-04-2010 |
20110015891 | Digital waveform generation and measurement in automated test equipment - A waveform generation and measurement module that may be used in automated test equipment. The waveform generation and measurement module includes high speed SERDES (or other shift registers) that are used to digitally draw a test waveform. Additional high speed SERDES may also be used to receive (in serial form) a response waveform from a device under test and convert it to parallel data for high speed processing. The waveform generation and measurement module may be implemented in field programmable gate array logic. | 01-20-2011 |
20110087454 | Tap Detection - Methodology and circuitry for determining if a device, such as a cellular phone or personal digital assistant has been tapped is disclosed. The device includes an accelerometer and in response to an acceleration, the accelerometer outputs an acceleration signal. The accelerometer may continuously output an acceleration signal even if no acceleration occurs. A tap detection device receives the temporally sampled acceleration signal and takes the first derivative of the temporally sampled acceleration signal producing one or more derivative values. The tap detection system compares each derivative value to a threshold value and if the derivative value exceeds the threshold a tap is detected. By taking the derivative of the acceleration signal, the noise floor for the acceleration signal is reduced leading to more accurate results with less false positives and less positive negatives. | 04-14-2011 |
20110208471 | SYNCHRONOUS MULTI-TEMPERATURE SENSOR FOR SEMICONDUCTOR INTEGRATED CIRCUITS - A temperature sensor includes a counting signal generation unit, a counting signal decoding unit, an input reference voltage selection unit, and a latch pulse generation unit. The counting signal generation unit is configured to generate one or more counting signals in response to an oscillation signal. The counting signal decoding unit is configured to decode the one or more counting signals and to generate one or more test selection signals and an end signal. The input reference voltage selection unit is configured to output a first selection reference voltage or a second selection reference voltage as an input reference voltage in response to the one or more test selection signals. The latch pulse generation unit is configured to generate one or more latch pulses in response to the one or more test selection signals. | 08-25-2011 |
20120109568 | Apparatus and Method for Generating a Test Signal with Emulated Crosstalk - A signal generator produces a victim signal having crosstalk emulation by filtering and combining a victim signal waveform record file and an aggressor signal waveform record file generated using parameters selected by a user. A signal channel or a cascaded signal channel is characterized using one or more S-parameter arrays. The S-parameter array or arrays represent a mixed-mode multiple-port device under test. Coefficients of a NEXT filter, a FEXT filter and a forward transmission filter are derived from selected S-parameters of the S-parameter array. The aggressor signal is filtered individually by the NEXT and FEXT filters. The victim signal is summed with the filtered aggressor signal from the NEXT filter with the resulting summed signal being filtered by the forward transmission filter. The filtered signal from the forward transmission filter is summed with the filtered aggressor signal from the FEXT filter to generate a victim signal having crosstalk emulation. | 05-03-2012 |
20120283982 | Detection of Imminent Control Instability - Imminent control instability is detected in a system that applies a stimulus to an object. The system provides a parameter signal that represents a system parameter indicating oscillation of the object while the stimulus is being applied to the object. The method comprises monitoring maximum amplitude of a dominant tone in a selected frequency band of the parameter signal; and taking an action to avoid imminent control instability if the maximum amplitude persists over a specified period of time. | 11-08-2012 |
20130060508 | TEST CONDITION SETTING METHOD, CURRENT VARIATION TESTING METHOD, AND INFORMATION PROCESSING APPARATUS - A master CPU makes an execution interval b, during which CPUs are operated, common to CPUs including the master CPU and makes a stop interval a, during which the CPUs are stopped, different for each of the CPUs including the master CPU. As a result, the lengths of cycle intervals c of the CPUs constituted by the execution interval b and the stop interval a allow the ratio between the lengths of the cycle intervals c of any CPUs to be represented by two integers that are coprime to each other. Setting such lengths of the cycle intervals c of the CPUs achieves the synchronism between the shifts of all of the CPUs from a stopped state to an in-operation state and from the in-operation state to the stopped state. | 03-07-2013 |
20130158935 | Ambient Signal Identification - A method and apparatus for identifying ambient signal data in a test signal data set. A cumulative amplitude distribution of data elements is identified in the test signal data set in order by amplitude values. The data elements comprise frequency values and corresponding amplitude values. A subset of data elements from the test signal data set is identified. The subset of data elements comprises the data elements with the amplitude values greater than a first threshold value. The data elements in the subset of data elements are identified wherein a difference between the amplitude values of adjacent data elements in the cumulative amplitude distribution of data elements is greater than a second threshold value. | 06-20-2013 |
20140244205 | SYSTEMS AND METHODS FOR GENERATING AN ARTIFICIAL PHOTOPLETHYSMOGRAPH SIGNAL - A test unit may generate a pulse signal based on a pulsatile profile and a frequency modulation component of a respiratory profile. A respiration modulated signal may be generated from the pulse signal, an amplitude modulation component, and a baseline modulation component. A patient modulated signal may be generated based on the respiration modulated signal and a patient profile. The artificial PPG signal may be generated based on the patient modulated signal and an artifact profile. The artificial PPG signal may be output to an electronic device. | 08-28-2014 |
20140244206 | Sensor Systems and Methods Having Emulated Line Adaptation - A measurement system includes a signal bus, an electronic control unit, and an emulated sensor. The electronic control unit is coupled to the signal bus. The sensor with emulated line adaptation is also coupled to the signal bus. The emulated sensor is configured to adapt current consumption according to a selected impedance and a selected frequency range. | 08-28-2014 |
20150149108 | METHOD AND SYSTEM FOR GENERATION OF A STATISTICALLY SPATIALLY-UNIFORM FIELD DISTRIBUTION INSIDE A REVERBERATION CHAMBER - A method is provided for generation of statistically uniform field distribution inside a test volume of a reverberation chamber. The method includes:
| 05-28-2015 |
20150293170 | TEST AND MEASUREMENT INSTRUMENT HAVING ADVANCED TRIGGERING CAPABILITY - A test and measurement instrument, including an input configured to receive a signal-under-test, a user input configured to accept a first trigger event and a second trigger event from a user, a first trigger decoder configured to trigger on an occurrence of the first trigger event and generate a first trigger signal, a second trigger decoder configured to trigger on an occurrence of the second trigger event occurring after the first trigger event and generate a second trigger signal, and an acquisition system configured to acquire the signal-under-test in response to the first trigger signal and store the acquired signal-under-test based on whether the second trigger signal validates or invalidates the first trigger signal. | 10-15-2015 |
20150348351 | Sensor and Method for Checking Valuable Documents - The invention relates to a method and a sensor for checking a value document which is moved relative to the sensor. The sensor is arranged to detect the luminescence of the value document in two different spectral regions at the same location of detection simultaneously. The two temporal intensity patterns of the first and second luminescences detected in different spectral regions are evaluated relative to each other. This eliminates the motion effects which distort the two intensity patterns in the same or at least very similar manner. | 12-03-2015 |
20160146928 | METHOD FOR MEASURING A TRANSMISSION PATH BY MEANS OF COMPENSATING AMPLITUDE MEASUREMENT AND DELTA-SIGMA METHOD, AND DEVICE FOR IMPLEMENTING THE METHOD - A method for measuring transmission characteristics of a transmission path between a transmitter and a receiver. A first transmitter sends a first signal into a first transmission path. The first signal is detected by the receiver. A second transmitter sends a second signal into a second transmission path having known characteristics or characteristics that can be predetermined. The second signal is superimposed with the first signal. A transmission signal is intermittently distributed between the first and second transmitters in a controlled manner. The signal received by the receiver comprises first and second signal components to be assigned to the first and second transmitters, respectively. The first signal component averaged over a predefined time period essentially is exactly as large as the averaged second signal component and the deviation between the averaged signal components is at least intermittently used as control signal for the switching between the first and second transmitters. | 05-26-2016 |
702125000 | Timing signal | 15 |
20080288203 | System and method of determining the speed of digital application specific integrated circuits - According to one embodiment of the present invention, a system for identifying a running speed of an integrated circuit is provided. An asynchronous multi-rail circuit is configured to receive input data and transmit output data. A completion detection circuit is configured to generate a completion detection signal for the asynchronous multi-rail circuit. A variable clock generator configured to be driven by at least the completion detection signal. A synchronous circuit element configured to receive at least a portion of the output data and configured to be clock driven by a clock signal from the variable clock generator. A period of the clock signal represents a running speed of the asynchronous circuit. | 11-20-2008 |
20090006025 | DETECTION APPARATUS AND TEST APPARATUS - A detection apparatus is provided. The detection apparatus includes; a multi-strobe generating section that generates a plurality of strobe signals with phases different from one another; a plurality of acquiring sections each of which acquires a signal value of a signal under measurement at a timing of each of the plurality of strobe signals; a plurality of changing point detecting sections that detect a fact that there is a changing point of the signal under measurement between two adjacent strobe signals when two signal values which are acquired in accordance with the two adjacent strobe signals are different from one another; a mask setting section that sets the changing point detecting section to be enabled among the plurality of changing point detecting sections; and a changing timing output section that outputs a changing timing of the signal under measurement based on an output of the enabled changing point detecting section. | 01-01-2009 |
20090043529 | SYSTEM AND METHOD FOR TESTING AN ACCURACY OF A REAL TIME CLOCK - A method for testing an accuracy of a real time clock is provided. The method includes: applying parameters that comprise a predetermined repetition count on testing the RTC, a predetermined time period, and an acceptable error margin of the RTC; communicating with a local network time protocol (NTP) server for acquiring a system time of the local NTP server; applying a current time of the RTC according to the system time at the beginning of testing the accuracy of the RTC; acquiring the current system time of the local NTP server when the predetermined time period lapse; computing a time difference between the system time of the local NTP server and the current time of the RTC; and determining if the RTC is accurate or not by comparing the time difference and the acceptable error margin, and generating a testing result according to the determination. | 02-12-2009 |
20110054827 | TEST APPARATUS AND METHOD FOR MODULATED SIGNAL - A test apparatus tests a modulated signal under test received from a DUT. A cross timing data generating unit generates cross timing data which indicates a timing at which the level of the signal under test crosses each of multiple thresholds. An expected value data generating unit generates timing expected value data which indicates a timing at which an expected value waveform of the signal under test crosses each of the multiple thresholds when the expected value waveform is compared with each of the multiple thresholds. A timing comparison unit compares the cross timing data with the timing expected value data. | 03-03-2011 |
20110054828 | Emergency Test Control Panel Device, System and Method - Embodiments disclosed herein include a test control panel device, system, computer program product, and method for receiving a test input signal; reading a duration of the test input signal; verifying that the signal duration is a valid duration to initiate the test; initiating the test by sending a start test signal to a valve controller device; receiving signals from the valve controller device; indicating that the test control panel device has received a valve controller device signal from the valve controller device; wherein the valve controller device signal is a test acknowledgement signal. | 03-03-2011 |
20110231143 | SYSTEM AND METHOD FOR CONTROLLING TIMING OF OUTPUT SIGNALS - The timing of output signals can be controlled by coupling a digital signal through a signal distribution tree having a plurality of branches extending from an input node to respective clock inputs of a plurality of latches. A phase interpolator is included in a signal path common to all of the branches, and a respective delay line is included in each of the branches. Each of the latches couples a signal applied to its data input to an output terminal responsive to a transition of the digital signal applied to its clock input. The delay lines are adjusted so that the latches are simultaneously clocked. The delay of the phase interpolator is adjusted so that the signals are coupled to the output terminals of the latches with a predetermined timing relationship relative to signals coupled to output terminals of a second signal distribution tree. | 09-22-2011 |
20120150479 | Debug Access with Programmable Return Clock - A debug port configured to generate and provide a return clock is disclosed. In one embodiment, an integrated circuit (IC) includes one or more functional units and a debug port (DP). The DP is configured to enable access by an external debugger to the functional unit(s) of the IC for debugging purposes. The DP includes circuitry that may generate a first clock signal that is provided to the functional unit(s) during debug operations. Receiving test result data at the DP may require a return clock signal that is not provided by the functional unit(s). Accordingly, the IC may include a clock modifier coupled to receive the first clock signal. The clock modifier may generate a second clock signal based on the first, the second clock signal being provided to the DP as a return clock signal. | 06-14-2012 |
20120158348 | TIMING GENERATOR - A delay setting data generator generates delay setting data based on rate data. A variable delay circuit delays the test pattern data by a delay time determined by the delay setting data with reference to a predefined unit amount of delay. First rate data designates the period of the test pattern data with a precision determined by the unit amount of delay. Second rate data designates the period of the test pattern data with a precision higher than that determined by the unit amount of delay. The delay setting data generator outputs a first value and a second value in a time division manner at a ratio determined by the second rate data, the first and second values being determined by the first rate data. | 06-21-2012 |
20120179415 | TRIGGER GENERATION FOR DIGITAL MODULATION SIGNAL ANALYSIS - A modulation error is detected every symbol data to generate a trigger signal. The present invention focuses that there are limited patterns of shifts from one symbol data to the next one of the digital modulation signal. Measured values of amplitude, phase and/or frequency of symbol data are latched and then values at the next symbol timing are predicted from the latched measured values using said feature. The predicted and measured values are compared at the following symbol timing. If the difference (error) is over an acceptable range, a trigger signal is provided which allows acquiring a modulation error by symbol data. | 07-12-2012 |
20120197583 | ELECTRONIC DEVICE AND METHOD FOR AUTOMATICALLY TESTING PRINTED CIRCUIT BOARDS - A method of testing a printed circuit board (PCB) acquires test points from a wiring diagram of the PCB. Frequency domain tested items for each test point and a standard value of each frequency domain tested item are preset. A distance between a preset fiducial point and each test point is computed to create a testing order of the test points according to the distances. The frequency domain tested items of each test point are computed according to the testing order. A pass or a failure of each test point is displayed according to a determination of if each of the computed frequency domain tested items within the corresponding standard value, and a test result of the PCB is output according to the passes or the failures. | 08-02-2012 |
20120296598 | COMPENSATING FOR JITTER DURING DDR3 MEMORY DELAY LINE TRAINING - A method for compensating for jitter during DDR3 delay line training may include using a computer or processor to perform the steps of executing a plurality of tests for each one of a plurality of delay values for an interconnect delay between a Double-Data-Rate Three (DDR3) memory controller and a DDR3 Synchronous Dynamic Random Access Memory (SDRAM); accumulating a plurality of test results for each plurality of tests for each one of the plurality of delay values; determining a plurality of final test results, where each final test result is associated with an accumulated plurality of test results; and determining a working window edge for the interconnect delay between the DDR3 memory controller and the DDR3 SDRAM utilizing the plurality of final test results. | 11-22-2012 |
20120323519 | TEST APPARATUS - A pattern generator PG generates control data which specifies a threshold voltage to be compared with a signal under test input to an I/O terminal, and generates expected value data which represents an expected value for the comparison result between the signal under test and the threshold voltage. A threshold voltage generator generates the threshold voltage having a voltage level that corresponds to the control data at every setting timing indicated by a first timing signal. A level comparator compares the voltage level of the signal under test with its corresponding threshold voltage. A timing comparator latches the output of the level comparator at a strobe timing indicated by a second timing signal so as to generate a comparison signal. A timing adjustment unit adjusts the phase of the first timing signal. | 12-20-2012 |
20130006570 | UNBOUND OSCILLOSCOPE PROBE SYSTEMS-USING RF AND OR OPTICAL TEST POINT LINKS - PROVIDES OPERATIONAL ACCESS AND MOBILITY - Employing RF or optical communication connecting links to oscilloscope probes—adds mobility and flexibility to oscilloscope test and measurement operation. Currently bound by cables to the oscilloscope control and display functions the probe systems are freed to communicate and send signal images over a wide range in local areas. The RF linking of unique address probe systems allows multiple individuals at distant test sites to participate in coordinated viewing and controlling test operations facilitating group and management cooperation. The test probe cable system adapted or replaced by an RF link is configured for the two general classes of oscilloscopes—the integrated bench oscilloscope instrument and the bifurcated oscilloscope instrument that employs a PC for display and control. Oscilloscope probes that are cable free enable the signal measurements to be collected conveniently—even from remote or otherwise inaccessible points. | 01-03-2013 |
20160252576 | CONFIGURABLE PROBE BLOCKS FOR SYSTEM MONITORING | 09-01-2016 |
20160252900 | Emergency Test Control Panel Device, System and Method | 09-01-2016 |