Class / Patent application number | Description | Number of patent applications / Date published |
438379000 | VOLTAGE VARIABLE CAPACITANCE DEVICE MANUFACTURE (E.G., VARACTOR, ETC.) | 12 |
20080311723 | TUNABLE SEMICONDUCTOR DIODES - A diode structure fabrication method. In a P− substrate, an N+ layer is implanted. The N+ layer has an opening whose size affects the breakdown voltage of the diode structure. Upon the N+ layer, an N− layer is formed. Then, a P+ region is formed to serve as an anode of the diode structure. An N+ region can be formed on the surface of the substrate to serve as a cathode of the diode structure. By changing the size of the opening in the N+ layer during fabrication, the breakdown voltage of the diode structure can be changed (tuned) to a desired value. | 12-18-2008 |
20090239350 | HIGH PERFORMANCE TAPERED VARACTOR - Disclosed is a semiconductor structure, which includes a non-planar varactor having a geometrically designed depletion zone with a taper, as to provide improved Cmax/Cmin with low series resistance. Because of the taper, the narrowest portion of the depletion zone can be designed to be fully depleted, while the remainder of the depletion zone is only partially depleted. The fabrication of semiconductor structure may follow that of standard FinFET process, with a few additional or different steps. These additional or different steps may include formation of a doped trapezoidal (or triangular) shaped silicon mesa, growing/depositing a gate dielectric, forming a gate electrode over a portion of the mesa, and forming a highly doped contact region in the mesa where it is not covered by the gate electrode. | 09-24-2009 |
20090246929 | MEMBRANE SUSPENDED MEMS STRUCTURES - A method for micro-machining a varactor that is part of a membrane suspended MEMS tunable filter. In one non-limiting embodiment, the method includes providing a main substrate; depositing a membrane on the main substrate; depositing and patterning a plurality of sacrificial photoresist layers at predetermined times during the fabrication of the varactor; depositing metal layers that define a fabricated varactor structure enclosed within photoresist; coupling a carrier substrate to the fabricated structure opposite to the main substrate using a release layer; etching a central portion of the main substrate to expose the membrane; removing the carrier substrate by dissolving the release layer in a material that attacks the release layer but does not dissolve the photoresist; and removing the photoresist layers to provide a released varactor. | 10-01-2009 |
20090253240 | Thick Oxide P-Gate NMOS Capacitor for Use In A Low-Pass Filter of a Circuit and Method of Making Same - A circuit with dielectric thicknesses is presented that includes a low-pass filter including one or more semiconductor devices having a thick gate oxide layer, while further semiconductor devices of the circuit have thin gate oxide layers. The low-pass filter semiconductor device includes an N-type substrate, a P-type region formed on the N-type substrate, a thick gate oxide layer formed over the P-type region, a P | 10-08-2009 |
20100093148 | SILICON GERMANIUM HETEROSTRUCTURE BARRIER VARACTOR - Methods and heterostructure barrier varactor (HBV) diodes optimized for application with frequency multipliers at providing outputs at submillimeter wave frequencies and above. The HBV diodes include a silicon-containing substrate, an electrode over the silicon-containing substrate, and one or more heterojunction quantum wells of alternating layers of Si and SiGe of one or more electrodes of the diode. Each SiGe quantum well preferably has a floating SiGe layer between adjacent SiGe gradients followed by adjacent Si layers, such that, a single homogeneous structure is provided characterized by having no distinct separations. The plurality of Si/SiGe heterojunction quantum wells may be symmetric or asymmetric. | 04-15-2010 |
20100279483 | LATERAL PASSIVE DEVICE HAVING DUAL ANNULAR ELECTRODES - A lateral passive device is disclosed including a dual annular electrode. The annular electrodes form an anode and a cathode. The annular electrodes allow anode and cathode series resistances to be optimized to the lowest values at a fixed device area. In addition, the parasitic capacitance to a bottom plate (substrate) is greatly reduced. In one embodiment, a device includes a first annular electrode surrounding a second annular electrode formed on a substrate, and the second annular electrode surrounds an insulator region. A related method is also disclosed. | 11-04-2010 |
20110230032 | High Voltage Tolerant Metal-Oxide-Semiconductor Device - A method for increasing a voltage tolerance of a MOS device having a first capacitance value associated therewith is provided. The method includes the steps of: connecting at least a first capacitor in series with the MOS device, the first capacitor having a first capacitance value associated therewith, the first capacitor having a first terminal coupled to a gate of the MOS device and a second terminal adapted to receive a first signal; and adjusting a ratio of the first capacitance value and a second capacitance value associated with the MOS device such that a second signal present at the gate of the MOS device will be an attenuated version of the first signal. An amount of attenuation of the first signal is a function of the ratio of the first and second capacitance values. | 09-22-2011 |
20120021586 | METHODS FOR FORMING VARACTOR DIODES - Methods are disclosed for forming an improved varactor diode having first and second terminals. The methods include providing a substrate having a first surface in which are formed isolation regions separating first and second parts of the diode. A varactor junction is formed in the first part with a first side coupled to the first terminal and a second side coupled to the second terminal via a sub-isolation buried layer (SIBL) region extending under the bottom and partly up the sides of the isolation regions to a further doped region that is ohmically connected to the second terminal. The first part does not extend to the SIBL region. The varactor junction desirably comprises a hyper-abrupt doped region. The combination provides improved tuning ratio, operating frequency and breakdown voltage of the varactor diode while still providing adequate Q. | 01-26-2012 |
20140308793 | Varactor Diode, Electrical Device and Method for Manufacturing Same - An electrical device includes a semiconductor material. The semiconductor material includes a first region of the semiconductor material having a first conductivity type, a second region of the semiconductor material having a second conductivity type complementary to the first conductivity type and an intermediate region of the semiconductor material between the first region and the second region. The first and second regions lie next to each other the intermediate region so as to form a diode structure. A shape of the intermediate region tapers from the first region to the second region. | 10-16-2014 |
20150118819 | METAL-SEMICONDUCTOR WAFER BONDING FOR HIGH-Q DEVICES - Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass substrate, a second plate, and a dielectric layer. No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer is thermo compression bonded to the first plate and the dielectric layer. The capacitor can be coupled in a circuit as a high-Q capacitor and/or a varactor, and can be integrated with a mobile device. | 04-30-2015 |
20150325676 | Semiconductor Heterobarrier Electron Device And Method of Making - A method of substantially offsetting polarization charges in an electronic device having a heterobarrier comprising providing a substrate; providing at least one pair of stacks of semiconductor materials; one of the pair of stacks having one or more of spontaneous and piezoelectric polarity where the total polarization charge is opposite to the other of the pair of stacks; whereby due to the opposing polarities, the polarization is balanced and the pair of stacks operate to store electrical energy. | 11-12-2015 |
20160031699 | Micro-Electro-Mechanical System (MEMS) Structures And Design Structures - Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming at least one fixed electrode on a substrate. The method further includes forming a Micro-Electro-Mechanical System (MEMS) beam with a varying width dimension, as viewed from a top of the MEMS beam, over the at least one fixed electrode. | 02-04-2016 |