Entries |
Document | Title | Date |
20080198053 | Current-Steering Type Digital-To-Analog Converter - A current-steering type digital-to-analog converter (DAC) is disclosed. The DAC includes a first sub-DAC, a second sub-DAC and a controlling device. Both the first sub-DAC and the second sub-DAC are configured to receive input signals. The controlling device selectively and periodically sends output signals of either the first sub-DAC or the second sub-DAC to a resistive load while sending output signals of the remaining one of the two sub-DACs to a dummy resistive load. An output of the DAC is provided at the resistive load. | 08-21-2008 |
20080204291 | DIGITAL-TO-ANALOG CONVERTER WITH LOGARITHMIC SELECTABLE RESPONSE AND METHODS - Embodiments of a digital-to-analog converter (DAC) with a logarithmic response and methods for converting digital signals to analog are generally described herein. Other embodiments may be described and claimed. In some embodiments, the DAC includes a wedge-shaped resistive array having a plurality of linearly-spaced contact nodes and a switching array to selectively couple one of the contact nodes with an analog output based on a control signal. Each of the contact nodes may provide a corresponding reference voltage that varies logarithmically with respect to the linearly-spaced contact nodes. | 08-28-2008 |
20080204292 | Output Architecture for LCD Panel Column Driver - In one embodiment consistent with the present invention, a digital to analog converter (DAC) circuit operates over an upper range and a lower range. An upper voltage node is designated AVDD; a middle voltage node is designated HVDD; and a lower voltage node designated ground. An upper DAC stage has at least one NMOS transistors that produces an output to an upper range output node when the output is in the upper range. A lower DAC stage has at least one PMOS transistors that produces an output to a lower range output node when the output is in the lower range. A body bias control circuit couples the body of the upper NMOS transistor to a voltage source equal to HVDD−Vbe and connects the body of the lower PMOS transistor to voltage source equal to HVDD+Vbe. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract. | 08-28-2008 |
20080204293 | MULTI-CHANNEL DISPLAY DRIVER CIRCUIT INCORPORATING MODIFIED D/A CONVERTERS - A multi-channel display driver circuit incorporating modified D/A converters has a plurality of digital comparators connected to a number generator. Each digital comparator has an output, a digital data input and a reference input. The reference inputs of all digital comparators are connected to the number generator and the outputs are respectively connected to corresponding data channels of a display. By the proposed technique, each digital comparator obtains a unique non-sequence reference signal, and then compares it with the input digital data signal. Since the non-sequential signals are input to the reference input of the digital comparator, the overshoot distortion, the harmonic distortion and the electromagnetic interference problems are prevented. Therefore, the precise imaging can be obtained with this signal modulation technique in small circuit size. | 08-28-2008 |
20080211703 | Digital-to-analog converter circuit, data driver, and display device using the digital-to-analog converter circuit - Disclosed is a data driver including a reference voltage generation circuit that generates and outputs a plurality of reference voltages, a decoder circuit that selects from among the reference voltages n (where n is an integer greater than or equal to two) reference voltages inclusive of reference voltages that may be identical and outputs the n reference voltages from n output terminals thereof, and an amplifying circuit that includes n differential circuits, a feedback resistor, and a resistor. The n output terminals are connected to non-inverting input terminals of the n differential circuits, respectively. The amplifying circuit outputs an output voltage obtained by operating and synthesizing the n reference voltages. One end of the feedback resistor is connected to an output terminal of the amplifying circuit, and the other end is connected to inverting input terminals of the n differential circuits connected in common. The resistor is connected between a voltage supply and the commonly coupled inverting input terminals of the n differential circuits. | 09-04-2008 |
20080224908 | Mixer/DAC Chip and Method - An electronic chip has a data input for receiving an input digital data signal with a data frequency, a plurality of switches, and a logic circuit operatively coupled with both the plurality of switches and the data input. The logic circuit controls the switches to be in one of a DAC mode or a mixer mode. The DAC mode causes the switches to convert the input digital data signal into a DAC analog signal having about the data frequency. The mixer mode, however, causes the switches to convert the input digital data signal into a mixed analog signal having a mixer frequency that is higher than the data frequency. | 09-18-2008 |
20080224909 | D/A CONVERTER - A digital-analog converter including a first selection circuit of switch elements, which are coupled to each other and to a high potential power supply, and a second selection circuit of switch elements, which are coupled to each other and to a low potential power supply. First and second voltage dividing circuit each include series-connected resistor elements, each coupled between adjacent switch elements of the corresponding selection circuit. A control circuit provides a control signal to the selection circuits to activate one of the switch elements in each selection circuit and couple the activated switch element to the corresponding potential power supply. The first and second voltage dividing circuits divide voltages of the high and low potential power supplies with the resistor elements between the activated switch elements. | 09-18-2008 |
20080224910 | Low jitter phase rotator - A phase rotator generates an output signal having plurality of possible output phases with reduced phase jitter. The low jitter phase rotator includes a plurality of differential amplifiers configured to receive a plurality of input differential signals having different phases, and configured to generate a plurality of weighted signals responsive to the plurality of input differential signals. A plurality of digital-to-analog converters (DAC) are arranged into a plurality of groups, each group of DACs configured to provide current for one of the corresponding differential amplifiers. The number of active DACs in each group of DACs determines a relative weighting of the weighted signals, where relative weighting determining an output phase of an output signal of the phase rotator. The DACs are configured to adjust the output phase of the phase rotator. At a k | 09-18-2008 |
20080231487 | DIGITAL-TO-ANALOG CONVERTER AND METHOD OF DIGITAL-TO-ANALOG CONVERSION - A digital-to-analog convertor, and a methods of digital-to-analog conversion employ first and second PWM generators providing first and second PWM signals, said first PWM generator being controlled by a most significant word of the digital signal, and said second PWM generator being controlled by a least significant word of the digital signal. First and second switches are controlled by the first and the second PWM signals and first and second current sources have first and second currents, switched by the first and the second switches, thereby providing first and second switched currents, whereby an analog signal is obtained by the combination of the first and second switched currents. | 09-25-2008 |
20080238747 | SUB-HARMONIC IMAGE MITIGATION IN DIGITAL-TO-ANALOG CONVERSION SYSTEMS - A digital-to-analog conversion system comprises a digital input, a digital-to-analog converter and a modified digital signal generator. The digital-to-analog converter has a conversion frequency and is subject to a periodic error having a periodicity equal to that of an N-th sub-harmonic of the conversion frequency, where N is an integer. The digital input is operable to receive a digital input signal. The modified digital signal generator is interposed between the digital input and the digital-to-analog converter and is operable in response to the digital input signal to generate a modified digital signal. The modified digital signal comprises a dynamic digital mitigation component that mitigates the periodic error of the digital-to-analog converter. | 10-02-2008 |
20080246641 | WAVEFORM GENERATOR AND TEST APPARATUS - The purpose is to provide a waveform generator that generates signals with a frequency lower than the minimum sampling frequency of the DAC. | 10-09-2008 |
20080246642 | Digital-to-analog signal converter, and digital-to-analog signal converting method - A digital-to-analog signal converter includes a digital-to-analog signal converting unit adapted for converting a digital video signal into a pair of analog differential current signals by current steering, and a driving unit coupled to the digital-to-analog signal converting unit for converting the analog differential current signals into a driving voltage signal that is adapted for driving a display device. A digital-to-analog signal converting method for driving a display device is also disclosed. | 10-09-2008 |
20080252503 | Digital to Analog Converter with High Driving Capability - A digital-to-analog converter with high driving capability includes a voltage generator for generating voltages, a voltage division circuit coupled to the voltage generator for outputting a plurality of reference voltages according to voltages generated by the voltage generator, a decode unit for decoding a digital signal, a switch circuit coupled to the voltage division circuit and the decode unit for switching to output one of the plurality of reference voltages, and a current generator coupled to the voltage division circuit for generating currents to the voltage division circuit. | 10-16-2008 |
20080252504 | METHOD OF COMPENSATING CHANNEL OFFSET VOLTAGE FOR COLUMN DRIVER AND COLUMN DRIVER FOR LCD IMPLEMENTED THEREOF - A technique for removing vertical stripe artifacts generated in a Liquid Crystal Display (LCD) panel, more particularly a technique for compensating for and removing an inter-channel offset voltage of a column driver, which causes the vertical stripe artifacts, is disclosed. An offset voltage generated in each channel for driving each pixel of the LCD panel is detected for a whole signal path and offset voltages detected for all channels are compared and extracted according to a given timing sequence by a common signal comparator, thereby preventing the offset of the detection comparator and reducing a chip size of the column driver in contrary to the prior art. Moreover, an inter-channel offset voltage is detected in a digital circuit mode, thereby compensating for process variations in a semiconductor chip manufacturing process in circuit terms. | 10-16-2008 |
20080258953 | DIGITIZING AN ANALOG SIGNAL, AND RECONSTITUTING AN ANALOG SIGNAL FROM A DIGITIZED VERSION OF THE ANALOG SIGNAL - An embodiment of an audio-signal digitizer includes a modulator and a converter. The modulator is operable to receive an analog audio signal, and is operable to angle modulate a carrier signal with the analog audio signal to generate a modulated analog signal having an average amplitude. The converter is operable to convert the modulated analog signal into a digital signal having a first level in response to the modulated signal having an amplitude larger than approximately the average amplitude and having a second level in response to the modulated signal having an amplitude smaller than approximately the average amplitude. Because such a digitizer uses angle modulation to digitize an analog audio signal, the resulting digital audio signal may retain higher frequencies of the analog audio signal than a digital audio signal obtained by amplitude sampling would retain. And the retaining of higher frequencies may introduce less distortion into the reconstituted audio and acoustic signals. | 10-23-2008 |
20080258954 | Method of controlling digital-to-analog conversion - An analog-to-digital converter comprising a minimal amount of circuitry for conversion of an input analog signal to a series of digital bits. A differential comparator is provided for generating digital values to which the digital bits correspond. A pair of digital-to-analog converters are provided for generating, via successive approximation, a differential feedback analog signal based on bits previously generated by the differential comparator. The analog-to-digital converter compares the differential feedback analog signal to the input analog signal, and based on the comparison generates a digital value that corresponds to a digital bit. In the method of the invention, an analog signal is converted to a digital value using the analog-to-digital converter, and a pair of digital-to-analog converters each generate, via successive approximation, a differential feedback analog signal that is applied to a differential comparator for comparison to the input analog signal being digitized. | 10-23-2008 |
20080258955 | Signal processing device and method, signal processing program, and recording medium where the program is recorded - A signal processing device which outputs a discrete signal composed of a string of the sampling values and parameters m signal. The signal processing device includes a sampling circuit which samples an input signal and outputs a discrete signal, multiple function generators which generate multiple sampling functions with parameters m different from each other, plural inner product operating units for each of parameters m that take an inner product between the input signal and each of plural sampling functions and output an inner product operating value, and a judging unit which determines parameter m providing a minimum error out of multiple errors composed of differences between the sampling value and inner product operating values output from the multiple inner product operating units and outputs the parameters m signal. | 10-23-2008 |
20080272947 | System Clock Generator Circuit - A system clock generator circuit for use in a D/A converter that allows the clock of any frequency to be inputted and also allows usage limiting-conditions to be simplified. A system clock generator circuit for use in a D/A converter for demodulating one-bit digital input data, which has been obtained by ΔΣ modulation scheme, into analog output data in synchronism with an internal system clock and for outputting the analog output data, comprises a counter circuit for receiving external system clocks and LR clocks (LRCLK) having predetermined repetitive frequencies to count the number of the external system clocks included in one period of the LR clocks; a timing generator circuit for generating mask signals for thinning, in accordance with the count value as counted by the counter circuit, the external system clocks at predetermined thinning timings; and a mask circuit for masking the external system clocks by use of the mask signals and thinning the clocks in the masked portions to generate internal system clocks. | 11-06-2008 |
20080272948 | CIRCUIT AND METHOD FOR DYNAMICALLY SELECTING CIRCUIT ELEMENTS - Techniques for dynamically selecting circuit elements to combat mismatches are described. In one design, an apparatus includes first, second, and third circuits. The first circuit receives input data and provides first signals that are asserted based on the input data, e.g., with thermometer decoding. The second circuit receives the first signals and provides second signals used to select circuit elements, e.g., current sources, capacitors, resistors, etc. The third circuit generates a control for the second circuit, and the second circuit maps the first signals to the second signals based on this control. In one design, the second circuit includes a set of multiplexers and a control circuit. The multiplexers provides the first signals, circularly rotated by an amount determined by the control, as the second signals. The control circuit accumulates control data (e.g., the input data, pseudo-random data, or a fixed value) with the current control value to obtain new control value. | 11-06-2008 |
20080272949 | METHODS AND APPARATUS TO CONTROL CURRENT STEERING DIGITAL TO ANALOG CONVERTERS - Methods and apparatus to control current steering digital to analog converters are described herein. In one example, a digital to analog converter includes a first unit cell including a positive output and a negative output, wherein the positive output of the first unit cell and the negative output of the first unit cell comprise substantially equal magnitudes and wherein the positive and negative outputs of the first unit cell are substantially one hundred eighty degrees out of phase; and a second unit cell including a positive output and a negative output, wherein the positive output of the second unit cell is substantially zero when the negative output of the second unit cell is non-zero. | 11-06-2008 |
20080278362 | SEQUENCE GENERATION FOR MISMATCH-SHAPING CIRCUITS - An embodiment of the present invention is a technique to design a DAC. A double-summed-to-zero (DSTZ) graph is created having a plurality of nodes linked by a plurality of directed branches. The DSTZ graph represents a finite state machine (FSM) that generates a sequence for a switching block used in a mismatch-shaping digital-to-analog converter (DAC). Each of the plurality of nodes represents a state in the FSM. The DSTZ graph has a total work function and a total potential energy summing to zero for a cycle traversal. A switching sequence is generated starting from a reference node in the plurality of nodes in response to an input sequence. The reference node has a zero potential energy. | 11-13-2008 |
20080284629 | DAC MODULE AND APPLICATIONS THEREOF - A digital to analog conversion (DAC) module includes a digital to analog converter, a sample and hold circuit, and a switch module. The digital to analog converter is coupled to convert a digital signal into an analog signal. The sample and hold circuit is coupled to sample the analog signal to produce a sampled analog signal. The switch module is coupled to provide the analog signal as an output of the DAC module when the DAC module in a first mode and to output the analog signal to the sample and hold circuit when the DAC module in a second mode, wherein the sampled analog signal provides the output of the DAC module in the second mode. | 11-20-2008 |
20080291070 | DIGITAL/ANALOG CONVERTER AND TRANSMITTER - According to an embodiment of the invention, there is provided a digital/analog converter includes: a decoder that converts a (n−1)-phase input digital signal to a n-phase output digital signal; and a signal generating unit that generates analog signals according to the n-phase output digital signal. | 11-27-2008 |
20080297390 | Digital-to-analog converter and method thereof - An integrated circuit may include an operation amplifier, a first capacitor, a plurality of second capacitors, and/or a switching circuit. The operational amplifier may have a first input terminal, a second input terminal, and/or an output terminal. The first capacitor may have a first terminal and a second terminal. The second terminal of the first capacitor may be connected to the first input terminal of the operational amplifier. The plurality of second capacitors may each have a first terminal and a second terminal. The second terminal of each of the second capacitors may be connected to the second input terminal of the operational amplifier. The switching circuit may include a plurality of switches configured to switch in response to a plurality of switching signals. The switching circuit may be configured to transmit a reference voltage to the first terminal of the first capacitor and the first terminals of the second capacitors and/or connect the first input terminal of the operational amplifier to the output terminal of the operational amplifier during a first period. The switching circuit maybe configured to isolate the first terminal of the first capacitor from the reference voltage, transmit a voltage selected from at least two selection voltages to the first terminals of the second capacitors, and/or connect the first terminal of the first capacitor to the output terminal of the operational amplifier during a second period. | 12-04-2008 |
20080309537 | PSEUDO-DIFFERENTIAL CLASS-AB DIGITAL-TO-ANALOG CONVERTER WITH CODE DEPENDENT DC CURRENT - A digital-to-analog converter, RF transmit channel and method, for converting a digital signal of N bits having a set M of most significant bits and a set L of least significant bits to an analog signal, are disclosed. The digital signal defines a set of coded values which are converted to analog values and modulated on to a RF signal. The digital-to-analog converter includes a plurality of switches and an output stage, for providing at least a first differential output signal and a second differential output signal. The output stage modifies currents received from the plurality of switches, such that the value of the average output current of the first and second differential outputs signals is steered to a relatively low current value at the mid-point of the coded values. | 12-18-2008 |
20080316076 | Direct RF D-to-A Conversion - A modulator described herein provides digital modulation and direct digital-to-analog conversion capable of achieving 12-bit resolution or higher for high frequency signals. The modulator comprises a digital modulator, conversion circuit, and multiplexer. The digital modulator generates a plurality of sample streams at a plurality of different sample phases that collectively represent a desired modulated digital carrier waveform modulated by a digital input signal. The conversion circuit converts the sample streams into a plurality of continuous analog signals. The multiplexer multiplexes the analog signals together to generate a modulated analog carrier signal representative of the desired modulated digital carrier waveform. | 12-25-2008 |
20080316077 | D/A CONVERTER - An output from a resister string is selected with a signal of m upper bits of an input digital signal and converted to a pair of analog signals (VH, VL) having a width corresponding to n lower bits. The signals (VH, VL) are divided using a resistor string and converted to an along signal selected according to the signal of n lower bits, so that an input digital signal of (n+m) bits (where each of n and m is an integer greater than or equal to 2) is converted into an analog signal. | 12-25-2008 |
20090015453 | High speed arbitrary waveform generator - A high-speed arbitrary waveform generator (AWG) that utilizes multiple digital-to-analog converters (D/A converters) and overcomes bandwidth limitations of individual D/A converters to produce high-speed waveforms. | 01-15-2009 |
20090015454 | DIGITAL-TO-ANALOG CONVERTER CARRYING OUT CALIBRATION OPERATION FOR CURRENT SOURCE CELLS - A current cell matrix type of digital-to-analog (D/A) converter to prevent deterioration of a.c. characteristics on a current path for digital-to-analog conversion includes a array of current source cells arranged in a matrix configuration. Each current source cell includes a current source transistor to generate the cell current. During the regular operation, the cell current is flowed on output lines via a first transistor connected in cascode to the current source transistor. During the calibration operation, the cell current is flowed into a current comparator via a second transistor connected in cascode to the current source transistor. This prevents parasitic capacitance from being additively caused in switches for the first transistor and in another switch for the second transistor to prevent deterioration of a.c. characteristics on the current path. | 01-15-2009 |
20090021410 | Error avoidance in data transmission using dynamic modification of analog sampling rates - A method and apparatus for error avoidance in data transmission using dynamic modification of sampling rates. An embodiment of a method for transmission of data includes determining the transmission capacity for a transmission channel or channels. A sampling rate is selected based at least in part on the determined transmission capacity for the one or more transmission channels. An instruction, command, or information regarding the sampling rate is inserted in a data packet, and the data packet is transmitted. | 01-22-2009 |
20090040086 | DWA STRUCTURE AND METHOD THEREOF, DIGITAL-TO-ANALOG SIGNAL CONVERSION METHOD AND SIGNAL ROUTING METHOD - A data weighted average (DWA) structure including a first delay unit, a binary to thermometer code converter, an adder, a second delay unit, a decoder, a barrel shifter, and a plurality of signal lines is provided. The first delay unit delays an input digital signal. The binary to thermometer code converter converts an output signal of the first delay unit into a thermal code. The second delay unit delays an output signal of the adder. The adder adds the input digital signal to an output signal of the second delay unit. The decoder decodes the output signal of the second delay unit. The barrel shifter generates an output signal from the thermal code in accordance with an output signal of the decoder. The signal lines route the output signal of the barrel shifter into two independent control signal groups. | 02-12-2009 |
20090040087 | DATA WEIGHTED AVERAGE CIRCUIT AND DYNAMIC ELEMENT MATCHING METHOD - A data weighted average circuit is disclosed which includes a lookup unit and a storage unit. The invention uses a lookup table to speed up the circuit operation. Besides, the operation delay is not affected by various orders of the data weighted average circuit and various bit-widths of input data. | 02-12-2009 |
20090058703 | DIGITAL-TO-ANALOG CONVERTER USING DUAL-GATE TRANSISTORS - A digital to analog converter. The digital to analog converter including a current mirror comprising N stages, each stage comprising 2 | 03-05-2009 |
20090058704 | DESIGN STRUCTURE FOR A DIGITAL-TO-ANALOG CONVERTER USING DUAL-GATE TRANSISTORS - A design structure embodied in a machine readable medium, the design structure including a current mirror including N stages, each stage comprising 2 | 03-05-2009 |
20090066551 | Generation method of a variable analogue signal generated by a PWM signal and system generating such a signal - The present invention relates to a generation method of a variation form of an analogue signal generated by a PWM signal whose cyclic ratio and period are programmable. A signal can thus be generated whose evolution is linear over time. A succession of generation steps of a PWM signal during which different period and cyclic ratio values are applied, as well as pairs have different periods with the same cyclic ratio, thus enabling the analogue signal to be varied with great precision. According to an improvement, each generation step of a new PWM signal with different period and cyclic ratio values is applied over time slots of equal time. The present invention also relates to a generation system of a variable analogue signal implementing the method. | 03-12-2009 |
20090073013 | METHOD FOR PERFORMING A DIGITAL TO ANALOG CONVERSION OF A DIGITAL SIGNAL, AND CORRESPONDING ELECTRONIC DEVICE - A method for processing a digital signal includes an elementary processing including a radiofrequency transposition with a radiofrequency transposition signal and a digital to analog conversion of the transposed digital signal for delivering a radiofrequency analog signal. The digital to analog conversion is controlled by a control signal and a power control signal, the control signal having a frequency twice the frequency of the radiofrequency transposition signal. Each transition of the radiofrequency transposition signal occurs between two consecutive pulses of said control signal. | 03-19-2009 |
20090073014 | CONVERTER AND METHOD FOR CONVERTING AN ANALOG SIGNAL AND COMPARATOR FOR USE IN SUCH CONVERSION - A converter may include an input terminal to receive a first analog signal, a digital-to-analog converter to provide second analog signals related to digital values applied to the digital-to-analog converter, a comparator to receive the first and second analog signals, the comparator comprising a variable gain amplifier to provide an output signal based on a difference between the first and second analog signals, a state machine to receive the output signal of the comparator and generating the digital values applied to the digital-to-analog converter based on the output signal of the comparator, and a controller to selectively set the gain of the variable gain amplifier. | 03-19-2009 |
20090079609 | Digital-to-analog converter - A digital-to-analog converter for converting a digital signal into an analog voltage is provided. The digital-to-analog converter includes a first series of resistors, a first cascade of switches, a second series of resistors and a second cascade of switches. The first series of resistors comprising a first resistor and a second resistor is electrically connected between a first voltage and an output terminal of the digital-to-analog converter. The first cascade of switches comprising a first switch and a second switch is controlled by the digital signal. The second series of resistors comprising a first matching resistor and a second matching resistor is electrically connected between a second voltage and the output terminal. The second cascade of switches comprising a first matching switch and a second matching switch is controlled by an inversion signal of the digital signal. The digital-to-analog converter outputs the analog voltage via the output terminal. | 03-26-2009 |
20090079610 | DIGITAL-TO-ANALOG CONVERTER (DAC) - A digital to analog converter (DAC) is provided. The DAC includes a first loop unit to receive a plurality of sources and comprising a plurality of primary winding of transistors formed at a plurality of locations, and a second loop unit comprising secondary windings to correspond to the primary windings, to receive the plurality of sources through the first loop unit, and combine the plurality of sources and output the result. Accordingly, a DAC is capable of directly converting a digital signal into an RF analog signal. | 03-26-2009 |
20090109077 | Digital-to-anolog converter circuit, data driver and display device - Disclosed is a digital-to-analog converter circuit having first to (2×h+1)th reference voltages (where h is a prescribed positive integer) grouped into the following groups: a first reference voltage group comprising h-number of (2×j−1)th (where j is a prescribed positive integer of 1 to h) reference voltages; a second reference voltage group comprising h-number of (2×j)th reference voltages; and a third reference voltage group comprising h-number of (2×j+1)th reference voltages. The digital-to-analog converter circuit includes: a first subdecoder for receiving the first reference voltage group and selecting a reference voltage Vrk based upon an input digital signal; a second subdecoder for receiving the second reference voltage group and selecting a reference voltage Vr(k+1) based upon the input digital signal; a third subdecoder for receiving the third reference voltage group and selecting a reference voltage Vr(k+2) based upon the input digital signal; a fourth subdecoder for receiving the reference voltages Vr, Vr(k+1), and Vr(k+2) that have been selected by respective one of the first to third subdecoders, selecting two of these reference voltages (inclusive of selecting the same voltage redundantly) based upon an input digital signal, and outputting the selected two reference voltages; and an amplifier circuit for receiving the two reference voltages that have been selected by the fourth subdecoder and outputting result of an operation applied to the two reference voltages. | 04-30-2009 |
20090121910 | Method and System for a Control Scheme on Power and Common-Mode Voltage Reduction for a Transmitter - Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The method includes identifying a phase control signal from an adjacent current cell preceding the particular current cell in time and logically ORing the phase control signal from the preceding cell with a phase control signal from the particular current cell. | 05-14-2009 |
20090128386 | ANALOGUE-TO-DIGITAL CONVERTER AND METHOD FOR USING THE SAME - The present disclosure is related to an analogue-to-digital (A/D) converter ( | 05-21-2009 |
20090160689 | HIGH SPEED RESISTOR-BASED DIGITAL-TO-ANALOG CONVERTER (DAC) ARCHITECTURE - A digital to analog converter (DAC) system comprising, a first segment, wherein a segment comprises, a first path including an array of resistors connected in series between a first reference voltage node and a second reference voltage node, wherein the array is connected to a first switch device disposed between nodes of the array and an output node, and a third path including a second resistor in series with a second switch device, wherein the third path is connected in parallel with the first path. | 06-25-2009 |
20090167582 | Sample and hold circuit, multiplying D/A converter having the same, and A/D converter having the same - A sample and hold circuit includes an op-amp, inverting-side capacitors, and non-inverting-side capacitors paired with the inverting-side capacitors. At least one capacitor pair serves as a feedback capacitor in a holding phase. A total capacitance of the inverting-side capacitors to which an input voltage is applied in a sampling phase is α, a total capacitance of the non-inverting-side capacitors to which the input voltage is applied in the sampling phase is β, a total capacitance of the inverting-side capacitors to which the input voltage is applied in a holding phase is γ, and a total capacitance of the non-inverting-side capacitors to which the input voltage is applied in the holding phase is η. α is substantially different from β. A total capacitance of a feedback capacitor pair is substantially equal to (α−β−γ+η)·(N/2), where N is a positive number. | 07-02-2009 |
20090174587 | CURRENT SWITCH CIRCUIT AND D/A CONVERTER, SEMICONDUCTOR INTEGRATED CIRCUIT, AND COMMUNICATION DEVICE USING THE SAME - [Means for Solving the Problem] In a current switch circuit A used for a current steering D/A converter, a current switch basic circuit | 07-09-2009 |
20090179784 | DIGITAL-TO-ANALOG CONVERTER HAVING CONSTANT CURRENT CELLS PRODUCING EVEN CONSTANT CURRENTS - A digital-to-analog converter includes MOS transistors formed in the identical configuration and arranged in a matrix array. Ones of the MOS transistors placed on the inner part of the array serve as constant current cells, while others placed around the inner MOS transistors function as dummy transistors and a MOS capacitance. Each dummy transistor has its gate, source and drain electrodes connected to a metal strip to which the gate electrode of each constant current cells is connected. Thus, the gate electrodes of the constant current cells are connected to a substrate or potential well via diodes consisting of the dummy transistors, thereby electric charges generated in metal strips due to plasma etching and like treatment being discharged through the diodes to the substrate or potential well. The digital-to-analog converter is thus able to produce even constant currents. | 07-16-2009 |
20090184854 | PRECISION MICROCONTROLLER-BASED PULSE WIDTH MODULATION DIGITAL-TO-ANALOG CONVERSION CIRCUIT AND METHOD - A precision digital to analog conversion circuit and method are provided. A regulated direct current (DC) voltage having a DC voltage magnitude is supplied to a device, such as a processor. The processor generates a pulse width modulation (PWM) output signal based, at least in part, on the regulated DC voltage. An analog output signal is generated from the PWM output signal. The regulated DC voltage is compared to a precision reference DC voltage, the DC voltage magnitude is selectively adjusted based on the comparison. | 07-23-2009 |
20090184855 | CURRENT STEERING DAC - In a multi-channel current steering DA converter, e.g., a two-channel current steering DA converter, reference current sources Irefa and Irefb that can serve as current mirror sources for current sources Ia and Ib are provided in current source matrices | 07-23-2009 |
20090195425 | Method and device for digital-to-analog conversion with filtering - The invention relates to a device and a method for converting a digital signal having a plurality of data-bits into a filtered analog signal. A device according to the invention includes a delay element arranged to produce one or more differently delayed version of the digital signal and a digital-to-analog conversion circuitry arranged to convert the digital signal and the one or more differently delayed, and possibly differently scaled, versions of the digital signal into analog signals and to produce the filtered analog signal as a combination of the analog signals. Therefore, the device constitutes not only a digital-to-analog-converter but also a finite impulse response filter. | 08-06-2009 |
20090195426 | ADAPTIVE HIGH-ORDER DIGITAL-TO-ANALOG CONVERSION - Techniques for performing digital-to-analog conversion with first-order or higher-order hold using a simple analog circuit for signal reconstruction and employing feedback control techniques are described. In one design, a digital-to-analog conversion circuit includes an inverse model circuit, a feedback circuit, a zero-order hold (ZOH) circuit, and an analog circuit. The inverse model circuit processes a digital input signal and provides a first digital signal. The feedback circuit receives the first digital signal and an analog output signal from the analog circuit, performs low frequency noise filtering, and provides a second digital signal. The ZOH circuit converts the second digital signal from digital to analog with zero-order hold and provides an analog input signal for the analog circuit. The analog circuit operates on the analog input signal and provides the analog output signal. The analog circuit may be a simple circuit having one or more poles. | 08-06-2009 |
20090201186 | CURRENT STEERING DAC AND VOLTAGE BOOSTER OF SAME - A digital-to-analog converter is coupled to a first voltage source and used for converting a digital input into an analog output. The DAC includes a voltage booster providing a first gate-source voltage and a second gate-source voltage to generate a voltage of a first level according to the first voltage source and the first gate-source voltage, and to generate a voltage of a second level according to the voltage of the first level and the second gate-source voltage; and a current-guiding circuit selectively receiving the voltage of the first level or the second level according to the digital input to generate the analog output. The first level and the second level vary with the first voltage source. | 08-13-2009 |
20090207062 | GAMMA REFERENCE VOLTAGES GENERATING CIRCUIT - A gamma reference voltages generating circuit is disclosed in the present invention. The gamma reference voltages generating circuit comprises a voltage provider, a plurality of first digital-to-analog converters and a plurality of second digital-to-analog converters. The voltage provider generates a plurality of first supply voltages and a plurality of second supply voltages according to a first gamma reference voltage. The first digital-to-analog converters are electrically coupled to the first supply voltages for generating a plurality of second gamma reference voltages. The second digital-to-analog converters are electrically coupled to the second supply voltages for generating a plurality of third gamma reference voltages. | 08-20-2009 |
20090207063 | VARIABLE PASSIVE COMPONENTS WITH HIGH RESOLUTION VALUE SELECTION AND CONTROL - The present system provides a method for varying the value of passive components in electronic circuits. Passive components can range from basic resistors, capacitors, and inductors to complex, structures such as transmission lines and resonant cavities. Value selection and variation can either be dynamically performed during circuit operation or as a one-time part of the manufacturing process as determined by the requirements of the specific application. A digital-to-analog converter (DAC) circuit is used to input value selection data digitally, and control value selection with value resolution dependent on the resolution of the DAC. An alternate embodiment is provided for high frequency operation. | 08-20-2009 |
20090231175 | MULTIMEDIA SIGNAL PROCESSING APPARATUS - A multimedia signal processing apparatus includes: a first digital-to-analog converter (DAC) for performing digital-to-analog conversion on a first set of digital values to generate a first set of analog signals, where the first set of digital values represents a first portion of an image to be displayed; a second DAC for performing digital-to-analog conversion on a second set of digital values to generate a second set of analog signals, where the second set of digital values represents a second portion of the image to be displayed; and a plurality of driver integrated circuits (ICs), coupled to the first and the second DACs, for driving according to the first and the second sets of analog signals, respectively. | 09-17-2009 |
20090237285 | DIGITAL TO ANALOG CONVERTER SPUR CANCELLATION - A device includes an upsampling digital-analog converter (DAC) and logic to add a DC offset to a signal input to the DAC, the logic adapted to set the DC signal to cancel a DAC output spur. | 09-24-2009 |
20090243904 | Randomized thermometer-coding digital-to-analog converter and method therefor - A randomized thermometer-coding digital-to-analog converter (DAC) for the reduction of harmonic distortion due to non-ideal circuit mismatch is presented. The present invention introduces a new dynamic element matching technique that contains three properties of randomization, consecutive selection and less element switching activity to achieve good spurious-free dynamic range and small maximum output error. The topology uses a bank of 1-bit DAC elements, whose outputs are summed to produce a multi-level analog output. The binary digital input is encoded to be thermometer code. During a randomization period, the thermometer code is barrel-shifted to a specific starting position where the position is generated randomly. Thus, the DAC noise is randomized with less element switching activity and consecutive selection. | 10-01-2009 |
20090243905 | Method and system for bit polarization coding - A method and system for converting a digital code. A digital signal is encoded to have a digital code having multiple binary bits. Substantially one half of the binary bits of the digital code is inverted to produce a modified digital code to reduce digital noise associated with the digital code. | 10-01-2009 |
20090251347 | Methods and apparatus for rotating a thermometer code - In one aspect, an apparatus for data conversion is provided. The apparatus comprises a plurality of inputs whose values together define a thermometer code to be converted to an analog output signal on each of a plurality of successive time increments, a plurality of conversion elements, each configured to convert one of the values at the plurality of inputs into an output signal, a shift circuit having a plurality of outputs connected to the plurality of conversion elements, the shift circuit coupled between the plurality of inputs and the plurality of conversion elements, the shift circuit selectively providing the values at the plurality of inputs to the plurality of conversion elements on the plurality of outputs to apply a rotation on each of the plurality of successive time increments, the rotation being indicated by a rotation pointer, and a pointer circuit coupled to the shift circuit and adapted to generate the rotation pointer on each of the successive time increments based on the values at the plurality of outputs during a preceding time increment, the pointer circuit indicating to the shift circuit which of the values at the plurality of inputs are to be provided to which of the plurality of conversion elements on a current time increment. | 10-08-2009 |
20090267818 | LOW DISTORTION CURRENT SWITCH - A system and method is provided for code independent switching in a digital-to-analog converter (DAC). A synchronous digital circuit is triggered by a synchronizing clocking signal and develops a digital data signal. A circuit arrangement provides the synchronizing clock a constant load at every clocking cycle, thereby assuring a data independent load. By providing a data independent load to the synchronizing clock at every clocking cycle, third harmonic distortion is advantageously reduced. | 10-29-2009 |
20090278723 | DIGITAL TO ANALOG CONVERTER - This invention discloses a digital to analog converter (DAC) for converting a digital signal with a predetermined number of bits to a corresponding analog signal, the DAC comprises a first current source element having a first control signal, the first control signal controlling the conduction current provided by the first current source element, and a second current source element having a second control signal, the second control signal controlling the conduction current provided by the second current source element, wherein the first and the second control signals have different voltages during operation of the DAC. | 11-12-2009 |
20090284402 | Audio Processor - An audio processor is provided which includes a digital signal processor for processing a digital audio data in an inputted digital audio file and a digital analog converter for converting the digital audio data processed by the digital signal processor into an analog audio data in accordance with a sampling frequency of the digital audio data. If a sampling frequency of a digital audio data in a digital audio file which is earlier inputted is different from that of a digital audio data in a digital audio file which is subsequently inputted when a plurality of digital audio files are successively inputted, the digital signal processor adds a silent data of time which is the same or longer as time for completing a setting of the sampling frequency in a beginning of the digital audio data in the subsequently inputted digital audio file. | 11-19-2009 |
20090289825 | SYSTEMS AND METHODS FOR SYNTHESIS OF A SIGNAL - Systems and methods synthesize a signal from the odd harmonic frequency components of an input signal. An exemplary embodiment synthesizes a first signal with a digital to analog converter (DAC), generates a second signal from the first signal, and filters a selected one of the odd harmonic frequency components through a band pass filter to produce an output signal. The first signal is defined by a first frequency. The second signal is defined by the first frequency and comprises a fundamental frequency component and plurality of odd harmonic frequency components. The output signal has a frequency substantially equal to the frequency of the selected odd harmonic frequency component. | 11-26-2009 |
20090289826 | TECHNIQUE FOR IMPROVING MODULATION PERFORMANCE OF TRANSLATIONAL LOOP RF TRANSMITTERS - A transmit signal generated by the baseband processor in a translational loop type RF transmitter is “pre-distorted” so as to counter act magnitude distortion and group delay variation imposed by a narrow PLL signal filter. The pre-distortion occurs in two steps: a magnitude equalizer in the baseband processor pre-distorts the amplitude of the transmit signal according to the inverse of the PLL signal filter magnitude response, and a group delay equalizer linearizes the phase response of the entire transmitter chain, i.e., pre-distorts the transmit signal such that the combined phase response of magnitude equalizer, group delay equalizer, and PLL signal filter is linear. With such pre-distortion, a loop filter is provided for with component values that define a relatively small bandwidth for the loop filter to filter spurious tones that result from an IF reference feedthrough to a voltage controlled oscillator of the translational loop. | 11-26-2009 |
20090295612 | Method and Circuit for Converting an N-Bit Digital Value into an Analog Value - A method for converting an N-bit digital value into an analog value is provided. N-M most significant bits of the digital value are converted into a first PWM signal whose period is a multiple of a base time period. M least significant bits of the digital value are converted into a second PWM signal whose period is a ½ | 12-03-2009 |
20090303094 | LOW VOLTAGE DIGITAL TO ANALOG CONVERTER, COMPARATOR AND SIGMA-DELTA MODULATOR CIRCUITS - Circuits that operate with power supplies of less than 1 Volt are presented. More particularly, circuits that operate with supply voltages near or lower than the threshold voltage of the transistors in those circuits are presented. Various circuits embodiments such as operational transconductance amplifiers ( | 12-10-2009 |
20090309775 | D/A converter and semiconductor integrated circuit including the same - In a current steering D/A converter, a 1LSB current source | 12-17-2009 |
20090315748 | Enhancing Perceptual Performance of SBR and Related HFR Coding Methods by Adaptive Noise-Floor Addition and Noise Substitution Limiting - Methods and an apparatus for enhancement of source coding systems utilizing high frequency reconstruction (HFR) are introduced. The problem of insufficient noise contents is addressed in a reconstructed highband, by using Adaptive Noise-floor Addition. New methods are also introduced for enhanced performance by means of limiting unwanted noise, interpolation and smoothing of envelope adjustment amplification factors. The methods and apparatus used are applicable to both speech coding and natural audio coding systems. | 12-24-2009 |
20100013689 | REDUCED COMPONENT DIGITAL TO ANALOG DECODER AND METHOD - An n bit D/A decoder is formed using P-type and N-type transistor switches, instead of convention CMOS switches. Each P-type and N-type switch may be formed of fewer transistors than those used to form a CMOS switch, thereby reducing the overall transistor count. The decoder may be used to decode digital values to non-linear GAMMA corrected analog output voltages. | 01-21-2010 |
20100019945 | SYSTEM UNIT ELEMENT SELECTION - The management of unit element selections in a system that includes multiple unit elements. The system includes an element selection component that is configured so that each of the multiple elements is used the same number of times over a certain number of selection cycles. This preserves the first order noise shaping of the mismatch noise thereby keeping a high signal to noise ratio. In addition, the selection of the unit elements is not done in a periodic fashion. This allows the system to avoid tones within the signal band. | 01-28-2010 |
20100026540 | DA CONVERTER - The present invention provides a DA converter that gives good linearity of output voltage of an IV conversion amplifier, and improves THD characteristics. In the DA converter, a current path x | 02-04-2010 |
20100045501 | Hardware-Efficient Reconstruction for Periodic Non-Uniformly Sampled Signals - Method and apparatus for signal reconstruction enabling the sharing of analog-to-digital converter resources among signals. Embodiments include a signal reconstruction method that allows reconstruction of multiple non-uniformly sampled signals while avoiding unwanted side effects such as aliasing. | 02-25-2010 |
20100052963 | Digital-to-Analog Converter - A PRA-DAC is disclosed. The PRA-DAC is operable to increase its conversion speed. | 03-04-2010 |
20100052964 | Digital to Analog Converter and Display Driving System Thereof - A digital to analog converter of the source driver includes a gamma voltage generator and a data decoder. The gamma voltage generator receives a gamma code to generate an analog gamma voltage. The gamma voltage includes a register, a reference decoder, and a calibrator. The register stores the gamma code. The reference decoder converts the gamma code from the register into the analog gamma voltage. The calibrator, receiving a reference gamma voltage in a calibration mode, includes a comparator and a counter, in which the counter tunes the gamma code according to the control signal generated by the comparator comparing the analog gamma voltage and the reference gamma voltage. The data decoder receives digital pixel data and selects one gamma voltage as a driving voltage based on the digital pixel data. | 03-04-2010 |
20100052965 | DIGITAL-ANALOG CONVERTER CIRCUIT, SOLID-STATE IMAGING DEVICE, AND IMAGING APPARATUS - A digital-analog converter circuit includes: a first digital-analog conversion part that obtains an analog output signal in response to a value of a digital input signal; and a second digital-analog conversion part that generates a control signal in response to a value of a digital gain control input signal externally input, wherein the first digital-analog conversion part adjusts a start voltage or end voltage of the analog output signal based on the digital gain control input signal for controlling the second digital-analog conversion part. | 03-04-2010 |
20100060499 | CONTROL CLOSED-LOOP DEVICE AND SIGMA-DELTA MODULATOR - The present invention relates to a device for slaving a first component in a closed loop, a second component in the return circuit to the loop input having a multiplicative noise. It also relates to a sigma-delta modulator making it possible to convert an analog input signal into a digital output signal on the basis of an analog-to-digital converter slaved in a closed loop using this device. A compensation noise is added to the input signal of the slaving loop, the compensation noise being substantially equal to the input signal of the slaving loop multiplied by the multiplicative noise of the second component. | 03-11-2010 |
20100073212 | DIGITAL-TO-ANALOG CONVERTING SYSTEM WITH SAMPLING RATE CONVERSIONS AND SAMPLING RATE CONVERTING METHOD THEREOF - A digital-to-analog converting system with sampling rate conversions includes an interpolator, S orders of operating and filtering units, an up-converting and down-converting circuit, and a signal processing circuit. The interpolator performs an N-times interpolation on a first digital input signal to generate a second digital input signal. Each order of the operating and filtering unit includes a K-times zero-padding circuit and a filtering circuit. The filtering circuit performs a filtering operation to generate a filtered digital input signal. The up-converting and down-converting circuit performs a B-times up-conversion and an A-times down-conversion on the filtered digital input signal to generate a fourth digital input signal. The signal processing circuit generates an analog output signal according to the fourth digital input signal. | 03-25-2010 |
20100109926 | System and Method to Modify a Metadata Parameter - A method includes receiving first encoded digital audio data including a metadata parameter having a first value. The first encoded digital audio data has a first dynamic range. The method includes receiving second encoded digital audio data including the metadata parameter having the first value. The second encoded digital audio data has a second dynamic range. The method also includes outputting first decoded digital audio data including the metadata parameter. The first decoded digital audio data corresponds to the first encoded digital audio data. The method also includes outputting second decoded digital audio data including a modified metadata parameter having a second value. The second decoded digital audio data corresponds to the second encoded digital audio data. | 05-06-2010 |
20100134336 | CODEC PLATFORM APPARATUS - A codec platform apparatus which can perform encoding or decoding regardless of a sampling frequency supported by a codec platform is provided. The codec platform apparatus includes an analog-to-digital converter (ADC) converting an analog input signal into a digital signal by sampling the analog input signal at a codec platform sampling frequency; a sampling frequency converter converting the digital signal provided by the ADC into a digital signal having a codec sampling frequency; and an encoder generating a bit stream by compressing the digital signal provided by the sampling frequency converter. Since there is no need to adopt a new codec platform even when an existing codec platform does not support the sampling frequency of a new codec, there is no need to implant the new codec. Therefore, it is possible to improve user satisfaction. | 06-03-2010 |
20100141494 | DIGITAL-TO-ANALOG CONVERTER HAVING EFFICIENT SWITCH CONFIGURATION - A DAC includes a gamma voltage generator for generating a plurality of gamma voltages, and a decoder for receiving an M-bit digital value for selecting one of the gamma voltages, wherein the decoder comprises a first thermometer encoder, a first selector and a second selector. The first thermometer encoder is utilized to receive N bits of the digital value to generate a first thermometer code with 2 | 06-10-2010 |
20100141495 | Digital-Analog Converter - A parallel digital-analog converter for the conversion of a plurality of differential digital input signals into a differential analog output signal, including a group of 1-bit digital-analog converters ( | 06-10-2010 |
20100141496 | D/A CONVERSION CIRCUIT - DAC includes a reference current setting unit (RCSU) that sets reference current, and current cell output unit (CCOU) including plurality of current sources, the current sources being configured to output currents corresponding to the reference current, the CCOU being configured to generate analog voltage signal according to an input digital signal, wherein the RCSU includes, reference current source (RCS) that generates the reference current, first and second resistance through which the reference current flows, selection control circuit that, when amplitude level of the analog voltage signal is to be changed, selects at least one of the first and second resistances and connect the selected resistance to the RCS, and reference current control circuit that controls current amount of reference current of the RCS according to voltage generated by resistance selected from among the first and second resistances. | 06-10-2010 |
20100149014 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit | 06-17-2010 |
20100156688 | MULTIPLYING DIGITAL-TO-ANALOG CONVERTER - A multiplying digital-to-analog converter includes an operational amplifier (OP-amp) operated under a first power supply voltage and a second power supply voltage; an OP-amp input switch block coupled to a common mode voltage for selectively coupling the common mode voltage to input nodes of the OP-amp, wherein all switches included in the OP-amp input switch block are implemented utilizing PMOS transistors only, and the common mode voltage is substantially equal to the first power supply voltage; a capacitor block coupled to the OP-amp input switch block; a sampling switch block coupled to the input signal for selectively coupling the input signal to the capacitor block; a reference voltage switch block coupled to the capacitor block for selectively coupling the reference signal to the capacitor block; and a feedback switch block coupled between the capacitor block and output nodes of the OP-amp. | 06-24-2010 |
20100176978 | DAC WITH DATA INDEPENDENT COMMON MODE DYNAMICS - A current-steered DAC has first and second differential outputs for providing an analog output signal under control of a digital input signal. In operational use of the DAC, the output signal has a differential component, which is representative of the digital input signal, and also has a first common-mode component. The DAC has circuitry operative to add an extra common-mode component to both the first and second differential outputs so as to make a sum of the first common-mode component and the extra common-mode component substantially independent of a state change of the digital input signal. | 07-15-2010 |
20100182180 | D/A CONVERTER, DIFFERENTIAL SWITCH, SEMICONDUCTOR INTEGRATED CIRCUIT, VIDEO APPARATUS, AND COMMUNICATION APPARATUS - A D/A converter has a plurality of current sources (IS | 07-22-2010 |
20100201556 | IMAGE DISPLAY DEVICE AND DRIVING METHOD THEREOF - A novel driving method is provided in which source line inverting drive or dot inverting drive is performed for a case of driving a plurality of source lines by one D/A converter circuit in a source signal line driver circuit of an active matrix image display drive that corresponds to digital image signal input. In a first driving method of the present invention, two systems of grey-scale electric power supply lines are supplied to a source signal line driver circuit in order to obtain output having differing polarities from a D/A converter circuit, switches for connecting to the two systems of grey-scale electric power supply lines are prepared in each D/A converter circuit, the grey-scale electric power supply lines connected to each D/A converter circuit are switched in accordance with a control signal input to the switches, and source line inverting drive or dot inverting drive are performed. | 08-12-2010 |
20100207796 | CONVERTER, CONVERSION METHOD, PROGRAM, AND RECORDING MEDIUM - Provided is a highly accurate converter and the like that makes up for the instability of circuit elements, by focusing on a relationship between the Markov chain and β conversion. A converter | 08-19-2010 |
20100225518 | DIGITAL/ANALOG CONVERTER CIRCUIT - A selection section ( | 09-09-2010 |
20100238059 | ADAPTIVE DIGITAL AUDIO PRE-DISTORTION IN AN AUDIO DIGITAL TO ANALOG CONVERTER - An adaptive digital pre-distortion block is used to cancel device nonlinearities to improve the overall linearity of a Delta-Sigma DAC system. In particular, the pre-distortion block may be implemented all in digital components and utilize programmable registers that change the pre-distortion transfer function either statically or dynamically, or both. Static changes can be for variation in process corners during production, whereas, dynamic changes can be used to correct nonlinear changes that can occur from environmental reasons such as voltage, temperature, aging and device stress. | 09-23-2010 |
20100245145 | UN-BUFFERED SEGMENTED R-DAC WITH SWITCH CURRENT REDUCTION - An resistor string digital-to-analog converter (DAC) that includes elements to compensate for resistor ladder loading, and/or to provide compensation for loading such as via switch current cancellation. The approach reduces output voltage sensitivity to switch resistances while also reducing INL and DNL errors. Additional resistor loops are optionally disposed at the top and bottom of one or more further segments to provide N | 09-30-2010 |
20100253561 | LOW NOISE CURRENT STEERING DAC - A low noise current steering digital-to-analog converter (DAC). The DAC includes a current reference for generating a bias current that biases a set of current elements. The set of current elements includes a reference element. The current reference includes a reference amplifier and a reference arm. The reference arm includes a reference resistor and the reference element. The DAC further includes a switch periodically coupling each current element including the reference element, to the reference resistor and an output of the DAC. This rotates the set of current elements and attenuates flicker noise from each of the set of current elements. | 10-07-2010 |
20100253562 | CURRENT STEERING DAC - In a multi-channel current steering DA converter, e.g., a two-channel current steering DA converter, reference current sources Irefa and Irefb that can serve as current mirror sources for current sources Ia and Ib are provided in current source matrices | 10-07-2010 |
20100259432 | DIGITAL-TO-ANALOG CONVERTER AND SUCCESSIVE APPROXIMATION TYPE ANALOG-TO-DIGITAL CONVERTER INCLUDING THE SAME - A digital-to-analog converter generates a voltage from power supply and ground voltages, generates upper and lower limit reference voltages for a reference width which regards the generated voltage as an intermediate potential, converts a change in an analog input signal with respect to the upper and lower limit reference voltages into a digital code, and performs a control in order to achieve a sample and hold of the analog input signal. | 10-14-2010 |
20100265112 | Digital-to-Analog Conversion Circuit - A digital-to-analog conversion circuit includes a first digital-to-analog converter (DAC), a second DAC, and a control circuit to select which DAC to use for digital-to-analog conversion of a digital signal. Concerned with the noise level produced at a given out-of-band frequency, the control circuit bases its selection of DACs, at least in part, on a frequency distance between the given out-of-band frequency and the digital signal's frequency. The control circuit, for example, may select the DAC producing the lowest noise level at that frequency distance, or, if both DACs are able to reduce noise to a level below a noise tolerance specified for the frequency distance, the DAC consuming the least power. To reduce the chip area required for the digital-to-analog conversion circuit, the first and second DACs advantageously have topologies that permit them to share common components (e.g., DAC unit elements). | 10-21-2010 |
20100271245 | COMPLEX-ADMITTANCE DIGITAL-TO-ANALOG CONVERTER - A circuit includes a digital-to-analog converter configured to produce an analog output signal (1) proportional to a reference signal and (2) as a function of a digital input signal. The converter comprises a plurality of non-trivially complex admittances configured so that each non-trivially complex admittance can be selectively switched as a function of the digital input signal so as to be coupled between a reference terminal configured to receive a reference signal and an output terminal. The method comprises selectively switching non-trivially complex admittances as a function of the digital signal between a reference terminal and an output terminal. | 10-28-2010 |
20100277356 | OSCILLATION FREQUENCY CONTROL CIRCUIT, DC-DC CONVERTER INCLUDING THE OSCILLATION FREQUENCY CONTROL CIRCUIT, AND SEMICONDUCTOR DEVICE - An oscillation frequency control circuit controls a second oscillation circuit, which generates and outputs a second clock signal of a second frequency according to a received control signal, to control the second frequency. The oscillation frequency control circuit includes a frequency difference detection circuit unit configured to detect a difference between a predetermined first frequency of a first clock signal generated by an external first oscillation circuit and the second frequency, and generate and output an output signal indicating a detection result, and a frequency control circuit unit configured to control, according to the output signal of the frequency difference detection circuit unit, the second oscillation circuit to control the second frequency of the second clock signal to make an absolute value of the difference between the first frequency and the second frequency greater than a predetermined value. | 11-04-2010 |
20100289683 | REFERENCE VOLTAGE GENERATION CIRCUIT, A/D CONVERTER AND D/A CONVERTER - A reference voltage generation circuit of the present invention includes: a reference voltage generation part | 11-18-2010 |
20100309036 | MULTIPLYING-ADDING RETURN TO ZERO DIGITAL TO ANALOG CONVERTER CIRCUIT AND METHOD - A digital to analog converter (DAC) method and apparatus employs a multiplying-adding DAC, eliminating digital adder circuitry. Examples are given for multiplying a 3-bit binary number by a 2-bit binary number; however, there are no limitations to the bit-widths of the numbers to be multiplied. The multiplying-adding DAC method can be scaled up or down in bit-width by feeding the DAC with partial sums and adjusting the DAC weights accordingly. An analog to digital converter (ADC) can be placed after the DAC to generate a digital output. By multiplexing preset digital data into the DAC core for return to zero (RTZ), a true zero that is the midpoint of the DAC output range is achieved. It does not return to a rail for single-ended outputs. RTZ in DAC circuits doubles the null frequency of sin(x)/x roll-off inherent in DACs and also helps reduce switching glitches in the DAC output. | 12-09-2010 |
20100315276 | CURRENT SWITCH CIRCUIT AND D/A CONVERTER, SEMICONDUCTOR INTEGRATED CIRCUIT, AND COMMUNICATION DEVICE USING THE SAME - [Means for Solving the Problem] In a current switch circuit A used for a current steering D/A converter, a current switch basic circuit | 12-16-2010 |
20100328126 | DIGITAL TO ANALOG CONVERTER - An embodiment of a digital to analog converter (DAC) with two outputs is provided. The DAC is controlled by an n-bits input signal and comprises a reference voltage circuit generating (2n+1) reference voltages, a first switch array and a second switch array. The first switch array receives and outputs 2 | 12-30-2010 |
20100328127 | INTERFERENCE REDUCTION USING VARIABLE DIGITAL-TO-ANALOG CONVERTER (DAC) SAMPLING RATES - A method for interference reduction is described. A sampling frequency is selected for a digital-to-analog converter (DAC) so that images within a DAC output signal do not interfere with one or more receivers. A sample rate is adjusted of an input signal that is provided to the DAC to match the sampling frequency for the DAC. | 12-30-2010 |
20100328128 | D/A Conversion Circuit and Semiconductor Device - A D/A conversion circuit in accordance with the present invention, which is provided with a switch swD, allows a writing operation of a voltage (a true gradation voltage) to be performed at a higher speed by first applying a first voltage (a voltage close to the true gradation voltage), which is supplied without passing through a resistor element, to an output line and then applying a second voltage (the true gradation voltage), which is supplied via the resistor element, to the output line. Thus, the present invention can provide a D/A conversion circuit capable of writing display data to liquid crystal cells with higher precision at higher speed, and a semiconductor device utilizing such a D/A conversion circuit. | 12-30-2010 |
20110012769 | DIFFERENTIAL SWITCH, D/A CONVERTER, SEMICONDUCTOR INTEGRATED CIRCUIT AND COMMUNICATION APPARATUS - A differential switch circuit includes a first differential switch basic circuit ( | 01-20-2011 |
20110012770 | D/A CONVERTER AND SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING THE SAME - In a current steering D/A converter, a 1LSB current source | 01-20-2011 |
20110018753 | NOISE-SHAPED SEGMENTED DIGITAL-TO-ANALOG CONVERTER - A segmented digital-to-analog converter (DAC) is disclosed. In the present invention, the segmented DAC of the present invention comprises a signal component processing stage and a plurality of noise component processing stages cascaded with the signal component processing stage. A noise component of an input word for the DAC is split into a plurality of portions to be processed. By doing so, effect due to gain mismatch(es) in an analog portion of the DAC can be effectively reduced without significantly increasing DAC cells used in the DAC | 01-27-2011 |
20110025538 | DIGITAL-TO-ANALOG CONVERTERS AND METHODS THEREOF - A digital-to-analog converter for converting a digital signal into an analog signal is provided. The digital-to-analog converter includes a preprocessing unit, a gain controller, a modulator and an output unit. The preprocessing unit receives and oversamples the digital signal to generate an oversampled signal. The gain controller generates an adjusted signal with a gain function according to a reference signal associated with the oversampled signal when a specific condition is present. The modulator modulates the adjusted signal and generates a modulated signal. The output unit provides the analog signal to a load according to the modulated signal, wherein the analog signal gradually approaches to a specific level according to the gain function when the specific condition is present. | 02-03-2011 |
20110025539 | CONTINUOUS-TIME IMAGE-REJECT FILTER WITH DISCRETE-TIME FEEDBACK - Apparatus are provided for converting a discrete-time analog signal to a continuous-time analog signal. A module comprises a digital-to-analog converter and a filtering arrangement coupled between the digital-to-analog converter and an output node. The digital-to-analog converter converts a digital signal to a discrete-time analog signal. The filtering arrangement comprises a forward signal arrangement having an input configured to receive the discrete-time analog signal and a feedback signal arrangement coupled to the forward signal arrangement. The feedback signal arrangement generates a discrete-time feedback signal at the input of the forward signal arrangement based on one or more continuous-time analog signals from the forward signal arrangement. The forward signal arrangement generates the continuous-time analog output signal at the output node based on a difference between the discrete-time analog signal and the discrete-time feedback signal. | 02-03-2011 |
20110025540 | DATA LOOK AHEAD TO REDUCE POWER CONSUMPTION - Portions of a digital signal are buffered prior to being provided to a sub-system (e.g., a segmented DAC of a LDD) that is responsive to the digital signal. While being buffered, there is a determination, based on the buffered portions of the digital signal, of when one or more portions of the sub-system and/or another sub-system can be switched from a first state to a second state, where the second state results in less power dissipation than the first state. Additionally, or alternatively, while the portions of the digital signal are being buffered, there can be a determination, based on the buffered portions of the digital signal, of when one or more system related parameters can be adjusted to temporarily reduce power dissipation. Based on results of the determination(s), the state of one or more portions of the sub-system and/or another sub-system is/are selectively switched from the first state to the second state, or vice versa. Eventually, the portions of the digital signal are provided to the sub-system so that the sub-system can respond to the portions of the digital signal. | 02-03-2011 |
20110032133 | METHOD AND DEVICE FOR DETERMINING THE ANGLE OF BEARING IN A TACAN TYPE RADIONAVIGATION SYSTEM - Method making it possible to reconstruct a first signal taking the form of a series of pulses of width T, characterized in that it comprises a step in which a delay τ fixed with respect to the first signal to be reconstructed is introduced into a second signal having a sinusoidal shape and in that the porches of width T of the first signal at an instant t are substituted with portions of sinusoid of the second delayed sinusoidal signal corresponding to an instant t−1 so as to reconstruct a signal having a sinusoidal shape. | 02-10-2011 |
20110032134 | DIGITAL-TO-ANALOG CONVERTER - A digital-to-analog converter (DAC) is provided. The DAC includes a positive converter, a negative converter, and a comparator for receiving outputs of the positive converter and the negative converter, comparing the outputs with a reference voltage, and generating an output voltage. Each of the positive converter and the negative converter includes an upper-bit converter including a plurality of bit capacitors corresponding to respective upper bits, a lower-bit converter including a plurality of bit capacitors corresponding to respective lower bits, and a coupling capacitor for connecting the upper-bit converter with the lower-bit converter in series. Each of the positive converter and the negative converter receives a bias voltage to have a uniform offset when converting the respective bits. Accordingly, it is possible to obtain a high resolution using a small area. Also, the number of capacitors can be reduced, and the capacitance of a unit capacitor can be maximized. Consequently, it is possible to minimize heat noise and device mismatching. | 02-10-2011 |
20110043399 | RETURN TO ZERO DIGITAL TO ANALOG CONVERTER AND CONVERTING METHOD THEREOF - The present invention relates to a digital to analog converter, to a return-to-zero digital to analog converter with improved wideband characteristics by enabling a return-to-zero output without separate clock and controller, and a converting method thereof. Since the return-to-zero digital to analog converter and the converting method thereof are capable of outputting an RZ output without directly providing a clock signal to an analog circuit by configuring a switch for generating a zero point signal and a differential pipeline for providing a differential signal to control the switch according to input digital data using a differential structure, the converter can provide wideband characteristics and high dynamic performance. | 02-24-2011 |
20110057825 | Diode smart track - Systems and methods to achieve a logarithmic digital-to-analog converter (DAC), which is easy to be implemented, and requiring reduced chip space have been disclosed. The logarithmic DAC is created by a simple and easy to scale linear DAC, which is linearly scaling a predefined voltage range. The output voltage of the linear DAC is converted to a logarithmic current value directly by the voltage-current characteristic of an integrated diode. | 03-10-2011 |
20110068963 | DIGITAL-ANALOG CONVERTER CIRCUIT AND METHOD FOR FAULT DETECTION - A digital-analog converter circuit having a first subcircuit for converting a digital signal to an analog voltage, a second subcircuit for determining a first area in which the digital signal lies, a third subcircuit for determining a second area in which the analog voltage lies, and a fourth subcircuit for comparing the first and the second area. Also, a method for fault detection in a digital-analog converter circuit. | 03-24-2011 |
20110074615 | WIDEBAND DIGITAL TO ANALOG CONVERTER WITH BUILT-IN LOAD ATTENUATOR - A circuit for digital-to-analog conversion is described. The circuit includes a digital-to-analog converter (DAC). The DAC includes a double cascaded current source and a differential current-mode switch (DCMS). The circuit further includes a direct current (DC) offset stage. The circuit also includes a load attenuator. The double cascaded current source may be between the DCMS and a rail voltage. | 03-31-2011 |
20110080310 | DIGITAL-TO-ANALOG CONVERTER (DAC) WITH REFERENCE-ROTATED DAC ELEMENTS - In accordance with at least some embodiments, an electronic device comprises a digital-to-analog converter (DAC) having a DAC element array. Reference-rotated data weighted averaging (RRDWA) is applied to the DAC element array. | 04-07-2011 |
20110084864 | SINGLE-ENDED POLAR TRANSMITTING CIRCUIT WITH CURRENT SALVAGING AND SUBSTANTIALLY CONSTANT BANDWIDTH - An embodiment of the invention provides a single-ended polar transmitting circuit. The single-ended polar transmitting circuit comprises a DAC, a differential-to-single-ended converter, a GmC filter and a load. The GmC filter comprises two gain stages, two filters, two switching devices, a translinear loop and a current mirror. When a second clock signal is high, a first current is conducted through the load, a second switching device and a second gain stage. When a first clock signal is high, a second current is conducted through a first switching device and the second gain stage. The first gain stage has a transconductance Gm | 04-14-2011 |
20110084865 | DIGITAL RF CONVERTER AND RF CONVERTING METHOD THEREOF - Provided are a digital radio frequency (RF) converter and an RF converting method thereof. The RF frequency converter includes first and second RF output terminals of a differential form outputting an RF signal; a differential switch selectively connecting first and second nodes into the first and second RF output terminals in response to an oscillating waveform; at least one digital delay device column outputting a plurality of unit bits by sequentially delaying an input bit corresponding to the digital input signal; a front-end processor summing an output of the at least one digital delay device column; a plurality of current sources; and a plurality of first switches corresponding to the plurality of current sources, respectively, and delivering currents of current sources whose number corresponds to the sum value of the front-end processor among the plurality of current sources, to one of the first and second nodes. | 04-14-2011 |
20110102225 | METHOD FOR REDUCING CURRENT CONSUMPTION OF DIGITAL-TO-ANALOG CONVERSION, AND ASSOCIATED TRI-STATE CURRENT DIGITAL-TO-ANALOG CONVERTER - A method for reducing current consumption of digital-to-analog conversion includes: monitoring logical states of a set of differential digital inputs, wherein the set of differential digital inputs are utilized for controlling at least one tri-state current Digital-to-Analog Converter (DAC) cell of a tri-state current DAC, and the tri-state current DAC cell has a positive output current state, a zero output current state and a negative output current state; and when the logical states of the set of differential digital inputs instruct the tri-state current DAC cell should output no positive/negative current, controlling the tri-state current DAC cell to switch to the zero output current state, temporarily decreasing a direct current passing through a middle path of the tri-state current DAC cell. An associated tri-state current DAC is also provided, where the tri-state current DAC includes: the at least one tri-state current DAC cell; and a control device. | 05-05-2011 |
20110128174 | DIGITAL TO ANALOG CONVERTER - A digital to analog converter with two outputs controlled by an input signal with n-bits is disclosed. A reference voltage circuit generates (2 | 06-02-2011 |
20110140941 | Voltage adder circuit and D/A converter circuit - A voltage adder circuit includes an amplifier circuit having a first operational amplifier and into which a first voltage is input, a circuit that supplies an output current to the amplifier circuit, and a current providing section that detects the output current of the circuit and supplies an output current equal to the output current of the circuit in magnitude so that the output current of the circuit is prevented from inputting to or outputting from the first operational amplifier through an output terminal of the first operational amplifier. A second voltage is input into the circuit. | 06-16-2011 |
20110140942 | Conversion of a Discrete Time Quantized Signal into a Continuous Time, Continuously Variable Signal - Provided are, among other things, systems, apparatuses, methods and techniques for converting a discrete-time quantized signal into a continuous-time, continuously variable signal. An exemplary converter preferably includes: (1) multiple oversampling converters, each processing a different frequency band, operated in parallel; (2) multirate (i.e., polyphase) delta-sigma modulators (preferably second-order or higher); (3) multi-bit quantizers; (4) multi-bit-to-variable-level signal converters, such as resistor ladder networks or current source networks; (5) adaptive non-linear, bit-mapping to compensate for mismatches in the multi-bit-to-variable-level signal converters (e.g., by mimicking such mismatches and then shifting the resulting noise to a frequently range where it will be filtered out by a corresponding bandpass (reconstruction) filter); (6) multi-band (e.g., programmable noise-transfer-function response) bandpass delta-sigma modulators; and/or (7) a digital pre-distortion linearizer (DPL) for canceling noise and distortion introduced by an analog signal bandpass (reconstruction) filter bank. | 06-16-2011 |
20110169678 | HIGH FIDELITY, RADIATION TOLERANT ANALOG-TO-DIGITAL CONVERTERS - Techniques for an analog-to-digital converter (ADC) using pipeline architecture includes a linearization technique for a spurious-free dynamic range (SFDR) over 80 deciBels. In some embodiments, sampling rates exceed a megahertz. According to a second approach, a switched-capacitor circuit is configured for correct operation in a high radiation environment. In one embodiment, the combination yields high fidelity ADC (>88 deciBel SFDR) while sampling at 5 megahertz sampling rates and consuming <60 milliWatts. Furthermore, even though it is manufactured in a commercial 0.25-μm CMOS technology (1 μm=12 | 07-14-2011 |
20110169679 | DIGITAL-TO-ANALOG CONVERTER - A complementary pulse width modulation circuit is composed of a signal generating circuit | 07-14-2011 |
20110175763 | DIGITAL-TO-ANALOG CONVERTER - The present invention relates to a digital-to-analog converter comprising a differentiation circuit, a conversion circuit, and an integration circuit. The differentiation circuit receives and differentiates a digital signal for producing a differentiation signal. The conversion circuit is coupled to the differentiation circuit. It receives the differentiation signal and produces a conversion signal according to a clock signal and the differentiation signal. The integration circuit is coupled to the conversion circuit. It receives and integrates the conversion signal for producing an analog signal. Thereby, the purpose of reducing distortion noises can be achieved. | 07-21-2011 |
20110187572 | Method and Device for Converting a Digital Input Signal to an Analog Output Signal - A method and a device are for converting a digital input signal to an analog output signal, for example in vehicle safety systems. In the method, a first and a second pulse-width modulated signal is used for generating a first and a second analog intermediate signal. The second intermediate signal is converted to a third intermediate signal, wherein this conversion is controlled by a third pulse-width modulated signal. A fourth analog intermediate signal is generated from the third intermediate signal. The analog output signal is then generated from the first intermediate signal and the fourth intermediate signal. The first, second and/or third pulse-width modulated signal is preferably but not necessarily derived from the same digital input signal. | 08-04-2011 |
20110193733 | OUTPUT APPARATUS AND TEST APPARATUS - Provided is an output apparatus comprising a plurality of current sources; a plurality of holding sections that correspond respectively to the current sources and that each hold a designated voltage that designates a current flowing through the corresponding current source; a setting DAC that sequentially generates the designated voltage to be held by each holding section; and a supply section that sequentially switches a supply of the designated voltage generated by the setting DAC among corresponding holding sections. | 08-11-2011 |
20110199248 | Digital-To-Analog Converter Of Data Driver And Converting Method Thereof - A digital-to-analog converter of a data driver and a converting method thereof, in which information corresponding to a lower bit is converted into an analog signal through control of current transmission paths and control of a transconductance ratio. Input data corresponding to a lower bit is converted into an analog signal through control of current transmission paths and control of a transconductance ratio between a delta current generation section and an output buffer amplifier. As a consequence, not only the area of a data driver can be significantly reduced, but also the delta current generation section can be realized even without using a common node feedback circuit, whereby an additional increase in area is not caused. | 08-18-2011 |
20110205095 | DATA LOOK AHEAD TO REDUCE POWER CONSUMPTION - Portions of a digital signal are buffered prior to being provided to a sub-system (e.g., a segmented DAC of a LDD) that is responsive to the digital signal. While being buffered, there is a determination, based on the buffered portions of the digital signal, of when one or more portions of the sub-system and/or another sub-system can be switched from a first state to a second state, where the second state results in less power dissipation than the first state. Additionally, or alternatively, while the portions of the digital signal are being buffered, there can be a determination, based on the buffered portions of the digital signal, of when one or more system related parameters can be adjusted to temporarily reduce power dissipation. Based on results of the determination(s), the state of one or more portions of the sub-system and/or another sub-system is/are selectively switched from the first state to the second state, or vice versa. Eventually, the portions of the digital signal are provided to the sub-system so that the sub-system can respond to the portions of the digital signal. | 08-25-2011 |
20110205096 | SYSTEMS INCLUDING A PROGRAMMABLE SEGMENTED DAC AND METHODS FOR USE THEREWITH - A segmented digital-to-analog converter (DAC) includes a plurality of sub-DACs, each of which is adapted to receive a separate reference current that specifies a transfer function of the sub-DAC. A magnitude of the reference current provided to each sub-DAC is separately programmable to thereby separately control a gain of each sub-DAC. The output of the DAC can be used to drive a load having a load transfer function that differs from a desired transfer function. In an embodiment, the separate reference currents provided the sub-DACs of the DAC are programmed to implement a DAC transfer function that causes the DAC and the load (driven by the output of the DAC) to collectively have an effective transfer function that is substantially similar to the desired transfer function. | 08-25-2011 |
20110221619 | DA CONVERTER, AD CONVERTER, AND SEMICONDUCTOR DEVICE - A DA converter includes a first DA conversion section for obtaining an analog output signal in accordance with a digital input signal value, and a second DA conversion section for obtaining an analog gain control output signal in accordance with a digital gain control input signal value. In the DA converter, the gain control of the analog output signal generated by the first DA conversion section is performed on the basis of the gain control output signal generated by the second DA conversion section. | 09-15-2011 |
20110234438 | Signal Processing Apparatus - A signal processing apparatus includes: a digital processing unit to which a digital input signal is supplied, which performs a digital process on the digital input signal to produce a digital signal, and which produces a control signal designating a specific time period when an amplitude of an analog output signal is to be lowered; a DA-conversion unit which converts the digital signal to produce an analog signal; and a variable gain unit which adjusts an amplitude of the analog signal to produce the analog output signal, and which lowers the amplitude of the analog output signal during the specific time period designated by the control signal. | 09-29-2011 |
20110254719 | DECORRELATION OF DATA BY USING THIS DATA - A device for processing data adapted for being converted between an analog format and a digital format, the device having a scrambling unit adapted for scrambling the data based on at least a part of the data to thereby decorrelate the data in the analog format with respect to the data in the digital format. | 10-20-2011 |
20110254720 | Mismatch-Immune Digital-to-Analog Converter - In an embodiment, a digital-to-analog converter (DAC) includes inputs for receiving first and second signals encoded as a digital signal pair including overlapping low value portions that are substantially equal in duration to overlapping high value portions, within a frame. The DAC further includes an output terminal for providing an analog signal and includes first and second switches responsive to the first and second signals alter a level of the analog signal based on values of the first and second signals to provide a mismatch-immune DAC functionality. In one instance, the switches couple current sources to a common node. In another instance, the switches configure a resistive network to alter a resistance at an input to an amplifier. | 10-20-2011 |
20110267213 | FINGER-SPLIT AND FINGER-SHIFTED TECHNIQUE FOR HIGH-PRECISION CURRENT MIRROR - A current cell array includes a number of current cell groups arranged such that they extend in a first direction. Each of the current cell groups is identified by a first identifier that increases in a direction of a gradient across the current cell array. A number of current cells are included in each of the current cell groups. Each of the current cells is identified by a respective second identifier that increases in the direction of the gradient across the current cell array. The current cells are positioned in the current cell groups based on the first and second identifiers. | 11-03-2011 |
20110273317 | CURRENT-SWITCHING CELL AND DIGITAL-TO-ANALOG CONVERTER - Two D flip-flops (D-FF | 11-10-2011 |
20120032829 | DIGITAL-TO-ANALOG CONVERTER WITH CODE INDEPENDENT OUTPUT CAPACITANCE - A Digital-to-Analog Converter (DAC) with code independent output capacitance includes circuitry configured to convert a digital input signal to an analog output signal in a manner such that at least one output terminal of the DAC exhibits a constant capacitance value for up to all received values of the digital input signal. A method for converting a digital signal to an analog signal with a DAC includes converting a digital input signal to an analog output signal in a manner such that at least one output terminal of the DAC exhibits a constant capacitance value for up to all received values of the digital input signal. | 02-09-2012 |
20120056768 | DIGITAL/ANALOG CONVERTER - A digital/analog converter converts an input digital signal to an analog signal and outputs the analog signal. The digital/analog converter has first and second transistors that are complementarily switched by a first digital signal included in the digital signal. The digital/analog converter has a first current source having a first end connected to a first potential, and having a second end connected to a first end of the first transistor and a first end of the second transistor, to output a constant current. The digital/analog converter has a third transistor having a first end connected to a second end of the first transistor. The digital/analog converter has a fourth transistor having a first end connected to a second end of the second transistor. The digital/analog converter has a first output terminal connected to a second end of the third transistor to output a first analog signal. The digital/analog converter has a control circuit that controls gate voltages of the third transistor and the fourth transistor according to the digital signal such that the third transistor and the fourth transistor operate in a saturation region. | 03-08-2012 |
20120086592 | Integrated Upstream Amplifier for Cable Modem and Cable Set-Top Boxes - An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change. | 04-12-2012 |
20120092201 | System and method for compact cyclic digital to analog converter - A system for implementing a cyclic digital to analog converter (c-DAC) is capable of supporting a large size liquid crystal display. The system includes an upper DAC stage configured to output a first voltage between a lower voltage supply (HVDD) and an upper voltage supply (AVDD). The system also includes a lower DAC stage configured to output a second voltage between the lower voltage supply (HVDD) and a ground. The upper DAC stage includes a single PMOS switch and the lower DAC stage includes a single NMOS switch. | 04-19-2012 |
20120098689 | D/A Conversion Circuit and Semiconductor Device - A D/A conversion circuit in accordance with the present invention, which is provided with a switch swD, allows a writing operation of a voltage (a true gradation voltage) to be performed at a higher speed by first applying a first voltage (a voltage close to the true gradation voltage), which is supplied without passing through a resistor element, to an output line and then applying a second voltage (the true gradation voltage), which is supplied via the resistor element, to the output line. Thus, the present invention can provide a D/A conversion circuit capable of writing display data to liquid crystal cells with higher precision at higher speed, and a semiconductor device utilizing such a D/A conversion circuit. | 04-26-2012 |
20120112944 | MULTIPLYING DAC AND A METHOD THEREOF - The present invention is directed to a multiplying digital-to-analog converter (MDAC) and its method. First ends of capacitors are electrically coupled to an inverting input node of an amplifier, wherein two of the capacitors are alternatively configured as a feedback capacitor. Each capacitor is composed of at least two sub-capacitors. Second ends of capacitors are electrically coupled to an input signal via a number of sampling switches, and the second ends of the capacitors are electrically coupled to DAC voltages respectively via a number of amplifying switches. A sorting circuit is configured to sort the sub-capacitors, wherein the sorted sub-capacitors are then paired in a manner such that variance of mismatch among the sub-capacitors is thus averaged. | 05-10-2012 |
20120127010 | HIGH-ORDER WIDE BAND MODULATORS AND MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS USING DISTRIBUTED WEIGHTING NETWORKS - A distributed weighting network that employs a summing line including distributed summing blocks disposed thereon. Each summing block includes a plurality of resistors that define a resistor divider network. Each summing block includes at least three ports having an input port, an output port and at least one signal port. A signal applied to each signal port of the summing blocks is modified in amplitude by the resistor divider network and summed with the signal propagating along the summing line being input to the input port and output from the output port of each summing block to provide a combined signal. The distributed weighting network can be part of a digital-to-analog converter or a QAM modulator. | 05-24-2012 |
20120161996 | Low-Memory-Usage Arbitrary Waveform Representation or Generation - This disclosure describes techniques and apparatuses for low-memory-usage arbitrary waveform representation or generation. These techniques and/or apparatuses enable representation and/or generation of arbitrary waveforms using less memory than many current techniques, thereby reducing costs or memory size. Further, in some embodiments the techniques and apparatuses generate arbitrary waveforms without using processor resources. | 06-28-2012 |
20120176263 | CURRENT SWITCH CIRCUIT AND DA CONVERTER - According to one embodiment, a first switch transistor and a second switch transistor convert an input current to a first current and a second current by performing a switching operation on the basis of differential input voltages, respectively. An input current source supplies the input current to the first and second switch transistors. A noise current generating circuit generates a dummy current to simulate a noise current flowing through the input current source. A third switch transistor and a fourth switch transistor convert the dummy current to a third current and a fourth current by performing a switching operation on the basis of differential input voltages and negatively superimposes the third current and the fourth current on the first and second currents, respectively. | 07-12-2012 |
20120176264 | GLITCH FREE DYNAMIC ELEMENT MATCHING SCHEME - A dynamic element matching (DEM) scheme is implemented in a crawling code generator for converting a b-bit binary input code into a (2 | 07-12-2012 |
20120188111 | CIRCUIT AND METHOD FOR OPTIMIZING DYNAMIC RANGE IN A DIGITAL TO ANALOG SIGNAL PATH - A circuit for maximizing dynamic range in a digital to analog signal path comprises an input for receiving an input signal, a first gain stage coupled to the input having a first gain setting, an second gain stage coupled to the first gain stage, the second gain stage having an second gain setting, a controller configured to selectively increase the first gain setting and decrease the second gain setting according to the input signal level and an output coupled to the second gain stage for transmitting an output signal. A method for maximizing dynamic range in a digital to analog signal path comprises detecting a digital input signal level, detecting a desired user gain level, applying a first gain to the digital input signal, converting the digital input signal into an analog signal, and applying a second gain to the analog signal, wherein the first and second gain are selectively and inversely manipulated according to the digital input signal while maintaining a desired user gain level. | 07-26-2012 |
20120194373 | DEVICE AND METHOD FOR DRIVING DIGITAL-TO-ANALOG CONVERTER - A device for driving a switch in a digital-to-analog converter (DAC) includes first and second latches, and a logic gate. The first latch is configured to store a digital input data signal according to a clock signal, and to output a first latch signal corresponding to the stored digital input data signal. The second latch is configured to store the first latch signal output by the first latch according to a logical inverse of the clock signal, and to output a second latch signal corresponding to the stored first latch signal. The logic gate is configured to perform an OR logic operation on the first latch signal and the second latch signal, the logic gate outputting a drive signal for driving a switch in the DAC connected to a current source. | 08-02-2012 |
20120194374 | DIGITAL TO ANALOG CONVERTER - N upper-side resistors and N lower-side resistors are severally associated with respective bits of a digital input code. Each resistance value is weighted in an essentially binary manner according to the corresponding bit. N upper-side switches are each arranged in parallel with a corresponding upper-side resistor, and each is configured such that its on/off state is controlled according to the corresponding bit. N lower-side switches are each arranged in parallel with a corresponding lower-side resistor, and each is configured such that its on/off state is controlled according to logical inversion of the corresponding bit. | 08-02-2012 |
20120200441 | OUTPUT CIRCUIT, AND DATA DRIVER AND DISPLAY DEVICES USING THE SAME - An output circuit includes a connection switch and an operation unit. The connection switch receives first and second voltages from first and second terminals, respectively, selects and outputs the first voltage or the second voltage for first to third intermediate terminals, including selection of the same voltage and switches assignment of the first and second voltages to the first to third intermediate terminals responsive to a connection switching signal. The operation unit receives the voltages assigned to the first to third intermediate terminals and outputs to an output terminal a voltage obtained by performing a predetermined operation on the voltages. | 08-09-2012 |
20120206284 | INTERPOLATING DIGITAL-TO-ANALOG CONVERTER WITH SEPARATE BIAS CURRENT SOURCE FOR EACH DIFFERENTIAL INPUT TRANSISTOR PAIR - The most significant portion of a digital word may be converted into a high and a low analog voltage representative, respectively, of the highest and lowest possible values which a digital word could have with the most significant portion. An analog output may be produced by interpolating between the high and the low analog voltage in accordance with the value of the least significant portion of the digital word. A differential transconductance input stage may have pairs of differential input transistors. For each differential input transistor pair, a separate bias current circuit may provide a bias current to the differential input transistor pair, separate from the bias current provided to the other differential input transistor pairs. All bias current circuits may be identical in a linear interpolator. The transconductance input stage may have a gain of at least 20 dB and may result in an integral non-linearity in the analog output of no more than 0.08 times the weight of the least significant bit of the digital word. | 08-16-2012 |
20120218135 | TRANSMISSION CIRCUIT, ULTRASONIC PROBE AND ULTRASONIC IMAGE DISPLAY APPARATUS - A transmission circuit for use with an ultrasonic probe including an ultrasonic transducer is provided. The transmission circuit includes a high voltage current DAC configured to output a drive current of an ultrasonic transducer to transmit and receive ultrasound, and a waveform generator configured to output a control signal from the high voltage current DAC to the high voltage current DAC with a predetermined timing. The control signal configured to output the drive current with a desired magnitude. | 08-30-2012 |
20120223850 | NON-UNIFORM SAMPLING TECHNIQUE USING A VOLTAGE CONTROLLED OSCILLATOR - A data converter circuit includes a non-uniform sampling circuit and a resampler circuit. The non-uniform sampling circuit includes a sampling voltage-controlled oscillator (VCO) having an input to receive an analog data signal and having an output to generate a quantized data signal, wherein the quantized data signal comprises a plurality of non-uniform transition intervals indicative of data contained in the analog data signal. The resampling circuit has an input to receive the quantized data signal and is configured to reconstruct the data from the quantized data signal. For some embodiments, the data converter can also include a PLL that includes a feedback VCO having matched components with the sampling VCO. | 09-06-2012 |
20120235843 | DIGITAL-TO-ANALOG CONVERTER AND CIRCUIT - The selection circuit is supplied with a low-voltage-side power supply voltage from a low-voltage-side power supply, and outputs a voltage that changes in 2 | 09-20-2012 |
20120249353 | SYSTEMS AND METHODS FOR ACQUIRING AND DECODING SIGNALS USING COMPRESSED SENSING - Systems and methods in accordance with embodiments of the invention utilize a CS architecture based on a sub-linear time recovery process (with reduced memory requirements). In several embodiments, a novel structured measurement matrix is exploited during signal acquisition allowing the use of a recovery process based on relatively simple computational primitives making it more amenable to implementation in a fully-integrated form. One embodiment of the invention includes an analog front end configured to receive an analog input signal, and CS sampling circuitry connected to an output of the analog front end and configured to generate a plurality of measurements using a structured measurement matrix, where each row of the structured measurement matrix is generated using a different predetermined check node. In addition, the CS sampling circuitry is configured to generate the plurality of measurements at a rate that is less than the Nyquist rate of the analog input signal. | 10-04-2012 |
20120274496 | Current Steering Circuit with Feedback - A differential current steering (CS) circuit uses feedback from the differential output nodes A and B to cause current steering devices (e.g., MOSFETs) to effectively exhibit an infinite output impedance when conducting. Therefore, the signal on the output nodes A or B does not significantly change the voltage at the common node, This is particularly useful when the differential output nodes are connected to differential output buses in a digital-to-analog converter. The circuit dynamically cancels, though feedback, the signal induced at the common node by the signal present at the “steered” output node. Therefore, the CS circuit effectively presents an infinite output impedance between the common node and the output nodes. In some cases, it may be desirable to not create a substantially infinite output impedance for the CS circuit but control the impedance to a predefined level to counter other distortions in the system. | 11-01-2012 |
20120286983 | RF DAC With Configurable DAC Mixer Interface and Configurable Mixer - One embodiment of the present disclosure relates to a circuit. The circuit includes a digital to analog converter (DAC) configured to convert a time-varying, multi-bit digital value to a corresponding time-varying output current. The circuit also includes a mixer module downstream of the DAC and comprising a plurality of mixers. A control block is configured to selectively steer output current from the DAC to different mixers of the mixer module. Other techniques are also described. | 11-15-2012 |
20120286984 | Digital-to-Analog Conversion Arrangement with Power Range Dependent D/A Converter Selection - A digital-to-analog conversion arrangement for converting a digital input signal comprises first and second digital-to-analog converters (DACs) having different signal resolutions and a digital-to-analog converter selector for selecting the first DAC or the second DAC if the digital input signal has a power in a first or a second power range, respectively. The digital-to-analog conversion arrangement further comprises an analog signal merger for merging a first analog signal and a second analog signal, the first analog signal being based on a first analog output signal of the first digital-to-analog converter and the second analog signal being based on a second analog output signal of the second analog-to-digital converter. A corresponding method for digital-to-analog conversion of a digital input signal and a computer readable digital storage medium are also described. | 11-15-2012 |
20120286985 | Interpolation-Based Digital Pre-Distortion Architecture - A non-linear amplifier is linearized using interpolation-based digital pre-distortion (DPD). In one embodiment, the digital input signal is interpolated to generate a higher-sample-rate signal that is then pre-distorted. The resulting higher-sample-rate pre-distorted signal is then decimated to generate a final pre-distorted digital signal that is converted into an analog pre-distorted signal by a digital-to-analog converter (DAC) before being applied to the amplifier. In a polyphase embodiment, different versions of the original input digital signal are generated, where each version is then pre-distorted using a different DPD module to generate a different intermediate pre-distorted digital signal. The intermediate pre-distorted signals are filtered and combined to generate the final pre-distorted digital signal. In both embodiments, better linearization (e.g., less aliasing) can be achieved without increasing the sample rate of the DAC and, in the polyphase embodiment, without increasing the processing speed of the DPD modules. | 11-15-2012 |
20120293352 | POWER DIGITAL TO ANALOG CONVERTER - A digital to analog converter having a plurality of power dividers interconnected into a binary tree configuration, each one having an input and a pair of electrically isolated outputs for dividing power of an input signal at the input equally between the pair of outputs. A plurality of amplifiers is coupled between one of the pair of outputs of the one of the power dividers in one stage of the tree and the input of one of the power dividers in a succeeding stage of the tree. A power combiner is coupled between outputs of the amplifiers in a last one of the stages and an output of the analog to digital converter. | 11-22-2012 |
20120293353 | OPERATIONAL AMPLIFIER - A temperature dependence adjustable operational amplifier circuit which suppresses a change in a gain caused by a change in an input voltage is provided. In an operational amplifier including a first input terminal and an output terminal, an operational amplifier having an inverting input terminal and a non-inverting input terminal, an input resistance circuit, and a feedback resistance circuit, each of the input and feedback resistor circuits has a resistor and a trimming resistor, which are different in temperature coefficient from each other, connected in series with each other, and a source-drain path of a MOS transistor included in the trimming resistor circuit is disposed between resistance and an inverting input terminal, and a substrate potential thereof is set to a potential of the inverting input terminal of the operational amplifier. | 11-22-2012 |
20120306676 | CAPACITIVE VOLTAGE DIVIDER - A capacitive voltage divider arrangement comprising a first and second voltage divider, a first and second parasitic capacitance being formed between the first and second capacitive voltage divider. The first capacitive voltage divider comprises a signal terminal; a first capacitance for coupling the terminal to a reference potential; a second capacitance; a third capacitance that may be coupled to the reference potential, the second capacitance being coupled in between the terminal and third capacitance. The second capacitive voltage divider comprises a first compensation capacitance for coupling the terminal to the reference potential, the first compensation capacitance further coupled to the terminal via the first parasitic capacitance; a second compensation capacitance; a third compensation capacitance that may be coupled to the reference potential, the second compensation capacitance coupled in between the terminal and third compensation capacitance, and the second parasitic capacitance coupling the third capacitance to the third compensation capacitance. | 12-06-2012 |
20120306677 | SYSTEM AND METHOD TO MODIFY A METADATA PARAMETER - A method includes receiving digital audio data at an audio adjustment system. The method includes converting a portion of the digital audio data to an analog audio signal with a digital-to-analog converter of the audio adjustment system to form a sample analog audio signal. The method includes determining a dynamic range of the sample analog audio signal with the audio adjustment system. The method also includes modifying a metadata parameter of the digital audio data with the audio adjustment system when the dynamic range of the sample analog audio signal is below a threshold. The metadata parameter is a dialog normalization parameter. | 12-06-2012 |
20130009798 | DIGITAL-TO-ANALOG CONVERSION WITH COMBINED PULSE MODULATORS - A digital-to-analog converter includes first and second pulse modulators to generate first and second pulse modulated signals in response to first and second digital values, a third pulse modulator to generate a third pulse modulated signal in response to a third digital value, and a switch/filter circuit to generate an analog signal by combining the first and second pulse modulated signals in response to the third pulse modulated signal. The first and second pulse modulated signals may be low-pass filtered before being combined. In some embodiments, the third digital value may be incremented in a single direction between transitions of the first and second digital values. In some other embodiments, the third digital value may be incremented in opposite directions between alternating transitions of the first and second digital values. | 01-10-2013 |
20130009799 | BIOLOGICAL ANALOG-TO-DIGITAL AND DIGITAL-TO-ANALOG CONVERTERS - Described herein are novel biological converter switches that utilize modular components, such as genetic toggle switches and single invertase memory modules (SIMMs), for converting analog inputs to digital outputs, and digital inputs to analog outputs, in cells and cellular systems. Flexibility in these biological converter switches is provided by combining individual modular components, i.e., SIMMs and genetic toggle switches, together. These biological converter switches can be combined in a variety of network topologies to create circuits that act, for example, as switchboards, and regulate the production of an output product(s) based on the combination and nature of input signals received. | 01-10-2013 |
20130015993 | SYNCHRONOUS SWITCHING IN HIGH-SPEED DIGITAL-TO-ANALOG CONVERTER USING QUAD SYNCHRONIZING LATCHAANM Santos; Bruno M.S.AACI Alverca do RibatejoAACO PTAAGP Santos; Bruno M.S. Alverca do Ribatejo PTAANM Leal; Antonio I.R.AACI SintraAACO PTAAGP Leal; Antonio I.R. Sintra PTAANM Azeredo-Leme; Carlos M.A.AACI LisboaAACO PTAAGP Azeredo-Leme; Carlos M.A. Lisboa PT - A synchronizing circuit compatible with a quad switching scheme in a digital-to-analog converter (DAC) to synchronize turning on or off of switches for steering current to a differential output. The synchronizing circuit receives signals from a decoder and synchronizes control signals to the switches by a clock signal. In one embodiment, the synchronizing circuit includes a predictor circuit and a latch circuit. The latch circuit may include four sets of cross-coupled inverters where a set of cross-coupled inverters are activated at a time. By using the synchronizing circuit in conjunction with the quad switching scheme, linearity of analog output from the DAC can be improved and data dependent noise in the analog output can be removed or reduced. | 01-17-2013 |
20130015994 | HIGH-SPEED VOLTAGE-LEVEL CONVERTER USING CAPACITORAANM Santos; Bruno M.S.AACI Alverca do RibatejoAACO PTAAGP Santos; Bruno M.S. Alverca do Ribatejo PTAANM Leal; Antonio I.R.AACI SintraAACO PTAAGP Leal; Antonio I.R. Sintra PTAANM Azeredo-Leme; Carlos M.A.AACI LisboaAACO PTAAGP Azeredo-Leme; Carlos M.A. Lisboa PT - A voltage-level convertor including a switch and a capacitor which receives an input signal of a first voltage range and generates a level-converted signal of a second voltage range. The switch operates in a low voltage level, and hence, the switch can be implemented as a thin oxide device that responds quickly to the input signal. The capacitor is coupled between the switch and an output node. The capacitor is charged to a predetermined voltage. In response to receiving the output from the switch, an output signal with a converted voltage level is generated from the conductor of the capacitor connected to the output node. | 01-17-2013 |
20130021186 | CIRCUITRY AND METHOD FOR DIGITAL TO ANALOG CURRENT SIGNAL CONVERSION WITH PHASE INTERPOLATION - Circuitry and method for digital-to-analog current signal conversion with phase interpolation. For an n-bit digital-to-analog converter (DAC), the number 2 | 01-24-2013 |
20130027237 | FIELDBUS ADAPTER AND METHOD OF USING FIELDBUS ADAPTER - A fieldbus adaptor connected between a fieldbus that handles a digital signal and a field device that handles an analog signal, the fieldbus adaptor comprising a first connection unit detachably connected to the fieldbus, a second connection unit detachably connected to the field device, and a conversion unit provided between the first connection unit and the second connection unit, the conversion unit bidirectionally converting the digital signal handled by the fieldbus and the analog signal handled by the field device. | 01-31-2013 |
20130044018 | METHOD AND CIRCUIT FOR CONTINUOUS-TIME DELTA-SIGMA DAC WITH REDUCED NOISE - A continuous-time delta-sigma digital-to-analog converter (DAC) includes a first delta-sigma modulator configured to quantize a most significant bit or bits of a digital input signal and produce a first quantization error signal, and a second multi-stage delta-sigma modulator configured to quantize less significant bits of the digital input signal. A first DAC is coupled to an output of the first delta-sigma modulator, and a second DAC is coupled to an output of the second noise-shaping filter. The second DAC has a greater resolution than the first DAC. A low pass output filter is coupled to a sum of an output of the first DAC and an output of the second DAC. | 02-21-2013 |
20130063294 | DIGITAL-TO-ANALOG CONVERTER AND PERFORMING METHOD THEREOF - A digital-to-analog converter and a performing method thereof are disclosed. The digital-to-analog converter includes a random rotation unit, a plurality of conversion units, and a summing unit. The random rotation unit receives a plurality of binary-weighted inputs and generates a plurality of rotated digital outputs according to a random rotation number. The conversion units respectively receive one of the rotated digital outputs and generate a respective analog output. The summing unit sums the respective analog outputs of the conversion units for generating an analog output. The present invention implements the dynamic element matching technique by randomly rotating the binary-weighted inputs, so as to reduce the manufacturing cost of the digital-to-analog converter. | 03-14-2013 |
20130076549 | GATE LEAKAGE COMPENSATION IN A CURRENT MIRROR - A method and apparatus is disclosed to compensate for gate leakage currents of thin oxide devices that have very thin oxide layers in a current mirror of a digital-to-analog converter (DAC). The DAC converts a digital input signal from a digital representation in a digital signaling domain to an analog representation in an analog signaling domain to provide an analog output signal. The DAC uses one or more transistors to convert the digital input signal from the digital representation to the analog representation. These transistors are typically implemented using thin oxide devices that have very thin oxide layers and corresponding gate leakage currents that are associated with these very thin oxide layers. The current-steering DAC provides these gate leakage currents independent of its corresponding reference source without any substantial affect upon its full scale output. | 03-28-2013 |
20130099950 | TRANSMISSION CIRCUIT, ULTRASONIC PROBE AND ULTRASONIC IMAGE DISPLAY APPARATUS - A transmission circuit for use with an ultrasonic probe including an ultrasonic transducer is provided. The transmission circuit includes a high voltage current DAC configured to output a drive current of an ultrasonic transducer to transmit and receive ultrasound, and a waveform generator configured to output a control signal from the high voltage current DAC to the high voltage current DAC with a predetermined timing. The control signal configured to output the drive current with a desired magnitude. | 04-25-2013 |
20130106634 | NFC TRANSCEIVER | 05-02-2013 |
20130106635 | VOLUME ADJUSTING CIRCUIT AND VOLUME ADJUSTING METHOD | 05-02-2013 |
20130106636 | DIGITAL-TO-ANALOG CONVERTER, ANALOG-TO-DIGITAL CONVERTER, AND SEMICONDUCTOR DEVICE | 05-02-2013 |
20130113643 | DIGITAL-TO-ANALOG CONVERTER WITH A SHARED RESISTOR STRING - An apparatus is provided that comprises resistors, a first set of switches, and a second set of switches. The resistors are arranged in an array having columns and rows, where the number of resistors is an integer multiple of the number of columns or rows. The resistors are coupled together in a skip-K pattern. Each switch from the first and second sets of switches is coupled to the resistor string, and the first and second sets of switches are each arranged in a sequence and are offset from one another by an offset value. The first and second sets of switches are arranged along the periphery of the array such that each switch from the first set of switches is located in proximity to and is associated with the same row or the same column as its corresponding switch in the sequence from the second set of switches. | 05-09-2013 |
20130120176 | RESISTIVE DIGITAL-TO-ANALOG CONVERSION - Examples of resistive digital-to-analog converter (RDAC) circuits are provided herein. RDAC circuits may provide an analog output signal derived from an n-bit digital input signal. In one example, an RDAC circuit may include a plurality of resistive circuit branches. Each resistive circuit branch may be arranged in a pull up/pull down network configuration. For example, an RDAC circuit may include a plurality of resistive circuit branches positioned in parallel. In an example, each of the plurality of resistive circuit branches may include a first inverter circuit, a second inverter circuit, and a resistive component. The RDAC circuit may include an output node for providing the analog output signal. Additionally, methods are provided for converting an analog output signal derived from an n-bit digital input signal. | 05-16-2013 |
20130120177 | DATA CONVERTER CURRENT SOURCES USING THIN-OXIDE CORE DEVICES - Systems and methods are disclosed for performing data conversion by matching current sources using a thin oxide device; and minimizing voltage stress on the thin oxide device during operation or power down. | 05-16-2013 |
20130141265 | DIGITAL-ANALOG CONVERSION APPARATUS AND METHOD - An apparatus and a method for digital-analog conversion are provided. The apparatus includes a first cell matrix for outputting a current of a signal corresponding to a number of Most Significant Bits (MSBs) of an input digital signal, a second cell matrix for outputting a current of a signal corresponding to a number of Least Significant Bits (LSBs) of the input digital signal, an amplifier for amplifying the output current of the second cell matrix at a preset amplification, and an adder for adding the output current of the first cell matrix and the output current of the amplifier. | 06-06-2013 |
20130141266 | ANALOG TO DIGITAL CONVERTER AND DIGITAL TO ANALOG CONVERTER - To decrease the burden of digital processing, provided is an AD conversion apparatus comprising a pattern generating section that, for each target bit specified one bit at a time moving downward in the output data, generates a pattern signal having a pulse width or number of pulses corresponding to a weighting of the target bit; an integrating section that integrates the pattern signals according to a judgment value for judging a value of the target bit each time a pattern signal is generated, and outputs a reference signal obtained by accumulating the integrated value of each pattern signal; a comparing section that, each time generation of a pattern signal is finished, compares the input signal to the reference signal; and an output section that outputs the output data to have values corresponding to the comparison results obtained after each generation of a pattern signal corresponding to a bit is finished. | 06-06-2013 |
20130154864 | APPARATUS AND METHOD FOR CONVERTING ANALOG SIGNAL TO DIGITAL SIGNAL - An apparatus of a Digital-to-Analog Converter (DAC) is provided. The apparatus includes a logic circuit for performing a logical operation based on a combination of bit values b | 06-20-2013 |
20130181856 | DIGITAL-TO-ANALOG CONVERTER - An embodiment of the present invention provides a digital-to-analog converter including: a primary modulator; a secondary modulator, connected to the primary modulator; a delay unit, connected to the primary modulator; a subtractor, connected to the delay unit and the secondary modulator separately; a first processing module, configured to perform decoding, dynamic matching, and digital-to-analog conversion in sequence on a B-bit digital signal output by the secondary modulator, so as to obtain a first analog signal; a second processing module, configured to perform decoding, dynamic matching, and digital-to-analog conversion in sequence on an (N−B+1) -bit quantization noise signal output by the subtractor, so as to obtain an analog noise signal; and an adder, connected to the first processing module and the second processing module separately, and configured to add the first analog signal and the analog noise signal, so as to obtain and output a second analog signal. | 07-18-2013 |
20130207823 | MULTI-PHASED DIGITAL-TO-ANALOG CONVERTERS FOR INTERPOLATION - A method and device for digital filtering of a digital signal in a radio frequency (RF) device front end are disclosed. In one embodiment, 2M+1 groups of N digital-to-analog converters (DAC) are grouped to emulate a (2M+1)*N tap finite impulse response (FIR) filter. Each DAC in a group receives a clock that differs in phase from the clocks of the other DACs in the group. The filter is implemented to suppress image spectra of the digital signal without increasing a clock rate by which the signal is sampled. | 08-15-2013 |
20130214953 | DA CONVERTER - There is provided A DA converter in which the N current switch cells each include: a current source having one end connected to a first power source; and first and second switch transistors differentially operating each other, each having a control terminal receiving a digital signal, the first combining node combines a current output from the first switch transistor in each current switch cell, the second combining node combines a current output from the second switch transistor in each current switch cell, the first output impedance element has ends connected to the first combining node and a second power source, the second output impedance element has ends connected to the second combining node and the second power source, the controller controls the current source in each current switch cell to reduce variation in amount of a current flowing from the first power source. | 08-22-2013 |
20130214954 | D/A CONVERTER, PERIPHERAL DEVICE, AND PLC - A D/A converter according to the present invention includes a wave-form data-array memory means for memorizing a wave-form data array configured of a plurality of digital values, a wave-form output-format data memory means for memorizing wave-form output-format data designating a wave-form output period, a digital value output means for sequentially reading out the digital values for each wave-form output period from the wave-form data-array memory means and outputting the values, and a D/A conversion means for converting the digital values outputted from the digital value output means into analog-data values. | 08-22-2013 |
20130222165 | Integrated Circuit and System Including Current-Based Communication - An integrated circuit includes a current-based digital-to-analog converter (IDAC) including a clock input and including an output. The integrated circuit further includes a sample synchronization generator to provide a clock signal to a clock output terminal and a first timing signal related to the clock signal to the clock input of the IDAC. The sample synchronization generator controls the clock signal and the first timing signal to communicate a control signal to a peripheral module. | 08-29-2013 |
20130222166 | OUTPUT DEVICE - An output device receives a data signal, outputs an output signal corresponding to the data signal in synchronization with a clock signal, and includes a driving unit configured to drive an output buffer that outputs the output signal. The driving unit includes a signal switching unit and first and second driving circuits that operate with the same power supply. The signal switching unit inputs the clock signal into one of the first and second driving circuits in accordance with the level of the data signal, and the one of the first and second driving circuits outputs a driving signal whose level varies in accordance with a change in the level of the clock signal to the output buffer. | 08-29-2013 |
20130234873 | Low Complexity High-Speed Multi-DAC System - A multi-DAC system includes a plurality of DACs arranged in parallel for converting a digital signal to an analog signal, each DAC path having a different analog phase response. The system further includes a circuit for multiplying the digital signal input to at least some of the DACs by a multiplicand sufficient to shift a peak of a frequency response of the multi-DAC system to a non-DC frequency. For example, a series of +1 and/or −1 digital values can be used to multiply the digital signal so that the signal has the same number of bits pre and post multiplication. The multiplicand can include a constant series of +1 or −1 digital values, or a time-varying series of +1 and −1 digital values. In each case, the peak frequency response of the multi-DAC system can be shifted away from DC to a multiple of the sampling frequency of the DACs. | 09-12-2013 |
20130241757 | PROGRAMMABLE DIGITAL UP-CONVERSION FOR CONCURRENT MULTI-BAND SIGNALS - Embodiments of a digital up-conversion system for a concurrent multi-band signal and methods of operation thereof are disclosed. In one embodiment, a digital up-conversion system includes multiple digital up-converter chains, each for a different frequency band of the concurrent multi-band signal, and a digital combiner that combines up-converted signals output by the digital up-converter chains to provide a combined digital signal. The combined digital signal is processed by one or more additional processing components including a digital-to-analog converter (DAC) to provide the concurrent multi-band signal. | 09-19-2013 |
20130241758 | THREE-LEVEL DIGITAL-TO-ANALOG CONVERTER - A system for processing a signal includes a detector configured to detect a two-level stream of bits; a converter configured to generate a three-level control signal based on two adjacent values within the two-level stream of bits; and a switch configured to determine which of three different paths to couple a current source to based on a value of the three-level control signal. Thus, based on adjacent values of the output stream a three-level control signal is generated which controls coupling of the current source to one of three different paths. This type of three-level digital-to-analog converter can be, for example, part of the feedback loop of an analog-to-digital converter. Similar techniques can also be utilized in a multi-segment digital-to-analog converter in which each segment of the DAC is controlled by a 3-level control signal and the DAC is implement using PMOS devices. The current source for each DAC segment is diverted to ground, the M-node, or the P-node depending on the value of the 3-level control signal. | 09-19-2013 |
20130314262 | SWITCH-DRIVING CIRCUIT AND DAC USING THE SAME - A switch-driving circuit and a Digital-to-Analog Converter (DAC) using the switch-driving circuit are provided. The switch-driving circuit includes a main cell and a reference cell. The main cell includes a current source and a resistance-control component electronically connected to the current source. The reference cell is coupled to the current source and the resistance-control component, and includes a first loop, the first loop is configured to track a target reference voltage so as to provide at least one first control voltage to control a resistance change of the resistance-control component. The reference cell and the main cell are implemented by MOS transistors in place of capacitors which occupy an increased circuit area, rendering reduced circuit area for the switch-driving circuit, and decreasing manufacturing costs. Further, the switch-driving circuit outputs a voltage signal with reduced noise, increasing the performance of the Digital-to-Analog Converter. | 11-28-2013 |
20130328707 | I-Q MISMATCH CALIBRATION AND METHOD - Techniques are provided for reducing mismatch between the in-phase (I) and quadrature (Q) channels of a communications transmitter or receiver. In an exemplary embodiment, separate voltages are applied to bias the gates or bulks of the transistors in a mixer of the I channel versus a mixer of the Q channel. In another exemplary embodiment, separate voltages are applied to bias the common-mode reference voltage of a transimpedance amplifier associated with each channel. Techniques are further provided for deriving bias voltages to minimize a measured residual sideband in a received or transmitted signal, or to optimize other parameters of the received or transmitted signal. Techniques for generating separate bias voltages using a bidirectional and unidirectional current digital-to-analog converter (DAC) are also disclosed. | 12-12-2013 |
20130342378 | INTERLEAVED RETURN-TO-ZERO, HIGH PERFORMANCE DIGITAL-TO-ANALOG CONVERTER - In one method embodiment, receiving a data signal; and converting the data signal to an analog signal over plural clock cycles, the converting comprising: during a first clock cycle of the plural clock cycles, switching on one or more first current cells of a first bank while simultaneously a second bank comprising second current cells is switched off or almost off; and during a second clock cycle of the plural clock cycles, the second clock cycle immediately subsequent to the first clock cycle, switching on one or more of the second current cells of the second bank while simultaneously the first bank is switched off or almost off. | 12-26-2013 |
20140002287 | Circuit and Method | 01-02-2014 |
20140002288 | DTC System with High Resolution Phase Alignment | 01-02-2014 |
20140015701 | METHOD AND APPARATUS FOR PERFORMING MODULATION OF A RADIO FREQUENCY SIGNAL - A method and apparatus for performing modulation of a radio frequency, RF, signal within a digital-to-RF converter. The method includes determining a desired digital control word switching frequency value based at least partly on at least one parameter corresponding to a bandwidth of the RF signal to be modulated and at least one from a group including: at least one parameter corresponding to an RF channel frequency of the RF signal to be modulated; and at least one parameter corresponding to a power level of the RF signal to be modulated. The method further includes dynamically configuring at least one digital control module to output at least one digital control word signal in accordance with the desired digital control word switching frequency value, and performing modulation of the RF signal in accordance with the at least one digital control word signal output by the at least one digital control module. | 01-16-2014 |
20140043178 | INTERPOLATIVE DIGITAL-TO-ANALOG CONVERTER - An interpolative digital-to-analog (D/A) converter is adapted to convert a N-bit digital signal into an analog signal, where N is a positive integer greater than 1. The interpolative D/A converter includes a router unit that outputs first and second router voltages based on the first and second bits of the digital signal, and an interpolation unit that receives the first and second router voltages from the router unit, and that performs interpolation operation on the first and second router voltages according to the first bit of the digital signal, so as to generate the analog signal having a voltage magnitude ranging from the first router voltage to the second router voltage. | 02-13-2014 |
20140043179 | METHOD AND APPARATUS FOR DIRECT DIGITAL SYNTHESIS OF SIGNALS USING TAYLOR SERIES EXPANSION - A method and apparatus for direct digital synthesis (DDS) of signals using Taylor series expansion is provided. The DDS may include a modified phase-to-amplitude converter that includes read-only-memories (ROMs), registers and, a single size, such as a coarse, intermediate, and fine ROM corresponding to respective higher resolution phase angles. The outputs of the ROMs when combined can form a digital output signal in the form of a Taylor series of a sinusoid function. | 02-13-2014 |
20140062743 | SYSTEM AND METHOD FOR PULSE WIDTH MODULATION DIGITAL-TO-ANALOG CONVERTER - A system and method is disclosed for a digital to analog converter which includes an interpolation filter to up-sample a digital signal, a noise shaping modulator to suppress in-band quantization errors due to digital pulse width modulation and truncation errors, and a hybrid finite impulse response filter/digital to analog converter coupled to a reconstruction filter which outputs the analog signal. | 03-06-2014 |
20140062744 | DIGITAL ANALOG CONVERTER - Embodiments of a digital-to-analog conversion system that utilizes a specialized clock signal to reshape an analog impulse response of a digital-to-analog converter (DAC) are disclosed. Preferably, a shape of the specialized clock signal is such that Nyquist images resulting from digital-to-analog conversion are controlled in a desired manner. In one embodiment, the digital-to-analog conversion system includes a DAC that converts a digital input signal into an analog output signal. A specialized clock signal is applied to the analog output signal of the DAC such that an analog impulse response of the DAC is reshaped according to a shape of the specialized clock signal, thereby providing a modified analog output signal. The specialized clock signal reshapes the analog impulse response of the DAC such that Nyquist images resulting from digital-to-analog conversion are controlled in a desired manner. | 03-06-2014 |
20140062745 | SYSTEM AND METHOD FOR A HIGH RESOLUTION DIGITAL INPUT CLASS D AMPLIFIER WITH FEEDBACK - A system and method is disclosed for a digital input Class D amplifier which includes an interpolation filter to up-sample a digital signal, a noise shaping modulator to suppress in-band quantization errors due to digital pulse width modulation and truncation errors, and a hybrid finite impulse response filter/digital to analog converter coupled to an analog input Class D amplifier with digital pulse width modulation control loop. The hybrid finite impulse response filter/digital to analog converter uses N-taps implemented digitally and N-tap weights implemented in analog using resistors. | 03-06-2014 |
20140062746 | BINARY DIVARICATION DIGITAL-TO-ANALOG CONVERSION - Systems and techniques for performing binary divarication digital-to-analog conversion are described. A described converter includes voltage range adjusters arranged in series to convert a digital sequence to an analog representation, each of the adjusters being responsive to a respective bit of the digital sequence, and a combiner. The first adjuster produces first high and low output voltages based on first high and low input voltages and a most significant bit value of the digital sequence. The last adjuster produces last high and low output voltages based on last high and low input voltages and a least significant bit value of the digital sequence. The last high and low input voltages are responsive to the first high and low output voltages as modified by any of zero or more intermediate voltage range adjusters. The combiner produces an analog output signal based on the last high and low output voltages. | 03-06-2014 |
20140091958 | METHODS AND ARRANGEMENTS FOR HIGH-SPEED DIGITAL-TO-ANALOG CONVERSION - Embodiments may comprise logic such as hardware and/or code for high-speed digital-to-analog conversion of signals. Many embodiments comprise a demultiplexer to distribute sets of bits to digital-to-analog converters, the digital-to-analog converters to receive the sets of bits and the operate concurrently to convert the sets of bits from digital representations of signal segments to output analog signal segments, and an interleaver to interleave the analog signal segments from each of digital-to-analog converters in the sequence to generate an analog signal. In many embodiments, the interleaver is adapted to interleave the analog signal segments by latching magnitudes of each of the analog signal segments to an interleaved output near ends of clock cycles to attenuate non-linearities in the magnitudes of each of the analog signal segments when the magnitudes are output. | 04-03-2014 |
20140091959 | RF DAC WITH CONFIGURABLE DAC MIXER INTERFACE AND CONFIGURABLE MIXER - One embodiment of the present disclosure relates to a circuit. The circuit includes a digital to analog converter (DAC) configured to convert a time-varying, multi-bit digital value to a corresponding time-varying output current. The circuit also includes a mixer module downstream of the DAC and comprising a plurality of mixers. A control block is configured to selectively steer output current from the DAC to different mixers of the mixer module. Other techniques are also described. | 04-03-2014 |
20140104087 | DIGITAL-TO-ANALOG CONVERSION CIRCUIT - A D/A conversion circuit includes: current generation circuits each including a constant current source configured to generate a current, a first MOSFET connected to the constant current source and configured to control a supply destination of the current, a first gate control section configured to exclusively supply a first voltage and a second voltage to a gate of the first MOSFET, and a first discharge switch connected to the first gate control section and the gate of the first MOSFET, controlled to be turned on at the same time as the first gate control section supplies the second voltage and controlled to be turned off before the first gate control section supplies the first voltage; a first current addition line; a discharge line; a first resistor connected to the first current addition line; and a voltage source configured to supply the second voltage to the first gate control sections. | 04-17-2014 |
20140104088 | DIFFERENTIAL SWITCH DRIVE CIRCUIT AND CURRENT STEERING DIGITAL-TO-ANALOG CONVERTER - A differential switch drive circuit includes a current source, a current control circuit including a pair of transistors having a pair of differential input terminals, a pair of differential output terminals for outputting differential output voltages, and a common connection node connected to the current source, and load elements each connected to a corresponding one of the pair of differential output terminals. Currents flowing through the pair of transistors are controlled so that the sum of currents flowing through the load elements during a steady state of the differential output voltages is different from the sum of currents flowing through the load elements during a transient state of the differential output voltages. | 04-17-2014 |
20140111362 | INTEGRATED CIRCUIT, WIRELESS COMMUNICATION UNIT AND METHOD FOR A DIFFERENTIAL INTERFACE FOR AN ENVELOPE TRACKING SIGNAL - A signal processing circuit has a first circuit, a digital-to-analog converter (DAC) and a second circuit. The first circuit receives a digital input signal with a non-zero direct current (DC) component, and subtracts at least a portion of the DC) component of the received digital input signal from the received digital input signal. The DAC is operably coupled to the first circuit, and arranged to perform a digital-to-analog conversion upon an output of the first circuit. The second circuit is operably coupled to the DAC, and arranged to add a DC component to an analog output signal derived from an output of the DAC. The signal processing circuit may be part of an integrated circuit or a wireless communication unit. | 04-24-2014 |
20140118172 | MODIFIED FIRST-ORDER NOISE-SHAPING DYNAMIC-ELEMENT-MATCHING TECHNIQUE - A technique includes selectively enabling a first sequence of unit elements of a plurality of unit elements of a digital-to-analog converter to convert a digital code to a plurality of analog signals in response to a plurality of control signals. Individual control signals of the plurality of control signals and individual analog signals of the plurality of analog signals correspond to respective unit elements of the plurality of unit elements. The technique includes generating the plurality of control signals based on the digital code, a random digital code having a number of bits based on a feedback signal, and an indicator of a second sequence of unit elements of the plurality of unit elements enabled in response to a prior digital code. | 05-01-2014 |
20140139364 | DRIVING CIRCUIT - A driving circuit includes a plurality of reference voltage lines and a digital to analog converter. The reference voltage lines are configured for respectively transmitting different grayscale reference voltages, in which the grayscale reference voltages are divided into at least two groups, and the wire diameter/wire width of at least one reference voltage line among the reference voltage lines of a first voltage group among the at least two groups is different from the wire diameters/wire widths of the reference voltage lines of a second voltage group among the at least two groups. The digital to analog converter is coupled to the reference voltage lines to receive the grayscale reference voltages and is for converting a digital signal into a grayscale voltage according to the grayscale reference voltages. | 05-22-2014 |
20140145867 | SWITCHING SCHEME FOR ISI MITIGATION IN DATA CONVERTERS - Embodiments of the present disclosure may provide a switching scheme for tri-level unit elements with ISI mitigation. A tri-level unit element may include a first and second current source and a plurality of switches arranged to form three circuit branches between the first and the second current source. The first circuit branch may include two switches connected in parallel between the first current source and a first output terminal and two switches connected in parallel between the second current source and the first output terminal. The second circuit branch may include two switches connected in parallel between the first current source and a second output terminal and two switches connected in parallel between the second current source and the second output terminal. The third circuit branch may include switches to couple the first current source and the second current source to a dump node. | 05-29-2014 |
20140152479 | DIGITAL TO ANALOG CONVERTERS WITH ADJUSTABLE OUTPUT RESOLUTION - A digital to analog converter (DAC) includes: first and second nodes; a first switching device; a second switching device; and a switch control module. The switch control module selectively configures the first and second switching devices such that: in a first configuration, the first switching device connects a first current to the first node and the second switching device connects a second current to the second node; in a second configuration, the first switching device connects the first current to the second node and the second switching device connects the second current to the first node; and in a third configuration, the first and second switching devices disconnect the first current and the second current from the first and second nodes. | 06-05-2014 |
20140152480 | ENHANCED SECOND ORDER NOISE SHAPED SEGMENTATION AND DYNAMIC ELEMENT MATCHING TECHNIQUE - A method and circuit to perform noise shaped splitting of a digital input signal may include using multiple layers to process the input signal. In the first layer, the most significant bits of the input signal may be distributed to a plurality of branches. Dynamic element matching may be performed using the least significant bits of the input signal. Based on the results of the dynamic element matching, values may be added to the plurality of branches. If there is insufficient data activity, dynamics enhancement may be performed to increase the data activity. The output signals of each of the plurality of branches in the first layer may be provided to a second layer, in which these steps can be repeated on each of the output signals. The outputs of the second layer may be provided to a plurality of three level unit elements. | 06-05-2014 |
20140152481 | INTEGRATED CIRCUIT DEVICE AND METHOD OF DYNAMICALLY MODIFYING AT LEAST ONE CHARACTERISTIC WITHIN A DIGITAL TO ANALOGUE CONVERTER MODULE - An integrated circuit device comprises at least one digital to analogue converter module. The DAC module includes at least one current replicator component having a first channel terminal, a second channel terminal and a reference voltage terminal arranged to receive a reference voltage signal; the at least one current replicator component being arranged to moderate a current flowing between the first and second channel terminals based at least partly on the received reference voltage signal. The DAC module also includes at least one filter component coupled to the reference voltage terminal to perform filtering of the reference voltage signal. | 06-05-2014 |
20140159932 | ARRANGEMENT FOR DIGITAL-TO-ANALOG CONVERTER - Among other things, an arrangement for a digital-to-analog converter (DAC) is provided herein. In some embodiments, a metal-oxide semiconductor (MOS) array of the DAS comprises one or more cells respectively comprising one or more current sources. The current sources comprise one or more transistors having a horizontal gate layout. A switch arrangement of the DAS, to which the MOS array is connected, comprises one or more transistors having a vertical gate layout. Accordingly, in some embodiments, a DAC is provided which comprises transistors having a vertical gate layout and transistors having a horizontal gate layout. | 06-12-2014 |
20140159933 | RF-DAC CELL AND METHOD FOR PROVIDING AN RF OUTPUT SIGNAL - An RF-DAC cell is configured to generate an RF output signal based on a baseband signal, a first signal and a second signal. The first signal has a first duty cycle and toggles between first predefined amplitude values, and the second signal has a second duty cycle smaller than the first duty cycle and toggles between second predefined amplitude values. | 06-12-2014 |
20140167996 | CURRENT-STEERING DIGITAL-TO-ANALOG CONVERTER WITH CANCELLATION OF DYNAMIC DISTORTION - A digital-to-analog converter (DAC) includes, in a segment of the DAC, a first switch and a second switch. The first switch includes a first pair of transistors having a first set of inputs and has a first output connected to an output of the DAC. The second switch includes second and third pairs of transistors having second and third sets of inputs, respectively, and has a second output that is connected to the output of the DAC. A driver module generates control signals to drive the first, second, and third sets of inputs based on data received by the DAC for conversion from digital to analog format at a conversion rate determined by a clock. The control signals toggle one of the first and second switches during each cycle of the clock. | 06-19-2014 |
20140167997 | STRING DAC LEAKAGE CURRENT CANCELLATION - Embodiments of the present invention may provide a multi-string DAC with leakage current cancellation. A leakage cancellation circuit may be coupled to output node(s) of the—multi-string DAC. The leakage cancellation circuit may replicate leakage current present at the coupled output node(s) and generate a corresponding complementary signal, a leakage cancellation signal. The leakage cancellation signal may be injected into the coupled output node(s) to cancel (or reduce) the net impact of the leakage current. | 06-19-2014 |
20140176355 | METHOD OF DYNAMIC ELEMENT MATCHING AND AN APPARATUS THEREOF - A method to reduce the integral non-linearity (INL) of a digital-to-analog converter (DAC) and a DAC implementing said method are disclosed. The method in this invention is a pseudo dynamic element matching (PDEM) method. Compared with a prior art, the method of this invention provides a better performance in glitch. Compared with another prior art, the method of this invention also guarantees that DEM will not fail even if the input digital code remains constant. | 06-26-2014 |
20140184433 | DELTA-SIGMA MODULATION APPARATUS AND DYNAMIC ELEMENT-MATCHING CIRCUIT THEREOF - A delta-sigma modulation apparatus and a dynamic element-matching circuit thereof are disclosed. The dynamic element-matching circuit includes a data aligner, a logic operation circuit, and a delayer. The data aligner receives an input matching data and a pointer signal and shifts the input matching data according to the pointer signal to generate an output matching data. The logic operation circuit receives the output matching data and performs a logic operation on the output matching data to generate a preceding pointer signal. The delayer receives the preceding pointer signal and delays the preceding pointer signal according to a sample clock pulse to generate the pointer signal. | 07-03-2014 |
20140191892 | DIGITAL ANALOG CONVERTER - Embodiments of a digital-to-analog conversion system that utilizes a specialized clock signal to reshape an analog impulse response of a digital-to-analog converter (DAC) are disclosed. Preferably, a shape of the specialized clock signal is such that Nyquist images resulting from digital-to-analog conversion are controlled in a desired manner. In one embodiment, the digital-to-analog conversion system includes a DAC that converts a digital input signal into an analog output signal. A specialized clock signal is applied to the analog output signal of the DAC such that an analog impulse response of the DAC is reshaped according to a shape of the specialized clock signal, thereby providing a modified analog output signal. The specialized clock signal reshapes the analog impulse response of the DAC such that Nyquist images resulting from digital-to-analog conversion are controlled in a desired manner. | 07-10-2014 |
20140197973 | DIGITAL TO ANALOG CONVERTER WITH CURRENT STEERING SOURCE FOR REDUCED GLITCH ENERGY ERROR - A digital to analog converter including a current steering source and a master replica bias network. The current steering source includes a data current source providing a source current to a source node, a switch circuit operative to steer the source current to a selected one of first and second control nodes based on a data bit, a buffer circuit that buffers the source current between the first control node and a first current output node or between the second control node and a second current output node, and an activation current source provides activation current to the buffer circuit via the first and second control nodes. The master replica bias network replicates biasing of the buffer circuit relative to a replica control node and drives the buffer circuit to maintain the first control node, the second control node and the replica control node at a common master control voltage. | 07-17-2014 |
20140210656 | CIRCUIT FOR IMPLEMENTING A CONTINUOUS-TIME DEGLITCHING TECHNIQUE FOR DIGITAL ANALOG CONVERTERS - A processor and a circuit implementing a continuous-time deglitching technique for a digital-to-analog converter are disclosed. The circuit includes a digital-to-analog converter having a differential current output, an operational amplifier having an inverting input coupled to a first output of the differential current output and a non-inverting input coupled to a second output of the differential current output, and a transistor coupled to the second output and the output of the operational amplifier. The operational amplifier is configured to operate the transistor to adjust the voltage potential of the second output to substantially match the voltage potential of the first output. | 07-31-2014 |
20140232580 | VOLTAGE GENERATOR, SWITCH AND DATA CONVERTER CIRCUITS - A data converter can include a resistor network, a switch network connected to the resistor network and having a plurality of switch circuits, each with an NMOS and a PMOS switch transistor, and a voltage generator to generate a drive voltage for driving a gate of at least one of the NMOS or PMOS switch transistors of at least one of the switch circuits. The voltage generator can include first and second pairs of transistors, each pair having connected control terminals and being connected to a second NMOS or PMOS transistor, a first or second resistor, and the other pair of transistors. The first and second resistors can have substantially equal resistance values. A ratio of width-to-length ratios of the second NMOS to PMOS transistors can be substantially equal to such a ratio of the switch circuit NMOS to PMOS transistors. | 08-21-2014 |
20140253356 | DIGITAL-TO-ANALOGUE CONVERTER - The invention relates to digital-to-analog converters for converting current. The converter includes a pair of differential branches with two transistors controlled by a digital register activated at a clock frequency, and two resistive loads receiving the currents of the differential branches to produce a differential electrical signal representing the analog result of the conversion. The converter includes a dual switching circuit for the currents of the differential branches: a first switching circuit enables the transmission of the currents of the differential branches toward the loads for 70% to 95% of the clock period and shunts these currents outside the loads for the rest of the time; a second switching circuit alternately and symmetrically makes a direct link followed by a cross link between the differential branches and the loads. The converter provides a signal with high spectral purity and can work with a good level of power in the four Nyquist zones of the spectrum of the output analog signal, and notably in the second and third zones. | 09-11-2014 |
20140266830 | TECHNIQUES TO REDUCE HARMONIC DISTORTIONS OF IMPEDANCE ATTENUATORS FOR LOW-POWER WIDEBAND HIGH-RESOLUTION DACS - A digital-to-analog converter (DAC) includes, in part, a multitude of input stages that supply currents to a pair of current summing nodes in response to a digital signal, and an impedance attenuator coupled between the current summing nodes and the output of the DAC. The impedance attenuator is adapted, among other function, to increase the range of impedances of the output load, to account for changes in the output load impedance due to variations in the process, voltage and temperature, and to decouple the impedances seen by the summing nodes from the load impedance. The impedance attenuator further includes a differential-input, differential-output amplifier with programmable common-mode gain bandwidth to control the harmonic distortion of the amplifier. The impedance attenuator optionally includes a pair of cross-coupled capacitors to control the harmonic distortion of the amplifier. | 09-18-2014 |
20140266831 | LOW GLITCH CURRENT DIGITAL-TO-ANALOG CONVERTER - The present disclosure relates to a method and architecture to minimize a transient glitch within a current digital-to-analog converter (DAC) comprising an array of identical current unit cells. The current DAC is configured with individual column decoders for even and odd rows of current unit cells, thus allowing for independent control of adjacent rows. The even row and odd row column decoders further comprise thermal decoders with coupled timing encoding which establishes synergy between an adjacent pair of rows. As current units cells within an active row are activated across the row by a counting up of a first column decoder, the current units cells within a next row adjacent the active row are returned to an initial state of the active row by counting down in a second column decoder. Other devices and methods are also disclosed. | 09-18-2014 |
20140266832 | Current Balancing, Current Sensor, and Phase Balancing Apparatus and Method for a Voltage Regulator - Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge. | 09-18-2014 |
20140266833 | Pulse Density Digital-to-Analog Converter with Slope Compensation Function - A slope compensation module provides slope compensation of a switched-mode power supply using current mode control. This slope compensation function may be provided by a digital slope compensation generator and a pulse density modulated digital-to-analog converter (PDM DAC) having a selectable response mode low pass filter. | 09-18-2014 |
20140285369 | MULTIPLE STRING DIGITAL TO ANALOG CONVERTER COMPRISING A CONTROL CIRCUIT - A multi-string DAC is described and comprises at least two DAC stages. Each DAC stage comprises a string of impedance elements and a switching network. A control loop is provided to control the Ron of the switching network and provide code dependent control of switches in a DAC switching network. | 09-25-2014 |
20140300501 | MULTI-ZONE DATA CONVERTERS - Aspects of a method and system for data converters having a transfer function with multiple operating zones. In some embodiments, an operating zone of the multiple operating zones is characterized by more stringent performance criteria than the other operating zones. Thus, such data converters may receive an input signal and generate an output signal from the input signal per the transfer function and the more stringent performance criteria in the appropriate operating zone. | 10-09-2014 |
20140320327 | SCALABLE VOLTAGE RAMP CONTROL FOR POWER SUPPLY SYSTEMS - A system for scalable voltage ramp control for power supply systems. A system may comprise at least power supply circuitry, digital-to-analog (D/A) converter circuitry and a controller. The power supply circuitry may be configured to output a voltage to a load based on an input voltage provided by the D/A converter. The controller may be configured to control the D/A converter (e.g., to cause the D/A converter to provide the input voltage to the power supply circuitry) using a large range voltage ramp-up or a small range voltage ramp-up. Utilization of the large range voltage ramp-up or the small range voltage ramp-up by the controller may be based on, for example, a threshold voltage. | 10-30-2014 |
20140327561 | MIXED MODE TIME INTERLEAVED DIGITAL-TO-ANALOG CONVERTER FOR RADIO-FREQUENCY APPLICATIONS - Disclosed are systems, devices and methods related to mixed mode time interleaved digital-to-analog converters (DACs). In some embodiments, such DACs can be utilized for radio-frequency (RF) applications. In some embodiments, a DAC for RF applications can include a first circuit configured to receive a digital signal and perform a first operation to yield an increased bandwidth of the DAC. The DAC can further include a second circuit configured to perform a second operation on the digital signal to yield an analog signal representative of the digital signal. The second circuit can be further configured to reduce or remove an image within the increased bandwidth. | 11-06-2014 |
20140340251 | CURRENT-STEERING DIGITAL-TO-ANALOG CONVERTER WITH CANCELLATION OF DYNAMIC DISTORTION - A digital to analog converter includes a first switch, a second switch, and a driver module. The first switch includes a first differential pair of transistors connected to first inputs to receive digital data for conversion to analog data based on a clock signal output by a clock, and first outputs to output the analog data. The second switch includes second and third differential pairs of transistors connected to second inputs and the first outputs. The driver module drives one of the second inputs based on the digital data and toggles the second switch during a first cycle of the clock signal if the first switch is not toggled during the first cycle of the clock signal. | 11-20-2014 |
20150009057 | DRIVING CIRCUIT AND DATA TRANSMITTING METHOD - A driving circuit includes channels, a positive converting unit, a negative converting unit, an input switch, and an operational amplifier. A first digital data and a second digital data are alternatively transmitted in a first channel and a second channel. The positive converting unit and negative converting unit are respectively disposed in first channel and second channel and convert first digital data and second digital data into a positive analog data and a negative analog data. A first input terminal and a second input terminal of operational amplifier are respectively in first channel and second channel. After input switch respectively transmits positive analog data and negative analog data to first input terminal and second input terminal or to second input terminal and first input terminal, positive analog data and negative analog data are transmitted in a channel of the channels corresponding to entering operational amplifier. | 01-08-2015 |
20150009058 | Transmitter Noise Shaping - Embodiments of the disclosed invention address a method, apparatus and computer program product for enabling enhanced transmitter noise shaping. Thereby, a first digital-to-analog conversion is performed on a digital signal resulting in first analog signal, a noise shaping on the digital signal is performed for obtaining a noise shaped signal and performing a second digital-to-analog conversion on the noise shaped signal resulting in a second analog signal, and the first analog signal and the second analog signal are added for obtaining an output signal. | 01-08-2015 |
20150042498 | DAC CURRENT SOURCE MATRIX PATTERNS WITH GRADIENT ERROR CANCELLATION - First order gradient errors are canceled with no current source splitting by placing consecutive current sources symmetrically around the center of the array. Consecutive elements that correspond to small input amplitudes (mid-scale codes) make a smaller spatial jump than those correspond to larger signal amplitudes. Both linear and second order gradients are reduced by splitting each current cell into two and placing sub-elements symmetrically with respect to the center of the array to address the linear gradient effect. To address second order gradients, current element placement follows a pattern such that consecutive element pairs are chosen with one of the pair being placed with respect to the zero error contour of the second order gradient so as to have a positive error and the second of the pair being placed so as to have a negative error resulting in reduced second order error accumulation. | 02-12-2015 |
20150048960 | DYNAMIC POWER SWITCHING IN CURRENT-STEERING DACS - Methods and systems are provided for dynamic power switching in current-steering digital-to-analog converters (DACs). A DAC circuit may be configured to apply digital-to-analog conversions based on current steering, and to particularly incorporate use of dynamic power switching during conversions. The DAC circuit may comprise a main section, which may connect a main supply voltage to a main current source. The main section may comprise a positive-side branch and a negative-side branch, which may be configured to steer positive-side and negative-side currents, such as in a differential manner, to effectuate the conversions. The dynamic power switching may be applied, for example, via a secondary section connecting a main current source in the DAC circuit to a secondary supply voltage. The secondary supply voltage may be configured such that it may be less than the main supply voltage used in driving the current steering in the DAC circuit. | 02-19-2015 |
20150061908 | LINEAR AND DC-ACCURATE FRONTEND DAC AND INPUT STRUCTURE - A digital-to-analog (DAC) element may include a plurality of switches arranged to form two circuit branches between a current source and a first and a second outputs. The first circuit branch may include two switches defining parallel current paths between the current source and the first output terminal. The second circuit branch may include two switches defining parallel current paths between the current source and the second output terminal. A control circuit, responsive to an input signal that selects one of the circuit branches, may provide control signals to close one of switches in the selected circuit branch in a first portion of a clock cycle and to close the other of the switches in the selected circuit branch in a second portion of the clock cycle. | 03-05-2015 |
20150061909 | SYSTEM AND METHOD FOR SYNCHRONIZATION BETWEEN DIGITAL-TO-ANALOG CONVERTERS (DACs) FOR HIGH SPEED SIGNAL PROCESSING - Provided is a system and method for synchronization between digital-to-analog converters (DAC) for high speed signal processing. A synchronization method of a multi-DAC apparatus may include: inputting a clock to a multiplexer (MUX) DAC; dividing the clock into a first clock and a second clock; transferring a phase difference between the first clock and the second clock to a D flip-flop; and synchronizing the first clock and the second clock by processing the phase difference. | 03-05-2015 |
20150061910 | METHOD AND SYSTEM FOR A LOW INPUT VOLTAGE LOW IMPEDANCE TERMINATION STAGE FOR CURRENT INPUTS - Methods and systems for a low input voltage low impedance termination stage for current inputs may comprise, in a semiconductor die, generating an output current proportional to an input signal, where the output current is generated by an output stage that may include a pair of input cascode transistors and at least one pair of stacked output transistors. A source-follower feedback path for the input cascode transistors may include a feedback transistor with its gate terminal coupled to a drain terminal of a first of the input cascode transistors, a drain of the feedback transistor coupled to a supply voltage, and a source terminal of the feedback transistor coupled to a current source that is coupled to ground. A current source may be coupled to the drain of the first of the input cascode transistors. The supply voltage may be coupled to the stacked output transistors via a load resistor. | 03-05-2015 |
20150061911 | Conversion of a Discrete Time Quantized Signal into a Continuous Time, Continuously Variable Signal - Provided are, among other things, systems, apparatuses, methods and techniques for converting a discrete-time quantized signal into a continuous-time, continuously variable signal. An exemplary converter preferably includes: (1) multiple oversampling converters, each processing a different frequency band, operated in parallel; (2) multirate (i.e., polyphase) delta-sigma modulators (preferably second-order or higher); (3) multi-bit quantizers; (4) multi-bit-to-variable-level signal converters, such as resistor ladder networks or current source networks; (5) adaptive nonlinear, bit-mapping to compensate for mismatches in the multi-bit-to-variable-level signal converters (e.g., by mimicking such mismatches and then shifting the resulting noise to a frequently range where it will be filtered out by a corresponding bandpass (reconstruction) filter); (6) multi-band (e.g., programmable noise-transfer-function response) bandpass delta-sigma modulators; and/or (7) a digital pre-distortion linearizer (DPL) for canceling noise and distortion introduced by an analog signal bandpass (reconstruction) filter bank. | 03-05-2015 |
20150070201 | CIRCUITRY AND METHODS FOR USE IN MIXED-SIGNAL CIRCUITRY - Mixed-signal circuitry, comprising: a first switching-circuitry unit for use in an analogue-to-digital converter; and a second switching-circuitry unit for use in a digital-to-analogue converter, wherein: the first switching-circuitry unit is configured to sample an input analogue signal and output a plurality of samples based on a first plurality of clock signals; the second switching-circuitry unit is configured to generate an output analogue signal based on a plurality of data signals and a second plurality of clock signals; and the first and second pluralities of clock signals have the same specifications as one another. | 03-12-2015 |
20150070202 | CIRCUITRY AND METHODS FOR USE IN MIXED-SIGNALS CIRCUITRY - A switching circuit, comprising: a main switch having a control terminal; and a clock-path portion connected to the control terminal of the main switch to apply a driving clock signal thereto so as to drive the main switch, wherein the circuit is configured to controllably apply a biasing voltage to the clock-path portion so as to bias a voltage level of the driving clock signal as applied to the control terminal of the main switch. | 03-12-2015 |
20150097712 | DIGITAL-TO-ANALOG CONVERTER AND A METHOD OF OPERATING A DIGITAL-TO-ANALOG CONVERTER - A digital-to-analog converter (DAC) comprising a first section having a first plurality of current flow paths forming binary weighted values in the DAC; and a second section connected to the first section and having a second plurality of current flow paths, wherein each of the first and second plurality of current flow paths are switchable between first and second nodes, and wherein weights of one or more of the second plurality of current flow paths are notionally equal to weights of one or more of the first plurality of current flow paths so as to provide redundancy in the first section. | 04-09-2015 |
20150123830 | DIGITAL TO ANALOG CONVERTING SYSTEM AND DIGITAL TO ANALOG CONVERTING METHOD - A digital to analog converting system, which comprises: a first data converting circuit, for receiving a first digital data stream transmitted at a first clock frequency, for converting the first digital data stream to a plurality of second digital data streams transmitted at a second clock frequency, and for outputting the second digital data streams in parallel; a second data converting circuit, for receiving the second digital data streams from the first data converting circuit, and for converting the second digital data streams to a third digital data stream transmitted at a third clock frequency; and a first digital to analog converter, for converting the third digital data stream to a first output analog data stream. The second clock frequency is lower than the first clock frequency and the third clock frequency. | 05-07-2015 |
20150295585 | DECODER LEVEL SHIFTER DEVICE AND DIGITAL TO ANALOG CONVERTER USING THE SAME - A decoder level shifter device includes a first decoder level shifter and a second decoder level shifter. The first decoder level shifter has first to fourth input terminals, first and second output terminals, first and second enable terminals, first and second reset terminals. The first to fourth input terminals receive first to second input signals and their complementary signals, respectively. The second decoder level shifter has fifth to eighth input terminals, third to fourth output terminals, and third and fourth enable terminals. The fifth to eighth input terminals receive the first and second input signals and their complementary signals, respectively. The first, second, third, and fourth enable terminals are connected to the fourth, third, second, and first output terminals, respectively. | 10-15-2015 |
20150303919 | Level Shifter and Digital to Analog Converter - Provided are a level shifter and a digital to analog converter, which can make a minimum value of an output voltage be greater than 0. In the circuit, sources of a first field effect transistor and a second field effect transistor are connected to a first direct current power supply; a drain of the first field effect transistor and a gate of the second field effect transistor are connected to one terminal of a first capacitor; a connecting end formed after the other terminal of the first capacitor is connected to an input end of a phase inverter is used as a digital signal input end; a gate of the first field effect transistor, a drain of the second field effect transistor, a source of a third field effect transistor, and a source of a fifth field effect transistor are connected to one terminal of a second capacitor. | 10-22-2015 |
20150303939 | PHASE MULTIPLEXER - Representative implementations of devices and techniques provide a phase multiplexer that may be associated with at least a communication device. The described phase multiplexer may be able to switch between input phases without distorting a pulse width of a given input phase. In one implementation, this is achieved by enabling one phase at a time. More specifically, a gating window specific for each given phase is provided. The gating window is designed to avoid glitches associated with signals at an output of the phase multiplexer. Furthermore, the gating window is designed to avoid the generation of pulse width modifications. | 10-22-2015 |
20150341045 | FRAME ADAPTIVE DIGITAL TO ANALOG CONVERTER AND METHODS FOR USE THEREWITH - A digital to analog converter (DAC) includes a thermometer coder that generates a plurality of micro-current source analog controls on a frame-by-frame or symbol-by-symbol basis and to process digital inputs from symbols or frames of data based on a thermometer coding to generate a plurality of micro-current source inputs. A plurality of micro-current sources generate a corresponding plurality of micro-current source outputs in response to the plurality of micro-current source inputs, wherein first selected ones of the plurality of micro-current sources are powered-off in response to the plurality of micro-current source analog controls for a first symbol or frame of the plurality of symbols or frames of data. A summing circuit generates an analog output based a sum of the corresponding plurality of micro-current source outputs. | 11-26-2015 |
20150349792 | LOCALIZED DYNAMIC ELEMENT MATCHING AND DYNAMIC NOISE SCALING IN DIGITAL-TO-ANALOG CONVERTERS (DACS) - Methods and systems are provided for controlling operations of digital-to-analog converters (DACs), particularly ones comprising multiple DAC elements. In particular, a plurality of DAC elements in a digital-to-analog converter (DAC) may be controlled during digital-to-analog conversions, with the controlling comprising use of a switching arrangement that comprises one or more switching elements configured for controlling switching of each of the plurality of DAC elements. The controlling may comprise forcing one or more of the plurality of DAC elements in the DAC to not switch during the digital-to-analog conversions. Further, the remaining DAC elements may be scrambled. The controlling of the plurality of DAC elements in the DAC may be based on analysis of an input to the DAC that is being converted. The analysis may comprise determining when the input is backed off from full-scale. A switching sequence may be applied, via each of the one or more switching elements. | 12-03-2015 |
20160006451 | MULTI-STAGE DIGITAL-TO-ANALOG CONVERTER - A circuit includes a first digital filter that generates a first output based on a digital input and a first digital output signal. A first digital modulator generates the first digital output signal and a first error output based on the first output and a feedback error output. A second digital modulator generates a second output and a second error output based on the first error output. A second digital filter generates a second digital output signal based on the second output, and a third digital filter generates the feedback error output based on the second error output. The second digital output signal and the second error output are based on the first error output amplified by a predetermined gain. | 01-07-2016 |
20160020779 | Frequency Response Compensation in a Digital to Analog Converter - A digital-analog converter (DAC) comprises a receiving circuit configured to receive an input bit stream and generate a first bit signal stream of the input bit stream, a first delay circuit coupled to the receiving circuit to receive the first bit signal stream and to generate a second bit signal stream representing a delayed version of the first bit signal stream. The DAC also comprises a first current generation circuit to receive the first bit signal stream, the first current generation circuit configured to provide first current, corresponding to the first bit signal stream, to a first output. The DAC further comprises a second current generation circuit to receive the second bit signal stream and to provide second current to the first output responsive to receiving the second bit signal stream, a waveform of the second current inverted and scaled relative to a waveform of the first current. | 01-21-2016 |
20160020780 | Method And System For A Low Input Voltage Low Impedance Termination Stage For Current Inputs - A low input voltage low impedance termination stage for current inputs is disclosed and may include an output stage for an electrical circuit, the output stage including input cascode transistors and stacked output transistors, wherein a source-follower feedback path for the input cascode transistors may include a feedback transistor with its gate terminal coupled to a drain terminal of a first of the input cascode transistors, a drain of the feedback transistor coupled to a supply voltage, and a source terminal of the feedback transistor coupled to a current source. A current source may be coupled to the drain of the first of the input cascode transistors. The supply voltage may be coupled to the stacked output transistors via a load resistor. The input cascode transistors, the feedback transistor, and the stacked output transistors may include complementary metal-oxide semiconductor (CMOS) transistors. | 01-21-2016 |
20160036458 | Signal generator and method for generating signal patterns - A signal generator includes: a dual-port RAM for digitally storing multiple waveforms in a predefined temporal resolution; multiple channels for modeling in each case one signal pattern from at least one of the waveforms; and multiple digital-analog converters for analog output of the signal patterns in the temporal resolution. | 02-04-2016 |
20160036459 | SELECTION DEVICE - Provided is a selection device including an acquisition section for acquiring digital selection signals, and an output section for outputting selection signals to respective unit cells, each unit cell capable of being commanded to output the value zero. The selection device is characterized in that: each selection signal is for commanding the unit cell to output a value corresponding to that selection signal; the sum of the values to be output as commanded by the respective selection signals, which are output to the respective unit cells, is a value determined in association with the digital selection signal; and if the output corresponding to the digital selection signal is the value zero, then selection signals each commanding to output a non-zero value (N) are output to some of the unit cells. | 02-04-2016 |
20160094235 | DIGITAL TO ANALOG CONVERTER CIRCUITS, APPARATUS AND METHOD FOR GENERATING A HIGH FREQUENCY TRANSMISSION SIGNAL AND METHODS OF DIGITAL TO ANALOG CONVERSION - A digital to analog converter circuit includes a plurality of digital to analog converter cells. The digital to analog converter circuit further includes a control circuit configured to control an operation of a digital to analog converter cell of the plurality of digital to analog converter cells based on a first phase component of a digital signal comprising information to be transmitted during a first time interval and based on a second phase component of the digital signal comprising information to be transmitted during a second time interval. | 03-31-2016 |
20160105192 | DIGITAL TO ANALOG CONVERTER - A digital to analog converter includes a reference voltage generation unit that generates a reference voltage, and a plurality of unit conversion units. A number of unit conversion units to be activated are decided in response to digital codes. An activated unit conversion unit drives a control node to a voltage level corresponding to a voltage level of the reference voltage, and a deactivated unit conversion unit substantially maintains the control node to a voltage level greater than a voltage level of a ground voltage. | 04-14-2016 |
20160134295 | PULSE DENSITY MODULATION DIGITAL-TO-ANALOG CONVERTER WITH TRIANGLE WAVE GENERATION - A phase accumulator style circuit generates an output stream of pulses. The density of the pulse stream is proportional to the input data value relative to the maximum value supported by the bit width of an adder. The output pulse density is representative of the desired output voltage. The pulse stream may be filtered with a resistor-capacitor (RC) low pass filter to yield an analog voltage. Faster clock rates support the use of smaller output filters that reduce circuit cost. This circuit provides triangle wave generation wherein the DAC output ramps up and down at a user specified rate (slope) between user specified maximum and minimum amplitude values. The up and down triangle wave ramp rates (up and down slopes) may be different and independent or the same. | 05-12-2016 |
20160191073 | DYNAMIC POWER SWITCHING IN CURRENT-STEERING DACS - Methods and systems are provided for dynamic power switching in current-steering digital-to-analog converters (DACs). A DAC circuit may be configured to apply digital-to-analog conversions based on current steering, and to particularly incorporate use of dynamic power switching during conversions. The DAC circuit may comprise a main section, which may connect a main supply voltage to a main current source. The main section may comprise a positive-side branch and a negative-side branch, which may be configured to steer positive-side and negative-side currents, such as in a differential manner, to effectuate the conversions. The dynamic power switching may be applied, for example, via a secondary section connecting a main current source in the DAC circuit to a secondary supply voltage. The secondary supply voltage may be configured such that it may be less than the main supply voltage used in driving the current steering in the DAC circuit. | 06-30-2016 |
20160380645 | CIRCUIT AND METHOD - Embodiments of the present invention create a circuit having a digital-to-time converter with a high-frequency input for receiving a high-frequency signal, a digital input for receiving a first digital signal, and a high-frequency output for the provision of a chronologically delayed version of the HF signal. In addition, the circuit has an oscillator arrangement for the provision of the high-frequency signal, having a phase-locked loop for adjusting a frequency of the high-frequency signal. The digital-to-time converter is designed to chronologically delay the received high-frequency signal based on the first digital signal received at its digital input. | 12-29-2016 |
20190149165 | Signal processing device and method | 05-16-2019 |