Class / Patent application number | Description | Number of patent applications / Date published |
341131000 | Increasing converter resolution (e.g., dithering) | 46 |
20080231485 | SYSTEMS AND METHODS FOR IMPROVING DATA CONVERTERS - Systems and methods for improving efficiency of a data converter. An example method generates a noise signal, alters the spectrum of the noise signal based on operation of an associated data converter, and supplies the altered spectrum noise signal to the associated data converter. The data converter is a digital-to-analog converter or an analog-to-digital converter. The altered spectrum noise signal is notched at frequencies of interest. The spectrum is altered by sending a signal generated by a random number generator to a delay device and adding the output of the delay device from the output of the random number generator. Also, the spectrum is altered by seeding first and second identical random number generators, delaying the operation of the first random number generator, and adding the output of the delayed first random number generator from the second random number generator. | 09-25-2008 |
20080231486 | Method and system for increasing resolution and accuracy of an analog to digital converter - According to one embodiment, a method for increasing resolution and accuracy of an analog to digital converter receiving an input voltage includes dithering a number of digital output values from the analog to digital converter to generate a number of dithered values. The analog to digital converter can be an 8-bit analog to digital converter, for example. The dithered values are then averaged to generate an average dithered value. For example, the dithered values can be averaged using a moving average technique. The average dithered value is then scaled down to generate a scaled value. Thereafter, the scaled value is mapped to a, for example, 10-bit digital output having higher resolution and higher accuracy than the raw 8-bit output of the analog to digital converter. In this example, the resolution of the analog to digital converter is increased by a factor of four. | 09-25-2008 |
20080238743 | Dither circuit and analog digital converter having dither circuit - According to one aspect of the present invention, there is provided a dither circuit including a dither generating circuit generating a plurality of complementary signal pairs, and a dither input circuit generating a plurality of dither signals from the plurality of complementary signal pairs to add the generated dither signals to an analog input signal, in which the plurality of complementary signal pairs have different frequencies with each other, the dither input circuit includes capacitors provided for each of the plurality of complementary signal pairs and a plurality of switch pairs including first and second switches having one terminals connected to each one terminal of the capacitors, and the other terminals of the capacitors are connected to an adding point to the analog input signal, the first switch supplies ones of the complementary signal pairs to one terminals of the capacitors when a clock signal is in effective state, and the second switch supplies the others of the complementary signal pairs to one terminals of the capacitors when an inverting clock signal of the clock signal is in effective state. | 10-02-2008 |
20080272943 | ANALOG-TO-DIGITAL CONVERSION CONTROLLER, OPTICAL RECEIVING DEVICE, OPTICAL RECEIVING METHOD, AND WAVEFORM-DISTORTION COMPENSATING DEVICE - An optical receiving device of the present invention receives optical signals from an optical transmitting device which uses a modulation format wherein an optical intensity waveform of each symbol is return-to-zero (RZ) pulse, and converts the received optical signals into digital signals by a conversion process of an analog to digital (AD) converter. A control-value calculating unit subsequent to the AD converter digitally processes the digital signals, retrieves an absolute value of the digital signals or a value corresponding one-to-one with the absolute value of the digital signals, estimates errors from an appropriate timing of a sampling timing in the AD converter based on the absolute value of the digital signals or the value corresponding one-to-one with the absolute value of the digital signals, and calculates a control value controlling the sampling timing based on the estimated errors. Based on the control value, a phase of a pulse regulating the sampling timing of AD conversion can be compensated. | 11-06-2008 |
20090109074 | Increased resolution analog to digital converter - According to one embodiment, a method for increasing resolution and accuracy of an analog to digital converter receiving an input voltage includes dithering a number of digital output values from the analog to digital converter to generate a number of dithered values. The analog to digital converter can be an 8-bit analog to digital converter, for example. The dithered values are then averaged to generate an average dithered value. For example, the dithered values can be averaged using a moving average technique. The average dithered value is then scaled down to generate a scaled value. Thereafter, the scaled value is mapped to a, for example, 10-bit digital output having higher resolution and higher accuracy than the raw 8-bit output of the analog to digital converter. In this example, the resolution of the analog to digital converter is increased by a factor of four. | 04-30-2009 |
20090140896 | CLOCK DITHERING PROCESS FOR REDUCING ELECTROMAGNETIC INTERFERENCE IN D/A CONVERTERS AND APPARATUS FOR CARRYING OUT SUCH PROCESS - A process and apparatus for generating an output signal whose frequency varies according to a modulation scheme, the process including the steps of providing a dither generator for receiving a first input signal representative of a clock frequency and for generating, according to the modulation scheme, a dithered output signal representative of the first signal at a dithered frequency; providing a DSP for receiving the following input signals: the signal at the dithered frequency and a second signal representative of a clock frequency, the DSP adapted to generate a processed output signal representative of the maximum frequency of the second signal; wherein the modulation scheme has a periodic ultrasonic modulating wave. | 06-04-2009 |
20090174586 | ANALOG TO DIGITAL CONVERTER WITH DYNAMICALLY RECONFIGURABLE CONVERSION RESOLUTION - A method and apparatus for an analog to digital converter with dynamically reconfigurable conversion resolution. The analog to digital converter comprises a sample and hold circuit, a controller, and a single, one-bit converter stage. The sample and hold circuit holds an input analog signal to form a captured analog signal. The controller determines a number of digital output bits required to generate digital output at a user defined conversion resolution. The one-bit converter stage processes an instance of a captured analog signal to generate an output bit. The controller iteratively processes a residue voltage through the one-bit converter stage a number of times required to generate the number of digital output bits to form a digital output with the user defined conversion resolution. | 07-09-2009 |
20090267816 | DELTA SIGMA-TYPE A/D CONVERTER - There is provided a technique for reducing the adverse effect of idle tones in the channels in a ΔΣ-type A/D converter including a plurality of channels for converting analog input signals into digital signals. The ΔΣ-type A/D converter includes an L channel for converting a left analog input signal into a digital signal and an R channel for converting a right analog input signal into a digital signal. Each of the L channel and the R channel includes a DC dither circuit for generating a DC addition voltage for shifting the frequency of an idle tone. In the L channel and the R channel, DC addition voltages generated by DC dither circuits are different from each other. | 10-29-2009 |
20100073210 | Pipelined converter systems with enhanced linearity - Signal converter system embodiments are provided to substantially reduce symmetrical and asymmetrical conversion errors. Signal-processing stages of these embodiments may include a signal sampler in addition to successively-arranged signal converters. In system embodiments, injected analog dither signals are initiated in response to a random digital code. They combine with a system's analog input signal and the combined signal is processed down randomly-selected signal-processing paths of the converter system to thereby realize significant improvements in system linearity. Because these linearity improvements are realized by simultaneous processing of the input signal and the injected dither signal, a combined digital code is realized at the system's output. A first portion of this combined digital code corresponds to the analog input signal and a second portion corresponds to the injected analog dither signal. The final system digital code is realized by subtracting out the second portion with a back-end decoder that responds to the random digital code. | 03-25-2010 |
20100090875 | Dithering Technique For Reducing digital Interference - The invention is directed to a circuit and method for equalizing digital interference. A digital interference equalizing circuit may include a signal clipping unit, receiving a digital signal and clipping the digital signal based upon a clipping function, and a dithering unit adding dither to the clipped digital signal. A digital interference equalizing circuit may also include a noise detection circuit, detecting the normal activity level in a digital signal which may then be used to scale the dither added to the digital signal. | 04-15-2010 |
20100127906 | DATA RECOVERY CIRCUIT, DATA RECOVERY METHOD AND DATA RECEIVING APPARATUS - A data recovery circuit includes an analog-digital converter creating a digital code sequence, a phase detector calculating a position of a crossing point from the digital code sequence, a phase estimator acquiring a presumed position of a data center point of a data sequence based on the position of the crossing point, and a data determining circuit extracting the sequence of data determination values from the digital code sequence based on the position of the crossing point and the presumed position of the data center point. | 05-27-2010 |
20100156684 | SAR ANALOG-TO-DIGITAL CONVERTER HAVING DIFFERING BIT MODES OF OPERATION - A method for operating an N-bit SAR ADC as a greater than N-bit resolution SAR ADC includes the steps of taking a plurality of samples for each analog value being converted to a digital value by the SAR ADC. A portion of an LSB is added to all but one of the plurality of samples. The plurality of samples are then accumulated and output as a digital value. The digital value has a resolution greater than the N-bit resolution of the SAR ADC. | 06-24-2010 |
20100188274 | Analog-to-Digital Converter Using Digital Output as Dither - An analog-to-digital converter includes a delta circuit, a sigma circuit, and a quantizer circuit and further includes a feedback circuit that modulates a reference voltage provided to the quantizer circuit based on the quantizer circuit output. Modulation of the quantizer reference voltage dithers the quantizer circuit to effectively reduce or avoid lock bands. The analog-to-digital converter may be used in combination with a microelectromechanical (MEMS) device such as a gyroscope, an accelerometer, or a pressure sensor. | 07-29-2010 |
20100201553 | A/D Converter and Method for Enhancing Resolution of Digital Signal - A method for enhancing resolution of digital signals converted from analog signals is provided. The method includes the steps of: converting an analog input signal into N-bit digital outputs, where N is a positive integer; interpolating the N-bit digital outputs to add one or more least significant bit orders for the N-bit digital outputs; generating one or more dither values as least significant bits corresponding to the least significant bit orders; and superimposing the dither values on the interpolation of the N-bit digital outputs. An A/D converter is also disclosed herein. | 08-12-2010 |
20100207793 | IMAGE SENSING SYSTEM - In general, a method includes comparing a first input signal with a second input signal to produce an output signal. The first input signal corresponds to an amount of light detected by a sensor, and the second input signal corresponds to an aggregated value of the output signal. The method may also include aggregating the output signal in a digital accumulator and converting a digital signal from an output of the digital accumulator to an analog signal. | 08-19-2010 |
20100214141 | Analog-to-digital converter - There is provided an analog-to-digital converter capable of performing analog-to-digital conversion with good accuracy. The analog-to-digital converter in accordance with the present invention includes a dither generation circuit | 08-26-2010 |
20100283646 | ANALOG TO DIGITAL CONVERTER - An analog to digital converter is provided. The converter comprises a dither gain generator, a first stage, a multiplier, a second stage and a digital error correction logic. The dither gain generator generates a dither gain. The first stage receives a first voltage to generate a first digital code and a second voltage. The multiplier is coupled to the first stage and multiplies the second voltage with the dither gain to generate a third voltage. The second stage receives the third voltage to generate a second digital code. The digital error correction logic receives and corrects the first digital code and the second digital code to generate a digital code corresponding to the first voltage. | 11-11-2010 |
20110037633 | DELTA SIGMA-TYPE A/D CONVERTER - There is provided a technique for reducing the adverse effect of idle tones in the channels in a ΔΣ-type A/D converter including a plurality of channels for converting analog input signals into digital signals. The ΔΣ-type A/D converter includes an L channel for converting a left analog input signal into a digital signal and an R channel for converting a right analog input signal into a digital signal. Each of the L channel and the R channel includes a DC dither circuit for generating a DC addition voltage for shifting the frequency of an idle tone. In the L channel and the R channel, DC addition voltages generated by DC dither circuits are different from each other. | 02-17-2011 |
20110148676 | DIGITAL PHASE LOCKED LOOP WITH DITHERING - An embodiment of the present invention provides a phase locked loop that operates on clock signals derived from an RF clock signal generated by the phase locked loop. A frequency reference input provides a reference clock. A controllable oscillator generates the RF clock signal. A phase detection circuit operates on the reference clock to provide digital phase error samples indicative of a phase difference between the reference clock and the RF clock. A dithering circuit is coupled to the reference signal and injects a short sequence dither signal into the reference signal in order to overcome quantization noise and thereby improve RMS phase-error detection for integer channels. | 06-23-2011 |
20110169672 | METHOD AND APPARATUS FOR DITHERING IN MULTI-BIT SIGMA-DELTA DIGITAL-TO-ANALOG CONVERTERS - A multi-bit (M-bit, M>1) Sigma-Delta digital-to-analog converter (DAC) with a variable resolution multi-bit quantizer that has its digital value inputs that are truncated or rounded to a resolution that follows a random or pseudo-random sequence to provide automatic dynamic dithering for removing undesired idle tones in the analog output of the Sigma-Delta DAC. Random numbers N(n) between 1 and M are provided, and M-N(n) least significant bits in each M-bit digital value at the output of the quantizer are forced to zero with a digital truncator or rounder. The random numbers N(n) may be provided by a random or pseudo-random sequence generator, e.g., Galois linear feedback shift register in combination with digital comparators and an adder. | 07-14-2011 |
20110227771 | INEXPENSIVELY IMPROVING RESOLUTION AND REDUCING NOISE OF LOW-NOISE SIGNALS - Systems and methods for improving resolution of low-noise signals in an analog-to-digital conversion circuit. A simple, low cost pseudo-noise generating circuit is disclosed that, when connected to the signal conditioning circuitry of A/D conversion circuit, adds pseudo-noise to an analog input voltage signal. Additional pseudo-noise is beneficial for improving the resolution of analog-to-digital conversion when oversampling and summing or averaging are used in post-conversion processing operations. The circuit is composed of a plurality of resistors configured in at least two parallel branches. An individually switchable voltage source output is connected to each branch. A resulting analog voltage can be measured at a common termination point for the branches, depending on the combination of switchable voltage source output turned on, and the branch to which the voltage output is applied. By varying the combination of switchable voltage source outputs turned on over time, a known analog pseudo-noise signal is developed. | 09-22-2011 |
20120075131 | Systems and Methods for Enhancing Analog to Digital Conversion Resolution - Various embodiments of the present invention provide systems and methods for analog to digital conversion. As an example, a circuit for converting analog signals to digital signals is disclosed. The circuit includes a variable gain amplifier circuit, an analog to digital converter circuit, and a summation circuit. The variable gain amplifier circuit is operable to apply a first gain value to an input to yield a first amplified output, and to apply a second gain value to the input to yield a second amplified output. The analog to digital converter circuit is operable to receive a derivative of the first amplified output and to provide a corresponding first digital sample, and to receive a derivative of the second amplified output and to provide a corresponding second digital sample. The summation circuit is operable to combine the first digital sample and the second digital sample. | 03-29-2012 |
20120223849 | SET-POINT RESOLUTION IMPROVEMENT FOR SWITCH MODE POWER SUPPLIES - A Digital-to-Analog Converter (DAC) produces an analog reference value from a first reference input. The analog reference value and an output value are used to produce an analog error signal. An Analog-to-Digital Converter (ADC) converts the analog error signal to a digital value. The ADC has higher level of resolution than the DAC. An error encoder adjusts the digital value to produce a digital error value using a second reference input. | 09-06-2012 |
20120306675 | ADC WITH RESOLUTION DETECTOR AND VARIABLE DITHER - A resolution detector may be used in conjunction with an ADC to identify unresolved bits in a raw digital output of the ADC. Bits that have been properly resolved by the ADC may be distinguished from those that have not been successfully resolved, because of time limitations or other reasons. Each bit that has not been successfully resolved may be classified and referred to as an unresolved bit. If there are any unresolved bits detected in a sampling cycle, dither may then be incorporated in the raw digital output to compensate for the unresolved bits in that cycle. The dither may be added to the raw digital output of the ADC to eliminate any missing codes in the processed digital output codes or the dither may be substituted for the unresolved bits in raw digital output to generate the processed digital output. | 12-06-2012 |
20120326904 | MULTI-MODE ANALOG-TO-DIGITAL CONVERTER - Techniques and devices provide analog-to-digital conversion at two or more signal frequencies or frequency bands and can be used to construct multi-mode analog-to-digital converters in various circuits, including receivers and transceivers for wireless communications and radio broadcast environments. Adjustable analog-to-digital converters based on the described techniques can be configured to adjust circuit parameters to adapt the technical specifications of different input signals at different signal frequencies or frequency bands, such as FM, HD-radio, and DAB radio signals in radio receiver applications. | 12-27-2012 |
20130002462 | Analog to Digital Converter with Generalized Beamformer - Various embodiments of the present invention provide systems, apparatuses and methods for performing analog to digital conversion. For example, an analog to digital converter circuit is discussed that includes an analog input, a number of analog to digital converters and a generalized beamformer. The analog to digital converters are operable to receive the analog input and to yield a number of digital streams. Each of the analog to digital converters samples the analog input with different phase offsets. The generalized beamformer is operable to weight and combine the digital streams to yield a digital output. | 01-03-2013 |
20130038481 | Analog to Digital Converter with Adjustable Conversion Window - In one embodiment, an apparatus includes a first capacitor system and a second capacitor system. Each capacitor system comprises one or more engaged capacitors from respective pluralities of selectively engagable capacitors. The first capacitor system and second capacitor system are respectively selectively coupled to a first reference voltage and a second reference voltage. The apparatus further includes a switch configured to transfer charge between the first capacitor system and the second capacitor system when the switch is closed such that the first capacitor system and the second capacitor system each store the same first voltage. The apparatus further includes a node coupled to the first capacitor system, the second capacitor system, and a first input of a differential amplifier of an analog to digital converter. The node is configured to bias the differential amplifier to the first voltage. | 02-14-2013 |
20130057419 | DELTA-SIGMA A/D CONVERTER - A delta-sigma A/D converter having plural input channels comprises a first quantizer which quantizes and outputs a received signal; a first D/A converter which converts an output signal of the first quantizer into an analog signal, and outputs the converted analog signal; a first operation unit which outputs a signal indicative of a difference of the first analog input signal and an output signal of the first D/A converter; a first integrator which integrates an output signal of the first operation unit and outputs the integrated signal; a first dither circuit which generates a first dither signal; and a second operation unit which adds the first dither signal to the output signal of the first integrator and outputs the added signal to the first quantizer. | 03-07-2013 |
20130113639 | SYSTEMS AND METHODS FOR RANDONMIZING COMPONENT MISMATCH IN AN ADC - Circuits and methods for converting a signal from analog to digital. A random number generator provides a random number to a memory. The memory is preconfigured to include codes of predetermined digital to analog (DAC) configurations that provide the maximum amount of DAC gradient suppression. At least one Flash reference generation DAC (FRGD) has an input coupled to the memory unit and an output providing a reference voltage level for its respective Flash comparator. The Flash comparators compare the analog input signal to their respective reference voltage and provide a digital output signal based on the comparison. | 05-09-2013 |
20130127650 | A/D CONVERSION DEVICE - An A/D conversion device has means for generating a control clock signal having a cycle that is an integral multiple of a cycle of a reference clock signal; means for generating a shift voltage which varies every cycle of the reference clock signal while the cycle of the control clock signal is taken as one cycle, means for offsetting an analog signal by the shift voltage, means for A/D converting the offset analog signal every cycle of the reference clock signal signal, and means for averaging outputs from the A/D converter every cycle of the control clock signal. | 05-23-2013 |
20130154862 | DYNAMICALLY ADJUSTED A/D RESOLUTION - A process variable transmitter is used to measure a process variable, and, in doing so, dynamically changes the resolution of the A/D converter based upon the measured value of the analog input signal. This can be done by automatically adjusting the configurable resolution gain adjustment based on the value of the analog signal being measured, by normalizing the input signal being measured so that it is centered in an optimal resolution window of the A/D converter, or by adjusting a voltage reference provided to the A/D converter. | 06-20-2013 |
20130207819 | STABILITY CORRECTION FOR A SHUFFLER OF A SIGMA-DELTA ADC - A sigma-delta analog-to-digital converter (“ΣΔ ADC”) may include a loop filter, ADC, a feedback digital-to-analog converter (“DAC”), and a control circuit. The feedback DAC may include several unit elements (resistors, capacitors, or current sources) that, ideally, are identical to each other but vary due to mismatch errors introduced during manufacture. Mismatch errors may introduce signal errors that generate undesirable noise frequencies and non-linearities in a ΣΔ ADC output signal. Embodiments of the present invention provide a stability corrected second order shuffler that allows for the shaping of the frequency response by the ΣΔ ADC to reduce the effect of the mismatch error between DAC unit elements. The second order shuffler may include accumulation correctors, to suppress saturation for accumulators within the shuffler. The suppression may compress the range of accumulation values for each accumulator while maintaining context for the values to stabilize operation of the second order shuffler. | 08-15-2013 |
20130207820 | SIGMA DELTA MODULATOR WITH DITHER - A sigma delta modulator may include a loop filter and an adder configured to accept an output of the loop filter and a dither input signal. The adder may be further configured to combine the output of the loop filter and the dither input signal into a combined output signal. The sigma delta modulator may further include a quantizer configured to accept the combined output signal from the adder, and quantize the combined signal into a quantizer output signal. The sigma delta modulator may further include a first subtractor configured to accept the quantizer output signal and subtract the dither input signal from the quantizer output signal. | 08-15-2013 |
20130249724 | DIGITAL-TO-ANALOG CONVERTER RESOLUTION ENHANCEMENT USING CIRCULAR BUFFER - A system and method for generating an analog signal is disclosed. In one embodiment, system includes a first-in, first-out (FIFO) buffer configured to receive and store a plurality of digital values written to the FIFO buffer. The system further includes a digital-to-analog converter (DAC) coupled to read the digital values from the FIFO buffer and configured to convert the digital values to an analog signal. The FIFO buffer is configured to operate in a first mode in which writes to the FIFO buffer are inhibited and current digital values stored in the FIFO buffer are provided to the DAC in a repeating sequence. | 09-26-2013 |
20130257636 | ANALOG-TO-DIGITAL CONVERTING CIRCUIT AND ACCUMULATION CIRCUIT INCLUDING THE SAME - An analog-to-digital converting circuit includes a first comparison circuit configured to compare a first analog signal associated with a first digital signal with an analog input signal and output a first selection signal based on a result of the comparison, a second comparison circuit configured to compare a second analog signal associated with a second digital signal with the analog input signal and output a second selection signal based on a result of the comparison, and a selection circuit configured to generate intermediate digital signals associated with the first digital signal and output one of the intermediate digital signals as the first digital signal and another of the intermediate digital signals as the second digital signal, based on the first selection signal and the second selection signal. | 10-03-2013 |
20140022103 | SEMICONDUCTOR DEVICE HAVING ANALOG-TO-DIGITAL CONVERTER WITH GAIN-DEPENDENT DITHERING AND COMMUNICATION APPARATUS - A semiconductor communication device reduces influence of noise that is produced by applying a dither signal. The semiconductor communication device includes a Delta-Sigma analog-to-digital converter that converts input analog signals to digital signals, a power detecting unit that detects signal power of the digital signals, a gain control unit that changes a gain setting of analog signals to be input to the Delta-Sigma analog-to-digital converter depending on the signal power of the digital signals, and a dither signal control unit that causes the Delta-Sigma analog-to-digital converter to selectively add the dither signal when the gain setting changes. | 01-23-2014 |
20140091957 | DYNAMIC DITHERING METHOD AND APPARATUS FOR ANALOG-TO-DIGITAL CONVERTERS - A dynamic dithering method is provided for improving linearity in analog-to-digital converters. | 04-03-2014 |
20140132430 | ANALOG-TO-DIGITAL CONVERTER SYSTEM AND METHOD - An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented. | 05-15-2014 |
20140132431 | ANALOG-TO-DIGITAL CONVERTER - An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented. | 05-15-2014 |
20140132432 | ANALOG-TO-DIGITAL CONVERTER - An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented. | 05-15-2014 |
20140139363 | ANALOG-TO-DIGITAL CONVERTER WITH INPUT VOLTAGE BIASING DC LEVEL OF RESONANT OSCILLATOR - An analog-to-digital converter is disclosed comprising a resonant oscillator comprising an input operable to receive an analog input signal and an output operable to output an oscillating signal. A DC offset detector detects a DC offset in the oscillating signal caused by the analog input signal, wherein the DC offset is converted into a digital output signal representing the analog input signal. | 05-22-2014 |
20140320324 | TIME-TO-DIGITAL CONVERSION WITH ANALOG DITHERING - There is described a time-to-digital conversion scheme using an arrangement of delay elements based Time-to-Digital Converter, TDC ( | 10-30-2014 |
20140333461 | Semiconductor Device Having Analog-To-Digital Converter With Gain-Dependent Dithering And Communication Apparatus - A semiconductor communication device reduces influence of noise that is produced by applying a dither signal. The semiconductor communication device includes a Delta-Sigma analog-to-digital converter that converts input analog signals to digital signals, a power detecting unit that detects signal power of the digital signals, a gain control unit that changes a gain setting of analog signals to be input to the Delta-Sigma analog-to-digital converter depending on the signal power of the digital signals, and a dither signal control unit that causes the Delta-Sigma analog-to-digital converter to selectively add the dither signal when the gain setting changes. | 11-13-2014 |
20160204793 | SIGMA-DELTA ADC WITH DITHER | 07-14-2016 |
20160204794 | Efficient Dithering Technique for Sigma-Delta Analog-to-Digital Converters | 07-14-2016 |
20190149161 | TRANSMISSION DEVICE, TRANSMISSION SYSTEM, AND ROBOT | 05-16-2019 |