Class / Patent application number | Description | Number of patent applications / Date published |
257682000 | With desiccant, getter, or gas filling | 32 |
20080272475 | Air Cavity Package for a Semiconductor Die and Methods of Forming the Air Cavity Package - A die package ( | 11-06-2008 |
20080283989 | Wafer level package and wafer level packaging method - Provided are a wafer level package and a wafer level packaging method, which are capable of performing an attaching process at a low temperature and preventing contamination of internal devices. In the wafer level package, a device substrate includes a device region, where a device is formed, and internal pads on the top surface. The internal pads are electrically connected to the device. A cap substrate includes a getter corresponding to the device on the bottom surface. A plurality of sealing/attaching members are provided between the device substrate and the cap substrate to attach the device substrate and the cap substrate and seal the device region and the getter. The sealing/attaching members are formed of polymer. A plurality of vias penetrate the cap substrate and are connected to the internal pads. The getter provided in the sealed space defined by the sealing/attaching members can prevent the devices of the device region from being contaminated by moisture or foreign particles generated during the fabrication process, and the sealing/attaching process can be performed at a lower temperature compared with a typical sealing/attaching process using a metal. | 11-20-2008 |
20080296747 | Micromechanical component having thin-layer encapsulation and production method - A micromechanical component having a substrate and having a thin-layer, as well as having a cavity which is bounded by the substrate and the thin-layer, at least one gas having an internal pressure being enclosed in the cavity. The gas phase has a non-atmospheric composition. A method for producing a micromechanical component having a substrate and having a thin-layer encapsulation, as well as having a cavity which is bounded by the substrate and the thin-layer encapsulation. The method has the steps of positioning a polymer in a cavity, closing the cavity and generating a gas phase of non-atmospheric composition in the cavity by decomposing at least a part of the polymer. An internal pressure is generated, which may be higher than the process pressure when the cavity is closed. | 12-04-2008 |
20090001537 | Gettering material for encapsulated microdevices and method of manufacture - A method for providing improved gettering in a vacuum encapsulated microdevice is described. The method includes designing a getter alloy to more closely approximate the coefficient of thermal expansion of a substrate upon which the getter alloy is deposited. Such a getter alloy may have a weight percentage of less than about 8% iron (Fe) and greater than about 50% zirconium, with the balance being vanadium and titanium, which may better match the coefficient of thermal expansion of a silicon substrate. In one exemplary embodiment, the improved getter alloy is deposited on a silicon substrate prepared with a plurality of indentation features, which increase the surface area of the substrate exposed to the vacuum. Such a getter alloy is less likely to delaminate from the indented surface of the substrate material during heat-activated steps, such as activating the getter material and bonding a lid wafer to the device wafer supporting the microdevice. | 01-01-2009 |
20090026598 | Wafer Level Packaging Integrated Hydrogen Getter - A wafer-level package that employs one or more integrated hydrogen getters within the wafer-level package on a substrate wafer or a cover wafer. The hydrogen getters are provided between and among the integrated circuits on the substrate wafer or the cover wafer, and are deposited during the integrated circuit fabrication process. In one non-limiting embodiment, the substrate wafer is a group III-V semiconductor material, and the hydrogen getter includes a titanium layer, a nickel layer, and a palladium layer. | 01-29-2009 |
20090072371 | Methods And Articles Incorporating Local Stress For Performance Improvement Of Strained Semiconductor Devices - A packaged semiconductor device ( | 03-19-2009 |
20090079054 | Semiconductor device, structure of mounting the same, and method of removing foreign matter from the same - A semiconductor device includes a package defining an enclosed inner space, a semiconductor chip having a movable portion on one side and housed in the closed inner space of the package, and a catching member located in the closed inner space of the package to catch and hold a foreign matter suspended in an atmosphere in the closed inner space of the package. | 03-26-2009 |
20090236717 | Organic Electronic Component With Dessicant-Containing Passivation Material - The invention relates to an organic electronic component, such as e.g. an organic light diode or an organic solar cell with structures made of passivation material, the passivation material comprising at least one dessicant. | 09-24-2009 |
20090261464 | Getter Formed By Laser-Treatment and Methods of Making Same - The present disclosure relates to methods of treating a silicon substrate with an ultra-fast laser to create a getter material for example in a substantially enclosed MEMS package. In an embodiment, the laser treating comprises irradiating the silicon surface with a plurality of laser pulses adding gettering microstructure to the treated surface. Semiconductor based packaged devices, e.g. MEMS, are given as examples hereof. | 10-22-2009 |
20090309203 | GETTER ON DIE IN AN UPPER SENSE PLATE DESIGNED SYSTEM - A microelectromechanical system (MEMS) hermetically sealed package device that is less labor intensive to construct and thus less expensive to manufacture. An example package device includes a package having a bottom section and a lid. A MEMS die includes upper and lower plates made in accordance with upper sense plate design. The MEMS die is mounted to the bottom section. The upper and lower plates form a cavity that receives a MEMS device. The upper and lower plates are bonded by one or more bond pads and a seal ring that surrounds the cavity. The seal ring includes grooves that allow exposure of the cavity to the space within the package. A getter material applied to a top surface of the MEMS die on the upper plate. The getter material is activated during or after the lid is mounted to the bottom section. | 12-17-2009 |
20100013071 | ORGANIC LIGHT EMITTING DEVICE AND MANUFACTURING METHOD THEREOF - The present invention relates to an organic light emitting device and a manufacturing method thereof. A manufacturing method of an organic light emitting device according to an exemplary embodiment of the present invention includes forming a thin film structure on a first substrate, forming a dehumidification buffer layer on a second substrate, combining the first substrate and the second substrate, and heat treating the dehumidification buffer layer to soften the dehumidification buffer layer. | 01-21-2010 |
20100025832 | REDUCED STICTION AND MECHANICAL MEMORY IN MEMS DEVICES - A MEMS device is packaged in a process which hydrogen (H) deuterium (D) for reduced stiction. H is exchanged with D by exposing the MEMS device with a deuterium source, such as deuterium gas or heavy water vapor, optionally with the assistance of a direct or downstream plasma. | 02-04-2010 |
20100084752 | SYSTEMS AND METHODS FOR IMPLEMENTING A WAFER LEVEL HERMETIC INTERFACE CHIP - Systems and methods for enabling hermetic sealing at the wafer level during fabrication of a microelectromechanical sensor (MEMS) device. The MEMS device has a specialized hermetic interface chip (HIC) that facilitates a stable hermetic sealing process. The HIC includes a plurality of vias in a substrate layer, a plurality of mesas having etched portions, a seal ring, a plurality of conductive leads on a first side of the HIC, and a plurality of conductive leads on a second side of the HIC. The plurality of conductive leads on the first side of the HIC feeds from the etched portions of the plurality of mesas through the plurality of vias in the substrate layer to the plurality of conductive leads on the second side of the HIC. The conductive leads are capable of connecting an external circuit to the MEMS device. | 04-08-2010 |
20100270667 | SEMICONDUCTOR PACKAGE WITH MULTIPLE CHIPS AND SUBSTRATE IN METAL CAP - A semiconductor package includes a first semiconductor chip, a second semiconductor chip, a first substrate, a second substrate and a metal cap. The chips are electrically connected to the first substrate, the second substrate is disposed between the chips, and the chips and the second substrate are disposed within the metal cap. | 10-28-2010 |
20110079889 | CAVITY STRUCTURE COMPRISING AN ADHESION INTERFACE COMPOSED OF GETTER MATERIAL - A structure comprising a cavity delimited by a first substrate and a second substrate attached to the first substrate by an adhesion interface, in which a first part of a first portion of a getter material forms part of the adhesion interface, and a second part of the first portion of getter material is placed in the cavity, the first portion of getter material being placed against the first substrate or the second substrate, the adhesion interface further comprising part of a second portion of a getter material thermocompressed to the first part of the first portion of getter material, said second portion of getter material being placed against the second substrate when the first portion of getter material is placed against the first substrate or placed against the first substrate when the first portion of getter material is placed against the second substrate. | 04-07-2011 |
20110127660 | METHODS AND MATERIALS FOR THE REDUCTION AND CONTROL OF MOISTURE AND OXYGEN IN OLED DEVICES - Embodiments of the invention provide an electronic device which may include an interior compartment housing at least one electronic component that may be reactive to target impurities. The electronic component may include at least a cathode and an anode. A purifier material may be interspersed within a conducting polymer layer between the cathode and the anode. The purifier material may decrease target impurities within the interior compartment of the electronic device from a first level to a second level. | 06-02-2011 |
20110272796 | Nano-structured Gasket for Cold Weld Hermetic MEMS Package and Method of Manufacture - A structure and method for cold weld compression bonding using a metallic nano-structured gasket is provided. This structure and method allows a hermetic package to be formed at lower pressures and temperatures than are possible using bulk or conventional thin-film gasket materials. | 11-10-2011 |
20110285004 | DEVICES INCLUDING, METHODS USING, AND COMPOSITIONS OF REFLOWABLE GETTERS - Methods for protecting circuit device materials, optoelectronic devices, and caps using a reflowable getter are described. The methods, devices and caps provide advantages because they enable modification of the shape and activity of the getter after sealing of the device. Some embodiments of the invention provide a solid composition comprising a reactive material and a phase changing material. The combination of the reactive material and phase changing material is placed in the cavity of an electronic device. After sealing the device by conventional means (epoxy seal for example), the device is subjected to thermal or electromagnetic energy so that the phase changing material becomes liquid, and consequently: exposes the reactive material to the atmosphere of the cavity, distributes the getter more equally within the cavity, and provides enhanced protection of sensitive parts of the device by flowing onto and covering these parts, with a thin layer of material. | 11-24-2011 |
20120104589 | Deposition-free sealing for Micro- and Nano-fabrication - A method for sealing through-holes in a material via material diffusion, without the deposition of a sealant material, is disclosed. The method is well suited to the fabrication and packaging of microsystems technology-based devices and systems. In some embodiments, the method comprises forming sacrificial material release through-holes through a structural layer, removing the sacrificial material via an etch that etches the sacrificial material through the release through-holes, and sealing of the release through-holes via material diffusion. | 05-03-2012 |
20120112334 | PACKAGING STRUCTURE OF A MICRO-DEVICE INCLUDING A GETTER MATERIAL - A packaging structure including at least one cavity wherein at least one micro-device is provided, the cavity being bounded by at least a first substrate and at least a second substrate integral with the first substrate through at least one bonding interface consisting of at least one metal or dielectric material, wherein at least one main face of the second substrate provided facing the first substrate is covered with at least one layer of at least one getter material, the bonding interface being provided between the first substrate and the layer of getter material. | 05-10-2012 |
20120205791 | SEMICONDUCTOR CHIP WITH REINFORCING THROUGH-SILICON-VIAS - A method of manufacturing includes connecting a first end of a first through-silicon-via to a first die seal proximate a first side of a first semiconductor chip. A second end of the first thu-silicon-via is connected to a second die seal proximate a second side of the first semiconductor chip opposite the first side. | 08-16-2012 |
20130015568 | GETTER STRUCTURE WITH OPTIMIZED PUMPING CAPACITYAANM FERRANDON; ChristineAACI SassenageAACO FRAAGP FERRANDON; Christine Sassenage FRAANM BAILLIN; XavierAACI CrollesAACO FRAAGP BAILLIN; Xavier Crolles FR - Getter structure comprising at least one getter portion arranged on a support and including at least two adjacent getter material parts arranged on the support one beside the other, with different thicknesses and of which the surface grain densities are different from one another. | 01-17-2013 |
20130214400 | MICRO-ELECTRO MECHANICAL SYSTEMS (MEMS) STRUCTURES AND METHODS OF FORMING THE SAME - A device includes a capping substrate bonded with a substrate structure. The substrate structure includes an integrated circuit structure. The integrated circuit structure includes a top metallic layer disposed on an outgasing prevention structure. At least one micro-electro mechanical system (MEMS) device is disposed over the top metallic layer and the outgasing prevention structure. | 08-22-2013 |
20140048921 | ENCAPSULATED ARRAYS OF ELECTRONIC SWITCHING DEVICES - An electronic switching device array encapsulated in an encapsulating structure; wherein said array is exposed to one or more gas pockets between said array and said encapsulating structure. | 02-20-2014 |
20140203421 | MICRO-ELECTRO MECHANICAL SYSTEM (MEMS) STRUCTURES AND METHODS OF FORMING THE SAME - A device includes a first substrate bonded with a second substrate structure. The second substrate structure includes an outgasing prevention structure. At least one micro-electro mechanical system (MEMS) device is disposed over the outgasing prevention structure. | 07-24-2014 |
20140346657 | THIN FILM CAPPING - A method for sealing cavities in micro-electronic/-mechanical system (MEMS) devices to provide a controlled atmosphere within the sealed cavity includes providing a semiconductor substrate on which a template is provided on a localized area of the substrate. The template defines the interior shape of the cavity. Holes are made so as to enable venting of the cavity to provide a desired atmosphere to enter into the cavity through the hole. Finally, a sealing material is provided in the hole to seal the cavity. The sealing can be made by compression and/or melting of the sealing material. | 11-27-2014 |
20150130039 | LAYER ARRANGEMENT AND A WAFER LEVEL PACKAGE COMPRISING THE LAYER ARRANGEMENT - The invention relates to a layer arrangement and a wafer level package comprising the layer arrangement, and in particular, the layer arrangement comprises a getter layer and further comprises a sacrificial layer. The wafer level package may be used in microelectromechanical systems (MEMS) packaging at a vacuum level of about 10 mTorr or less such as close to 1 mTorr (i.e. MEMS vacuum packaging). | 05-14-2015 |
20160031706 | SEMICONDUCTOR DEVICE, RELATED MANUFACTURING METHOD, AND RELATED ELECTRONIC DEVICE - A semiconductor device may include an enclosure structure. The semiconductor device may further include a getter for absorb gas molecules. The getter may be positioned (and enclosed) inside the enclosure structure and may overlap a first portion of a surface of the enclosure structure. The semiconductor device may further include an inductor. The inductor may be positioned (and enclosed) inside the enclosure structure and may overlap a second portion of the surface of the enclosure structure without overlapping the getter in a direction perpendicular to the first surface of the enclosure structure. | 02-04-2016 |
20160035589 | SEMICONDUCTOR DEVICE, RELATED MANUFACTURING METHOD, AND RELATED ELECTRONIC DEVICE - A method for manufacturing semiconductor device may include the following steps: performing an etching process to remove a sacrificial layer from a first composite structure, wherein the first composite structure includes a first substrate structure; performing a heat treatment to release a gas from the first composite structure; performing a cleaning process to remove an oxide layer from the first composite structure; and combining the first composite structure with a second composite structure that includes a second substrate structure and an electronic component positioned on the second substrate substructure, such that the first substrate structure is combined with the second substrate structure to form an enclosure structure that encloses the electronic component. | 02-04-2016 |
20160049342 | Module Arrangement For Power Semiconductor Devices - A module arrangement for power semiconductor devices, including one or more power semiconductor modules, wherein the one or more power semiconductor modules include a substrate with a first surface and a second surface being arranged opposite to the first surface, wherein the substrate is at least partially electrically insulating, wherein a conductive structure is arranged at the first surface of the substrate, wherein at least one power semiconductor device is arranged on the conductive structure and electrically connected thereto, wherein the one or more modules includes an inner volume for receiving the at least one power semiconductor device which volume is hermetically sealed from its surrounding by a module enclosure, wherein the module arrangement includes an arrangement enclosure at least partly defining a volume for receiving the one or more modules, and wherein the arrangement enclosure seals covers the volume. | 02-18-2016 |
20160176703 | MULTI-LEVEL GETTER STRUCTURE AND ENCAPSULATION STRUCTURE COMPRISING SUCH A MULTI-LEVEL GETTER STRUCTURE | 06-23-2016 |
20160181168 | Environmental hardened packaged integrated circuit | 06-23-2016 |