Class / Patent application number | Description | Number of patent applications / Date published |
257075000 | Recrystallized semiconductor material | 40 |
20090020763 | POLY SILICON LAYER AND STRUCTURE FOR FORMING THE SAME - A method of fabricating a poly silicon layer comprising the following steps is provided. First, a substrate is provided and an amorphous silicon layer is formed on the substrate. A patterned metal layer is formed on the amorphous silicon layer. Next, a pulsed rapid thermal annealing process is performed to form a metal silicide between the patterned metal layer and the amorphous silicon layer, wherein the patterned metal layer and the amorphous silicon layer are adopted for conducting thermal energy to the amorphous silicon layer such that the amorphous silicon layer is converted into a polysilicon layer. Finally, the patterned metal layer is removed. A polysilicon layer formed according to the above-mentioned fabrication method is also provided. The grains of the poly silicon layer are spherical in shape. | 01-22-2009 |
20090026465 | POLYSILICON FILM HAVING SMOOTH SURFACE AND METHOD OF FORMING THE SAME - A method of forming a polysilicon film having smooth surface using a lateral growth and a step-and-repeat laser process. Amorphous silicon formed in a first irradiation region of a substrate is crystallized to form a first polysilicon region by a first laser shot. Then, the substrate is moved a predetermined distance, and irradiated by a second laser shot. The polysilicon region is then recrystallized and locally planarized by subsequent laser shots. After multiple repetitions of the irradiation procedure, the amorphous silicon film formed on a substrate is completely transformed into a polysilicon film. The polysilicon film includes lateral growth crystal grains and nano-trenches formed in parallel on the surface of the polysilicon film. A longitudinal direction of the nano-trenches is substantially perpendicular to a lateral growth direction of the crystal grains. | 01-29-2009 |
20090085042 | Display device having thin film semiconductor device and manufacturing method of thin film semiconductor device - A display device having a thin film semiconductor device including a semiconductor thin film having first and second semiconductor regions formed each into a predetermined shape above an insulative substrate, a conductor fabricated into a predetermined shape to the semiconductor thin film and a dielectric film put between the semiconductor thin film and the conductor, in which the semiconductor thin film is a polycrystal thin film with the crystallization ratio thereof exceeding 90% and the difference of unevenness on the surface of the semiconductor thin film does not exceed 10 nm. | 04-02-2009 |
20090166642 | Compound semiconductor epitaxial substrate and method for producing the same - There are provided a higher-performance compound semiconductor epitaxial substrate having improved electron mobility characteristics and its production method. The compound semiconductor epitaxial substrate includes a channel layer in which electrons travel and an epitaxial layer on each of a front side and a back side of the channel layer, wherein a total p-type carrier concentration A (/cm | 07-02-2009 |
20090218577 | HIGH THROUGHPUT CRYSTALLIZATION OF THIN FILMS - Under one aspect, a method of processing a film includes defining a plurality of spaced-apart regions to be crystallized within a film, the film being disposed on a substrate and capable of laser-induced melting; generating a sequence of laser pulses having a fluence that is sufficient to melt the film throughout its thickness in an irradiated region, each pulse forming a line beam having a length and a width; continuously scanning the film in a first scan with a sequence of laser pulses at a velocity selected such that each pulse irradiates and melts a first portion of a corresponding spaced-apart region, wherein the first portion upon cooling forms one or more laterally grown crystals; and continuously scanning the film in a second time with a sequence of laser pulses at a velocity selected such that each pulse irradiates and melts a second portion of a corresponding spaced-apart region, wherein the first and second portions in each spaced-apart region partially overlap, and wherein the second portion upon cooling forms one or more laterally grown crystals that are extended relative to the one or more laterally grown crystals of the first portion. | 09-03-2009 |
20090242896 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A microstructure and a semiconductor element which are included in a micromachine have been generally formed in different steps. It is an object to provide a method for manufacturing a micromachine in which a microstructure and a semiconductor element are formed over one insulating substrate. A feature of the invention is a micromachine including a movable layer containing polycrystalline silicon which is thermally crystallized or crystallized by a laser using metal and a space below or above the layer. Such polycrystalline silicon has high strength and is formed on an insulating surface, so that it is used as a microstructure and used for forming a semiconductor element. Accordingly, a semiconductor device in which a microstructure and a semiconductor element are formed over one insulating substrate can be formed. | 10-01-2009 |
20090261344 | RELAXATION OF A STRAINED LAYER USING A MOLTEN LAYER - A method for making a crystalline wafer, in which an interface layer is associated with a support substrate. A first layer is associated with the interface layer in a strained state. The interface layer is melted sufficiently to substantially uncouple the first layer from the support substrate to relax the first layer from the strained to state to a relaxed state. The interface material is solidified with the first layer in the relaxed state to obtain a first wafer. | 10-22-2009 |
20090309104 | SYSTEMS AND METHODS FOR CREATING CRYSTALLOGRAPHIC-ORIENTATION CONTROLLED poly-SILICON FILMS - In accordance with one aspect, the present invention provides a method for providing polycrystalline films having a controlled microstructure as well as a crystallographic texture. The methods provide elongated grains or single-crystal islands of a specified crystallographic orientation. In particular, a method of processing a film on a substrate includes generating a textured film having crystal grains oriented predominantly in one preferred crystallographic orientation; and then generating a microstructure using sequential lateral solidification crystallization that provides a location-controlled growth of the grains orientated in the preferred crystallographic orientation. | 12-17-2009 |
20100001288 | Low Etch Pit Density (EPD) Semi-Insulating GaAs Wafers - A method for manufacturing wafers using a low EPD crystal growth process and a wafer annealing process is provided that results in GaAs/InGaP wafers that provide higher device yields from the wafer. | 01-07-2010 |
20100065853 | PROCESS AND SYSTEM FOR LASER CRYSTALLIZATION PROCESSING OF FILM REGIONS ON A SUBSTRATE TO MINIMIZE EDGE AREAS, AND STRUCTURE OF SUCH FILM REGIONS - A process and system for processing a thin film sample are provided. In particular, a beam generator can be controlled to emit at least one beam pulse. The beam pulse is then masked to produce at least one masked beam pulse, which is used to irradiate at least one portion of the thin film sample. With the at least one masked beam pulse, the portion of the film sample is irradiated with sufficient intensity for such portion to later crystallize. This portion of the film sample is allowed to crystallize so as to be composed of a first area and a second area. Upon the crystallization thereof, the first area includes a first set of grains, and the second area includes a second set of grains whose at least one characteristic is different from at least one characteristic of the second set of grains. The first area surrounds the second area, and is configured to allow an active region of a thin-film transistor (“TFT”) to be provided at a distance therefrom. | 03-18-2010 |
20100084662 | SEMICONDUCTOR STRUCTURE PROCESSING USING MULTIPLE LASER BEAM SPOTS OVERLAPPING LENGTHWISE ON A STRUCTURE - Methods and systems use laser pulses to process a selected structure on or within a semiconductor substrate. The structure has a surface, a width, and a length. The laser pulses propagate along axes that move along a scan beam path relative to the substrate as the laser pulses process the selected structure. The method simultaneously generates on the selected structure first and second laser beam pulses that propagate along respective first and second laser beam axes intersecting the selected structure at distinct first and second locations. The first and second laser beam pulses impinge on the surface of the selected structure respective first and second beam spots. Each beam spot encompasses at least the width of the selected link. The first and second beam spots are spatially offset from one another along the length of the selected structure to define an overlapping region covered by both the first and the second beam spots and a total region covered by one or both of the first and second beam spots. The total region is larger than the first beam spot and also larger than the second beam spot. The method sets respective first and second energy values of the first and second laser beam pulses to cause complete depthwise processing of the selected structure across the width of the structure in at least a portion of the total region. | 04-08-2010 |
20100187539 | COMPOUND SEMICONDUCTOR EPITAXIAL WAFER AND FABRICATION METHOD THEREOF - The present invention provides a compound semiconductor epitaxial wafer and a fabrication method thereof, a first silicon buffer layer is deposited on a metal substrate, and then a second compound semiconductor buffer layer is deposited on the first silicon buffer layer, and a third compound semiconductor buffer layer is deposited on the second compound semiconductor buffer layer, and a first compound semiconductor epitaxial layer is crystallized on the third compound semiconductor buffer layer, and a first thermal treatment process is applied, and a second compound semiconductor epitaxial layer is crystallized on the first compound semiconductor epitaxial layer, and a second thermal treatment process is applied to obtain a good-quality compound semiconductor epitaxial wafer. | 07-29-2010 |
20100213467 | DIRECT BANDGAP SUBSTRATES AND METHODS OF MAKING AND USING - An indirect bandgap thin film semiconductor circuit can be combined with a compound semiconductor LED such as to provide an active matrix LED array that can have high luminous capabilities such as for a light projector application. In another example, a highly efficient optical detector is achievable through the combination of indirect and direct bandgap semiconductors. Applications can include display technologies, light detection, MEMS, chemical sensors, or piezoelectric systems. An LED array can provide structured illumination, such as for a light and pattern source for projection displays, such as without requiring spatial light modulation (SLM). An example can combine light from separate monolithic light projector chips, such as providing different component colors. An example can provide full color from a single monolithic light projector chip, such as including selectively deposited phosphors, such as to contribute individual component colors to an overall color of a pixel. | 08-26-2010 |
20100264423 | Thinned Semiconductor Components Having Lasered Features And Methods For Fabricating Semiconductor Components Using Back Side Laser Processing - A method for fabricating semiconductor components includes the steps of providing a semiconductor substrate having a circuit side, a back side and integrated circuits and circuitry on the circuit side; thinning the substrate from the back side to a selected thickness; laser processing the back side of the thinned substrate to form at least one lasered feature on the back side; and dicing the substrate into a plurality of components having the lasered feature. The lasered feature can cover the entire back side or only selected areas of the back side, and can be configured to change electrical properties, mechanical properties or gettering properties of the substrate. A semiconductor component includes a thinned semiconductor substrate having a back side and a circuit side containing integrated circuits and associated circuitry. The semiconductor component also includes at least one lasered feature on the back side configured to provide selected electrical or physical characteristics for the substrate. | 10-21-2010 |
20100308338 | ARTICLES COMPRISING CRYSTALLINE LAYERS ON LOW TEMPERATURE SUBSTRATES - An article includes a polycrystalline semiconductor layer having a plurality of single crystal crystallites of semiconductor material and a substrate having a melting or softening point of <200° C. supporting the semiconductor layer. An average grain size of the plurality of single crystal crystallites is less at an interface proximate to the substrate as compared to an average grain size in the semiconductor layer remote from the interface. The semiconductor layer is fused exclusive of any bonding agent or intermediate layer to the surface of the substrate. | 12-09-2010 |
20110073869 | METHOD TO REDUCE DISLOCATION DENSITY IN SILICON USING STRESS - A crystalline material structure with reduced dislocation density and method of producing same is provided. The crystalline material structure is annealed at temperatures above the brittle-to-ductile transition temperature of the crystalline material structure. One or more stress elements are formed on the crystalline material structure so as to annihilate dislocations or to move them into less harmful locations. | 03-31-2011 |
20110089429 | SYSTEMS, METHODS AND MATERIALS INVOLVING CRYSTALLIZATION OF SUBSTRATES USING A SEED LAYER, AS WELL AS PRODUCTS PRODUCED BY SUCH PROCESSES - Systems, methods, and products of processes consistent with the innovations herein relate to aspects involving crystallization of layers on substrates. In one exemplary implementation, there is provided a method of fabricating a device. Moreover, such method may include placing a seed layer on a base substrate, covering the seed layer with an amorphous/poly material, and heating the seed layer/material to transform the material into crystalline form. | 04-21-2011 |
20110101368 | FLASH LAMP ANNEALING CRYSTALLIZATION FOR LARGE AREA THIN FILMS - The disclosed subject matter generally relates a method of irradiating a large area thin film with a pulsed light source. In some embodiments, the disclosed subject matter particularly relates to utilizing flash lamp annealing in combination with patterning techniques for making thin film devices. The flash lamp annealing can trigger lateral growth crystallization or explosive crystallization in large area thin films. In some embodiments, capping layers or proximity masks can be used in conjunction with the flash lamp annealing. | 05-05-2011 |
20110133202 | HIGH THROUGHPUT RECRYSTALLIZATION OF SEMICONDUCTING MATERIALS - Methods for making and/or treating articles of semiconducting material are disclosed. In various methods, a first article of semiconducting material is provided, the first article of semiconducting material is heated sufficiently to melt the semiconducting material, and the melted semiconducting material is solidified in a direction substantially parallel to a shortest dimension of the melted article of semiconducting material. Articles of semiconducting materials made by methods described herein are also disclosed. | 06-09-2011 |
20110266550 | METHOD OF FORMING OF A SEMICONDUCTOR FILM, METHOD OF MANUFACTURE OF A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE - This invention provides a method of forming semiconductor films on dielectrics at temperatures below 400° C. Semiconductor films are required for thin film transistors (TFTs), on-chip sensors, on-chip micro-electromechanical systems (MEMS) and monolithic 3D-integrated circuits. For these applications, it is advantageous to form the semiconductor films below 400° C. because higher temperatures are likely to destroy any underlying devices and/or substrates. This invention successfully achieves low temperature growth of germanium films using diboran. First, diboran gas is supplied into a reaction chamber at a temperature below 400° C. The diboran decomposes itself at the given temperature and decomposed boron is attached to the surface of a dielectric, for e.g., SiO | 11-03-2011 |
20110309370 | SYSTEMS AND METHODS FOR THE CRYSTALLIZATION OF THIN FILMS - Crystallization of thin films using pulsed irradiation The method includes continuously irradiating a film having an x-axis and a y-axis, in a first scan in the x-direction of the film with a plurality of line beam laser pulses to form a first set of irradiated regions, translating the film a distance in the y-direction of the film, wherein the distance is less than the length of the line beam, and continuously irradiating the film in a second scan in the negative x-direction of the film with a sequence of line beam laser pulses to form a second set of irradiated regions, wherein each of the second set of irradiated regions overlaps with a portion of the first set of irradiated regions, and wherein each of the first and the second set of irradiated regions upon cooling forms one or more crystallized regions. | 12-22-2011 |
20110315995 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - Disclosed is a semiconductor device which includes a substrate | 12-29-2011 |
20120001192 | BIPOLAR TRANSISTOR HAVING SELF-ADJUSTED EMITTER CONTACT - A semiconductor device, comprising a substrate layer made of a semiconductor material of a first conductivity type and having a first insulation region, and a vertical bipolar transistor having a first vertical portion of a collector made of monocrystalline semiconductor material of a second conductivity type and disposed in an opening of the first insulation region, a second insulation region lying partly on the first vertical portion of the collector and partly on the first insulation region and having an opening in the region of the collector, in which opening a second vertical portion of the collector made of monocrystalline material is disposed, said portion including an inner region of the second conductivity type, a base made of monocrystalline semiconductor material of the first conductivity type, a base connection region surrounding the base in the lateral direction, a T-shaped emitter made of semiconductor material of the second conductivity type and overlapping the base connection region, wherein the base connection region, aside from a seeding layer adjacent the substrate or a metallization layer adjacent a base contact, consists of a semiconductor material which differs in its chemical composition from the semiconductor material of the collector, the base and the emitter and in which the majority charge carriers of the first conductivity type have greater mobility compared thereto. | 01-05-2012 |
20120018732 | INSIDE REFORMING SUBSTRATE FOR EPITAXIAL GROWTH; CRYSTAL FILM FORMING ELEMENT, DEVICE, AND BULK SUBSTRATE PRODUCED USING THE SAME; AND METHOD FOR PRODUCING THE SAME - Sapphire substrates are used chiefly for epitaxial growth of nitride semiconductor layers, to provide a sapphire substrate of which the shape and/or amount of warping can be controlled efficiently and precisely and of which substrate warping that occurs during layer formation can be suppressed and substrate warping behavior can be minimized, to provide nitride semiconductor layer growth bodies, nitride semiconductor devices, and nitride semiconductor bulk substrates using such substrates, and to provide a method of manufacturing these products. Reformed domain patterns are formed within a sapphire substrate and the warp shape and/or amount of warping of the sapphire substrate are controlled by means of multiphoton absorption by condensing and scanning a pulsed laser through a polished surface of the sapphire substrate. When nitride semiconductor layers are formed using sapphire substrates obtained by means of this invention, substrate warping during layer formation is suppressed and substrate warping behavior is minimized so that layer quality and uniformity are improved and the quality and yield of nitride semiconductor devices is increased. | 01-26-2012 |
20120018733 | Thin Film Solar Cells And Other Devices, Systems And Methods Of Fabricating Same, And Products Produced By Processes Thereof - Systems, methods, devices, and products of processes consistent with the innovations herein relate to thin-film solar cells and other devices. In one exemplary implementation, there is provided a thin film device. | 01-26-2012 |
20120025199 | Image Sensor with Deep Trench Isolation Structure - Provided is a back side illuminated image sensor device. The image sensor device includes a substrate having a front side and a back side opposite the front side. The image sensor also includes a radiation-detection device that is formed in the substrate. The radiation-detection device is operable to detect a radiation wave that enters the substrate through the back side. The image sensor further includes a deep trench isolation feature that is disposed adjacent to the radiation-detection device. The image sensor device further includes a doped layer that at least partially surrounds the deep trench isolation feature in a conformal manner. | 02-02-2012 |
20120025200 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - In one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include depositing a first amorphous film having a first impurity, depositing a third amorphous lower-layer film on the first amorphous film, forming microcrystals on the third amorphous lower-layer film, depositing a third amorphous upper-layer film on the third amorphous lower-layer film to cover the microcrystals, depositing a second amorphous film having a second impurity on the third amorphous upper-layer film, and radiating microwaves to crystallize the third amorphous lower-layer film and the third amorphous upper-layer film to form a third crystal layer, and crystallize the first amorphous film and the second amorphous film to form a first crystal layer and a second crystal layer. | 02-02-2012 |
20120061679 | Silicon Polymers, Methods of Polymerizing Silicon Compounds, and Methods of Forming Thin Films From Such Silicon Polymers - Compositions and methods for controlled polymerization and/or oligomerization of hydrosilanes compounds including those of the general formulae Si | 03-15-2012 |
20120248455 | PROCESS FOR MANUFACTURING A CRYSTALLINE SILICON LAYER - A method of forming a crystalline silicon layer on a substrate is disclosed. In one aspect, the method includes performing a metal induced crystallization process. The process includes depositing a metal (e.g. aluminum) on the substrate at a first temperature, the metal having an external surface. The method may also include oxidizing the external surface of the metal at a second temperature, and depositing amorphous silicon on the oxidized external surface of the metal at a third temperature. The method may also include annealing the metal and the silicon at a fourth temperature, whereby a crystalline silicon layer is obtained on the substrate covered by an external layer comprising the metal, and removing the external layer comprising the metal thereby exposing the crystalline silicon layer, wherein at least the first temperature and the fourth temperature (crystallization temperature) are not lower than 200° C. | 10-04-2012 |
20120273792 | Zone Melt Recrystallization of Thin Films - A solar cell comprises a recrystallized layer wherein the recrystallized layer has at least one crystal grain at least 90% of the size of the illuminated area of the solar cell. | 11-01-2012 |
20130075746 | Lateral PNP Bipolar Transistor with Narrow Trench Emitter - A lateral bipolar transistor includes trench emitter and trench collector regions to form ultra-narrow emitter regions, thereby improving emitter efficiency. The same trench process is used to form the emitter/collector trenches as well as the trench isolation structures so that no additional processing steps are needed to form the trench emitter and collector. In embodiments of the present invention, the trench emitter and trench collector regions may be formed using ion implantation into trenches formed in a semiconductor layer. In other embodiments, the trench emitter and trench collector regions may be formed by out-diffusion of dopants from heavily doped polysilicon filled trenches. | 03-28-2013 |
20130075747 | ESD PROTECTION USING LOW LEAKAGE ZENER DIODES FORMED WITH MICROWAVE RADIATION - Semiconductor devices and methods for making such devices are described. These devices contain a semiconductor substrate with a first portion containing an integrated circuit device connected to a gate pad in an upper portion of the substrate and a second portion containing a Zener diode having a ESD rating up to about 10000 Volts, where the Zener diode is located around the periphery of the substrate. MW radiation can be used to form a single crystal Si material in a trench of the Zener diode | 03-28-2013 |
20130146884 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - In one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include depositing a first amorphous film having a first impurity, depositing a third amorphous lower-layer film on the first amorphous film, forming microcrystals on the third amorphous lower-layer film, depositing a third amorphous upper-layer film on the third amorphous lower-layer film to cover the microcrystals, depositing a second amorphous film having a second impurity on the third amorphous upper-layer film, and radiating microwaves to crystallize the third amorphous lower-layer film and the third amorphous upper-layer film to form a third crystal layer, and crystallize the first amorphous film and the second amorphous film to form a first crystal layer and a second crystal layer. | 06-13-2013 |
20130200386 | CRYSTALLIZATION OF MULTI-LAYERED AMORPHOUS FILMS - In one aspect, crystallization of multiple layers of amorphous materials is disclosed. In one embodiment, multiple layers of amorphous materials such as amorphous silicon, silicon carbide, and/or germanium are deposited using deposition methods such as PECVD or sputtering. A layer of metal such as aluminum is deposited on the surface of the deposited amorphous materials using sputtering or evaporation, and the structure is annealed in a hydrogen environment. The structure is contained on a semiconductor substrate, glass, a flexible metal/organic film, or other type of substrate. | 08-08-2013 |
20130240892 | METHOD FOR CONVERTING SEMICONDUCTOR LAYERS - The present invention relates to a process for conversion of semiconductor layers, especially for conversion of amorphous to crystalline silicon layers, in which the conversion is effected by treating the semiconductor layer with a plasma which is generated by a plasma source equipped with a plasma nozzle ( | 09-19-2013 |
20140138696 | POLYCRYSTALLINE SILICON THICK FILMS FOR PHOTOVOLTAIC DEVICES OR THE LIKE, AND METHODS OF MAKING SAME - A method of manufacturing a polycrystalline silicon film includes: depositing a catalyst layer including nickel and depositing nickel nanoparticles on a substrate; exposing the catalyst layer and the nanoparticles to at least silane gas; and heat treating the substrate coated with the catalyst layer and the nanoparticles during at least part of the exposing to silane gas in growing a silicon based film on the substrate. | 05-22-2014 |
20140159047 | MANUFACTURING PROCESS OF OXIDE INSULATING LAYER AND FLEXIBLE STRUCTURE OF LTPS-TFT (LOW-TEMPERATURE POLYCRYSTALLINE SILICON THIN FILM TRANSISTOR) DISPLAY - The present invention provides a manufacturing process of oxide insulating layer and flexible structure of LTPS-TFT display. The manufacturing process firstly provides a substrate, which is a soft material sheet; and then an a-Si layer is formed on the substrate, and oxygen ion implantation process of a certain depth is conducted onto the a-Si layer; finally, ELA process is conducted to transform a-Si layer into a Poly-Si layer and an oxide insulating layer; of which the oxide insulating layer is a silica insulating layer and located within the Poly-Si layer for subsequently producing LTPS-TFT; the structure comprises of a substrate, Poly-Si layer and oxide insulating layer within the Poly-Si layer. | 06-12-2014 |
20150076504 | ADVANCED EXCIMER LASER ANNEALING FOR THIN FILMS - The present disclosure relates to a new generation of laser-crystallization approaches that can crystallize Si films for large displays at drastically increased effective crystallization rates. The particular scheme presented in this aspect of the disclosure is referred to as the advanced excimer-laser annealing (AELA) method, and it can be readily configured for manufacturing large OLED TVs using various available and proven technical components. As in ELA, it is mostly a partial-/near-complete-melting-regime-based crystallization approach that can, however, eventually achieve greater than one order of magnitude increase in the effective rate of crystallization than that of the conventional ELA technique utilizing the same laser source. | 03-19-2015 |
20150108490 | Polycrystalline Silicon Wafer - A polycrystalline silicon wafer produced based on a melting method and having an outer diameter of 450 mm or more, wherein a depth of scratches on the polycrystalline silicon wafer is 10 μm or less. A polycrystalline silicon wafer produced based on a melting method and having an outer diameter of 450 mm or more, wherein a maximum number of scratches having a width of 40 μm or more and 100 μm or less and a depth of more than 10 μm and 40 μm or less formed on the polycrystalline silicon wafer is one or less per section when the overall polycrystalline silicon wafer is divided into 100 mm-square sections, and a depth of remaining scratches is 10 μm or less. Provided is a large polycrystalline silicon wafer, particularly a silicon wafer having a wafer size in which the outer diameter is 450 mm or more, in which a small number of scratches are generated on the wafer surface and which has mechanical properties similar to those of a monocrystalline silicon wafer. | 04-23-2015 |
20150137133 | FORMING OF A HEAVILY-DOPED SILICON LAYER ON A MORE LIGHTLY-DOPED SILICON SUBSTRATE - A method of forming a heavily-doped silicon layer on a more lightly-doped silicon substrate including the steps of depositing a heavily-doped amorphous silicon layer; depositing a silicon nitride layer; and heating the amorphous silicon layer to a temperature higher than or equal to the melting temperature of silicon. | 05-21-2015 |