20140089899 | METHOD FOR THE COMPUTER-ASSISTED ANALYSIS OF BUGGY SOURCE CODE IN A HARDWARE DESCRIPTION LANGUAGE - The invention relates to a method for the computer-assisted analysis of buggy source code in a hardware description language describing the structure and the operation of an integrated circuit. A correction model is provided, which includes a hierarchical structure of nodes arranged in a plurality of hierarchical levels, the nodes being transformation instructions, wherein a transformation instruction describes a group of transformations which are applied to at least one type of a source code section and thereby change the source code section and wherein a transformation instruction, which is a child node of another transformation instruction, constitutes a subset of the group of transformations of the other transformation instruction. Those transformation instructions, which change the source code in such a manner that the changed source code leads to a correct output of the integrated circuit, are determined and output together with the associated source code sections as corrections. | 03-27-2014 |