SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC Patent applications |
Patent application number | Title | Published |
20160141317 | PIXEL ISOLATION REGIONS FORMED WITH DOPED EPITAXIAL LAYER - An image sensor may include isolation regions that are formed in between photodiodes. These isolation regions may prevent cross-talk and improve the performance of the image sensor. The isolation regions may be made of epitaxial silicon. The epitaxial silicon may be grown in trenches formed in a substrate using an etching process. Portions of the substrate may be protected from the etching process with a hard mask layer. Photodiodes may later be implanted in these protected portions of the substrate after the isolation regions have been formed. The epitaxial silicon may be boron-doped or antimony-doped epitaxial silicon with a concentration of boron or antimony between 10 | 05-19-2016 |
20160135293 | SUBSTRATE STRUCTURES AND METHODS OF MANUFACTURE - A power electronic substrate includes a metallic baseplate having a first and second surface opposing each other. An electrically insulative layer also has first and second surfaces opposing each other, its first surface coupled to the second surface of the metallic baseplate. A plurality of metallic traces each include first and second surfaces opposing each other, their first surfaces coupled to the second surface of the electrically insulative layer. At least one of the metallic traces has a thickness measured along a direction perpendicular to the second surface of the metallic baseplate that is greater than a thickness of another one of the metallic traces also measured along a direction perpendicular to the second surface of the metallic baseplate. In implementations the electrically insulative layer is an epoxy or a ceramic material. In implementations the metallic traces are copper and are plated with a nickel layer at their second surfaces. | 05-12-2016 |
20160133533 | SUBSTRATE STRUCTURES AND METHODS OF MANUFACTURE - A semiconductor package. Implementations may include a substrate including a metallic baseplate coupled with an electrically insulative layer and a plurality of metallic traces coupled to the electrically insulative layer on a surface of the electrically insulative layer opposing a surface of the electrically insulative layer coupled to the metallic baseplate. The plurality of metallic traces may include at least two different trace thicknesses, where the trace thicknesses are measured perpendicularly to the surface of the electrically insulative layer coupled with the metallic baseplate. The package may include at least one semiconductor device coupled to the substrate, a mold compound that encapsulates the power electronic device and at least a portion of the substrate, and at least one package electrical connector coupled with the substrate. | 05-12-2016 |
20160126348 | INSULATED GATE SEMICONDUCTOR DEVICE HAVING A SHIELD ELECTRODE STRUCTURE AND METHOD - A semiconductor device includes a semiconductor region with a charge balance region on a junction blocking region, which has a lower doping concentration. A trench structure having an insulated shield electrode and an insulated gate electrode is provided in the semiconductor region. The semiconductor device further includes one or more features configured to improve operating performance. The features include terminating the trench structure in the junction blocking region, providing a localized doped region adjoining a lower surface of a body region and spaced apart from the trench structure, disposing a notch proximate to the lower surface of the body region, and/or configuring the insulated shield electrode to have a wide portion adjoining a narrow portion. | 05-05-2016 |
20160126312 | SEMICONDUCTOR STRUCTURE INCLUDING A DOPED BUFFER LAYER AND A CHANNEL LAYER AND A PROCESS OF FORMING THE SAME - A semiconductor structure can include a substrate, a high-voltage blocking layer overlying the substrate, a doped buffer layer overlying the high-voltage layer, and a channel layer overlying the doped buffer layer, wherein the doped buffer layer and the channel layer include a same compound semiconductor material, and the doped buffer layer has a carrier impurity type at a first carrier impurity concentration, the channel buffer layer has the carrier impurity type at a second carrier impurity concentration that is less than the first carrier impurity concentration. In an embodiment, the channel layer has a thickness of at least 650 nm. In another embodiment, the high-voltage blocking includes a proximal region that is 1000 nm thick and adjacent to the doped buffer layer, and each of the proximal region, the doped buffer layer, and the channel layer has an Fe impurity concentration less than 5×10 | 05-05-2016 |
20160126267 | IMAGING SYSTEMS WITH BACKSIDE ISOLATION TRENCHES - An image sensor such as a backside illumination image sensor may be provided with analog circuitry, digital circuitry, and an image pixel array on a semiconductor substrate. Trench isolation structures may separate the analog circuitry from the digital circuitry on the substrate. The trench isolation structures may be formed from dielectric-filled trenches in the substrate that isolate the portion of the substrate having the analog circuitry from the portion of the substrate having the digital circuitry. The trench isolation structures may prevent digital circuit operations such as switching operations from negatively affecting the performance of the analog circuitry. Additional trench isolation structures may be interposed between portions of the substrate on which bond pads are formed and other portions of the substrate to prevent capacitive coupling between the bond pad structures and the substrate, thereby enhancing the high frequency operations of the image sensor. | 05-05-2016 |
20160126236 | METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR - In one embodiment, a semiconductor device may include a first transistor having a first current carrying electrode, a second current carrying electrode, and a control electrode; a first bipolar transistor having a collector coupled to the first current carrying electrode of the first transistor, a base coupled to the second current carrying electrode of the first transistor, and an emitter of the first bipolar transistor coupled to a first node of the semiconductor device. In an embodiment, the first node is connected to a terminal of a semiconductor package. An embodiment may include a semiconductor component coupled between the base of the first bipolar transistor and the emitter of the second bipolar transistor. | 05-05-2016 |
20160118785 | ELECTRICAL SAFETY DEVICE MISWIRE DETECTION - Aspects of an electrical safety device that provides detection of miswiring of line and load connection pairs are presented. In an example, the device includes a differential current detector through which are routed a live current path and a neutral current path coupling the line and load connection pairs. The device also includes a selectable conducting path that, when selected, circumvents the differential current detector while coupling one of a line live connection to a load live connection or a line neutral connection to a load neutral connection of the connection pairs. The device further includes a control circuit that determines, via the differential current detector, while the conducting path is selected, a differential current defined by a difference in currents on the live and neutral current paths, and interrupts at least one of the live and neutral current paths in response to the differential current not exceeding a threshold value. | 04-28-2016 |
20160118490 | HETEROJUNCTION SEMICONDUCTOR DEVICE HAVING INTEGRATED CLAMPING DEVICE - In one embodiment, a group III-V transistor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are disposed adjacent a major surface of the heterostructure and a control electrode is disposed between the first and second current carrying electrode. A clamping device is integrated with the group III-V transistor structure and is electrically connected to the first current carrying electrode a third electrode to provide a secondary current path during, for example, an electrical stress event. | 04-28-2016 |
20160118379 | CASCODE SEMICONDUCTOR DEVICE STRUCTURE AND METHOD THEREFOR - In one embodiment, a cascode rectifier structure includes a group III-V semiconductor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are disposed adjacent a major surface of the heterostructure and a control electrode is disposed between the first and second current carrying electrode. A rectifier device is integrated with the group III-V semiconductor structure and is electrically connected to the first current carrying electrode and to a third electrode. The control electrode is further electrically connected to the semiconductor substrate and the second current path is generally perpendicular to a primary current path between the first and second current carrying electrodes. | 04-28-2016 |
20160118377 | METHOD OF FORMING A HIGH ELECTRON MOBILITY SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR - In one embodiment, a method of forming a semiconductor device can comprise; forming a HEM device on a semiconductor substrate. The semiconductor substrate provides a current carrying electrode for the semiconductor device and one or more internal conductor structures provide a vertical current path between the semiconductor substrate and regions of the HEM device. | 04-28-2016 |
20160111581 | PACKAGED SEMICONDUCTOR DEVICES AND RELATED METHODS - A packaged semiconductor device includes a substrate, a die, at least one electrical connector, a first mold compound formed of translucent material, and a second mold compound. A first face of the die is electrically and mechanically coupled to the substrate. The at least one electrical connector electrically couples at least one electrical contact on a second face of the die with at least one conductive path of the substrate. The first mold compound formed of a translucent material at least partially encapsulates the die and the at least one electrical connector. The second mold compound at least partially encapsulates the first mold compound and forms a window through which the first mold compound is exposed. In implementations the second mold compound is opaque and the first mold compound is transparent. In implementations the substrate includes a lead frame having a die flag and a plurality of lead frame fingers. | 04-21-2016 |
20160111463 | CIRCUITRY FOR BIASING LIGHT SHIELDING STRUCTURES AND DEEP TRENCH ISOLATION STRUCTURES - An imaging system may include an image sensor die stacked on top of a digital signal processor (DSP) die. Through-oxide vias (TOVs) may be formed in the image sensor die and may extend at least partially into in the DSP die to facilitate communications between the image sensor die and the DSP die. The image sensor die may include light shielding structures for preventing reference photodiodes in the image sensor die from receiving light and in-pixel grid structures for preventing cross-talk between adjacent pixels. The light shielding structure may receive a desired biasing voltage through a corresponding TOV, an integral plug structure, and/or a connection that makes contact directly with a polysilicon gate. The in-pixel grid may have a peripheral contact that receives the desired biasing voltage through a light shield, a conductive strap, a TOV, and/or an aluminum pad. | 04-21-2016 |
20160104796 | METHOD OF FORMING A SEMICONDUCTOR DEVICE - In one embodiment, a method of forming a semiconductor device may include forming a buried region within a semiconductor region, including forming an opening in the buried region. The method may also include forming a drift region of a second conductivity type in the semiconductor region with at least a portion of the drift region overlying a first portion of the buried region. Another portion of the method may include forming a first drain region of the second conductivity type in the drift region wherein the first drain region does not overlie the buried region. | 04-14-2016 |
20160104662 | METHOD AND SYSTEM FOR EXTENDING DIE SIZE AND PACKAGED SEMICONDUCTOR DEVICES INCORPORATING THE SAME - A packaged semiconductor device includes a die flag and a plurality of lead frame fingers each having a proximate end spaced apart from the die flag. A first surface of a spacer mechanically and electrically couples to a first surface of the die flag, and a first surface of a die mechanically and electrically couples to a second surface of the spacer. At least one electrical connector electrically couples an electrical contact on a second surface of the die with a lead frame finger. A molding compound encapsulates the die, spacer, at least a portion of the at least one electrical connector, at least a portion of the die flag, and at least a portion of each lead frame finger. A width of the spacer along the second surface of the spacer is greater than a width of the die flag along the first surface of the die flag. | 04-14-2016 |
20160099319 | SEMICONDUCTOR WAFER INCLUDING A MONOCRYSTALLINE SEMICONDUCTOR LAYER SPACED APART FROM A POLY TEMPLATE LAYER - A semiconductor wafer can include a substrate, a poly template layer, and a semiconductor layer. The substrate has a central region and an edge region, the poly template layer is disposed along a peripheral edge of the substrate, and a semiconductor layer over the central region, wherein the semiconductor layer is monocrystalline. In an embodiment, the poly template layer and the monocrystalline layer are laterally spaced apart from each other by an intermediate region. In another embodiment, the semiconductor layer can include aluminum. A process of forming the substrate can include forming a patterned poly template layer within the edge region and forming a semiconductor layer over the primary surface. Another process of forming the substrate can include forming a semiconductor layer over the primary surface and removing a portion of the semiconductor layer so that the semiconductor layer is spaced apart from an edge of the substrate. | 04-07-2016 |
20160099314 | METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR - In one embodiment, a method of forming an MOS transistor includes forming a threshold voltage (Vth) of the MOS transistor to have a first value at interior portions of the MOS transistor and a second value at other locations within the MOS transistor that are distal from the interior portion wherein the second value is less than the first value. | 04-07-2016 |
20160099273 | IMAGERS WITH DEPTH SENSING CAPABILITIES - An imager may include depth sensing pixels that provide an asymmetrical angular response to incident light. The depth sensing pixels may each include a substrate region formed from a photosensitive portion and a non-photosensitive portion. The depth sensing pixels may include mechanisms that prevent regions of the substrate from receiving incident light. Depth sensing pixel pairs may be formed from depth sensing pixels that have different asymmetrical angular responses. Each of the depth sensing pixel pairs may effectively divide the corresponding imaging lens into separate portions. Depth information for each depth sensing pixel pair may be determined based on the difference between output signals of the depth sensing pixels of that depth sensing pixel pair. The imager may be formed from various combinations of depth sensing pixel pairs and color sensing pixel pairs arranged in a Bayer pattern or other desired patterns. | 04-07-2016 |
20160087033 | SEMICONDUCTOR DEVICE HAVING LOCALIZED CHARGE BALANCE STRUCTURE AND METHOD - In one embodiment, a semiconductor device has a superjunction structure formed adjoining a low-doped n-type region. A low-doped p-type region is formed adjoining the superjunction structure above the low-doped n-type region and is configured to improve Eas characteristics. A body region is formed adjacent the low-doped p-type region and a control electrode structure is formed adjacent the body region for controlling a channel region within the body region. | 03-24-2016 |
20160079226 | ELECTRONIC DEVICE INCLUDING A DIODE - An electronic device can include a substrate, lower and upper semiconductor layers over the substrate, and a doped region at the interface between the lower and upper semiconductor layers. The doped region can have a conductivity type opposite that of a dopant within the lower semiconductor layer. Within the lower semiconductor layer, the dopant can have a dopant concentration profile that has a relatively steeper portion adjacent to the substrate, another relatively steeper portion adjacent to an interface between the first and second semiconductor layers, and a relatively flatter portion between the relative steeper portions. A diode lies at a pn junction where a second dopant concentration profile of the first doped region intersects the relatively flatter portion of the first dopant concentration profile. The electronic device can be formed using different processes described herein. | 03-17-2016 |
20160065821 | IMAGING SYSTEMS AND METHODS FOR CAPTURING IMAGE DATA AT HIGH SCAN RATES - An imaging system may include a rolling shutter image sensor, data rate reduction circuitry, and image processing circuitry. The image sensor may output image data to the data rate reduction circuitry at a first high speed data rate. The data rate reduction circuitry may store the image data at the first data rate and may output the stored image data at a second reduced speed data rate. The image processing circuitry may receive the image data at the second data rate and may perform image processing operations at the second data rate. The data rate reduction circuitry may generate accumulated image frames by accumulating image frames received from the image sensor at the first data rate and may provide the accumulated frames to the image processing circuitry at the second data rate. The image processing circuitry may perform image processing operations on the accumulated frames at the second data rate. | 03-03-2016 |
20160064325 | SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR - In one embodiment, a method of forming a HEMT device may include plating a conductor or a plurality of conductors onto an insulator that overlies a plurality of current carrying electrodes of the HEMT device. The method may also include attaching a connector onto the conductor or attaching a plurality of connectors onto the plurality of conductors. | 03-03-2016 |
20160057840 | LIGHT-EMITTING ELEMENT DRIVING CIRCUIT SYSTEM - A light-emitting element driving circuit system is provided in which a plurality of current paths, in each of which a light-emitting element and a switching element which is controlled to be switched ON and OFF for causing light to be emitted from the light-emitting element are connected in series, are placed in parallel to each other, wherein an ON time of each switching element is adjusted based on a light-emission period which is a period in which the light-emitting elements are caused to emit light in a circulating manner, such that a number of switching operations of each switching element is reduced. | 02-25-2016 |
20160056742 | MOTOR DRIVE CIRCUIT AND ILLUMINATION APPARATUS AND METHOD - A motor-drive circuit includes: an output transistor configured to supply a drive current to a motor for a cooling fan; a switching-control circuit configured to control switching of the output transistor so that the motor rotates in a first direction, or rotates in a second direction opposite to the first direction; and a switching circuit configured to, when a first time has elapsed since start of rotation of the motor in the first direction, cause the switching-control circuit to start switching control so that the motor stops rotating in the first direction and thereafter rotates in the second direction, and configured to, when a second time has elapsed since start of rotation of the motor in the second direction, cause the switching-control circuit to start switching control so that the motor stops rotating in the second direction and thereafter rotates in the first direction. | 02-25-2016 |
20160056735 | DRIVE CONTROL CIRCUIT FOR LINEAR VIBRATION MOTOR AND METHOD - A drive signal generating unit generates a drive signal used to alternately deliver a positive current and a negative current to a coil. A driver unit generates the drive current in response to the drive signal generated by the drive signal generating unit and supplies the drive current to the coil. After the drive termination of a linear vibration motor, the drive signal generating unit generates a drive signal whose phase is opposite to the phase of the drive signal generated during the motor running. The driver unit quickens the stop of the linear vibration motor by supplying to the coil the drive current of opposite phase according to the drive signal of opposite phase. | 02-25-2016 |
20160055853 | Method for processing sound data and circuit therefor - A sound data processing apparatus includes a central processing unit for controlling predetermined processing in the apparatus, a rewritable RAM, a decoder performing the decoding processing for sound data, and an interface unit for being fitted with an external memory. The sound data processing apparatus reads a driver from the external memory mounted in the interface unit and stores the read driver into the RAM, and reads the sound data from the external memory with the driver and processes the read sound data. As a result, the wastefully using of the memory capacity of the memory mounted in the sound data processing apparatus is reduced. | 02-25-2016 |
20160043181 | ELECTRONIC DEVICE INCLUDING A CHANNEL LAYER INCLUDING A COMPOUND SEMICONDUCTOR MATERIAL - An electronic device can transistor having a channel layer that includes a compound semiconductor material. In an embodiment, the channel layer overlies a semiconductor layer that includes a carrier barrier region and a carrier accumulation region. The charge barrier region can help to reduce the likelihood that de-trapped carriers from the channel layer will enter the charge barrier region, and the charge accumulation region can help to repel carriers in the channel layer away from the charge barrier layer. In another embodiment, a barrier layer overlies the channel layer. Embodiments described herein may help to produce lower dynamic on-resistance, lower leakage current, another beneficial effect, or any combination thereof. | 02-11-2016 |
20160037020 | DETECTING TRANSIENT SIGNALS USING STACKED-CHIP IMAGING SYSTEMS - Imaging systems may be provided with stacked-chip image sensors. A stacked-chip image sensor may include a vertical chip stack that includes an array of image pixels, control circuitry and storage and processing circuitry. The image pixel array may be coupled to the control circuitry using vertical metal interconnects. The control circuitry may provide digital image data to the storage and processing circuitry over additional vertical conductive. The stacked-chip image sensor may be configured to capture image frames at a capture frame rate and to output processed image frames at an output frame rate that is lower that the capture frame rate. The storage and processing circuitry may be configured to process image frames concurrently with image capture operations. Processing image frames concurrently with image capture operations may include adjusting the positions of moving objects and by adjusting the pixel brightness values of regions of image frames that have changing brightness. | 02-04-2016 |
20160035599 | METHOD OF FORMING A SEMICONDUCTOR DIE CUTTING TOOL - In one embodiment, a method of singulating semiconductor die from a semiconductor wafer includes forming a material on a surface of a semiconductor wafer and reducing a thickness of portions of the material. Preferably, the thickness of the material is reduced near where singulation openings are to be formed in the semiconductor wafer. | 02-04-2016 |
20160033988 | POWER CONVERTER USING CHARGE PUMP DIVIDER AND METHOD THEREFOR - A power converter uses a charge pump divider that includes a capacitive divider core and a phase clock generator. The capacitive divider core has an input for receiving an input voltage and an output for providing an output voltage. In a first phase the capacitive divider core is adapted to couple a flying capacitor in series with an output capacitor. In a second phase the capacitive divider core is adapted to couple the flying capacitor in parallel with the output capacitor. The phase clock generator activates a first phase clock indicating the first phase when a flying voltage across the flying capacitor is less than a predetermined portion of the input voltage minus a peak voltage, and subsequently activates a second phase clock indicating the second phase when the flying voltage exceeds the predetermined portion of the input voltage plus the peak voltage. | 02-04-2016 |
20160033584 | METHOD OF FORMING A SEQUENCING SYSTEM AND STRUCTURE THEREFOR - In one embodiment, a sequencing system includes a plurality of integrated circuits connected in a daisy chain arrangement, where each integrated circuit has an LED load connection. The system includes a diagnostic circuit which signals to the control unit that an open circuit condition has been detected, thereby turning off all LED loads. | 02-04-2016 |
20160021345 | IMAGING SYSTEMS WITH CLEAR FILTER PIXELS - An image sensor may have an array of image sensor pixels arranged in color filter unit cells each having one red image pixel that generates red image signals, one blue image pixel that generate blue image signals, and two clear image sensor pixels that generate white image signals. The image sensor may be coupled to processing circuitry that performs filtering operations on the red, blue, and white image signals to increase noise correlations in the image signals that reduce noise amplification when applying a color correction matrix to the image signals. The processing circuitry may extract a green image signal from the white image signal. The processing circuitry may compute a scaling value that includes a linear combination of the red, blue, white and green image signals. The scaling value may be applied to the red, blue, and green image signals to produce corrected image signals having improved image quality. | 01-21-2016 |
20160020697 | DRIVE CIRCUIT AND METHOD - In accordance with an embodiment, a transformer-less drive circuit is provided that includes a switch control network having an output terminal connected to a first switch and another output terminal connected to a second switch. A driver connected to the second switch. In accordance with another embodiment, a method for generating a drive signal is provided that includes charging a first energy storage element to a first voltage level and a second energy storage element to a second voltage level. The charge stored in the second energy storage element is increased so that the second energy storage element stores a voltage at a third voltage level. The terminals of the second energy storage element are alternately connected to a fourth voltage level. The second energy storage element is used to supply or drive a driver. | 01-21-2016 |
20160005655 | METHOD OF FORMING A SEMICONDUCTOR DIE - In one embodiment, semiconductor die having non-rectangular shapes and die having various different shapes are formed and singulated from a semiconductor wafer. | 01-07-2016 |
20150381164 | METHOD FOR OPERATING A BACKUP CIRCUIT AND CIRCUIT THEREFOR - In some embodiments, a reset circuit for an electronic circuit equipped with a backup power capacitor includes a first detector arranged to detect a predetermined first voltage of the backup capacitor, a second detector arranged to detect a predetermined second voltage of the backup capacitor, the second voltage being lower than the first voltage, and a controller arranged to control an output of a reset request signal based on detection results of the first detector and the second detector. The controller is configured to output the reset request signal when the first detector detects the first voltage after the second detector detected the second detector. | 12-31-2015 |
20150381037 | POWER CONVERTER USING HYSTERETIC BOOST ARCHITECTURE AND METHOD THEREFOR - In one form, a control circuit is adapted for use with a power converter having an inductor and a switch switching the inductor in response to a switching signal to regulate an output voltage of the power converter. The control circuit includes a slow feedback path, a fast feedback path, an integrator, a comparator, and a drive circuit. The slow feedback path provides a ripple signal in response to an average value of the output voltage. The fast feedback path provides a feedback signal in response to the output voltage. The integrator provides an error signal in response to a sum of the feedback signal and the ripple signal. The comparator provides a comparison output signal in response to a comparison of the error signal and a threshold voltage. The driver circuit provides the switching signal in response to the comparison output signal. | 12-31-2015 |
20150380344 | RESIN SEALING TYPE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME, AND LEAD FRAME - The invention is directed to firm bonding between semiconductor dies etc bonded to a lead frame and wire-bonding portions of the lead frame by ultrasonic Al wire bonding, and the prevention of shortcircuit between the semiconductor dies etc due to a remaining portion of the outer frame of the lead frame after the outer frame is cut. By extending the wire-bonding portion etc on the lead frame in a wire-bonding direction and connecting the wire-bonding portion etc to the outer frame of the lead frame through a connection lead etc, the ultrasonic vibration force in the ultrasonic Al wire bonding is prevented from dispersing and the Al wire and the wire-bonding portion etc are firmly bonded. The outer frame is cut after a resin sealing process is completed. Even when a portion of the outer frame remains on the side surface of the resin package, connection between the connection lead etc and other hanging lead etc are prevented by providing a notch etc in the outer frame between the connection lead etc and the hanging lead etc. | 12-31-2015 |
20150364847 | FLEXIBLE PRESS FIT PINS FOR SEMICONDUCTOR PACKAGES AND RELATED METHODS - A pin for a semiconductor package includes an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver. A lower portion of the pin is configured to flex to allow an upper portion of the pin to move towards an upper contact surface of a horizontal base of the pin in response to a pressure applied along a direction collinear with a longest length of the pin towards the upper contact surface of the horizontal base when the pin is inserted into a pin receiver. Some implementations of pins include a vertical stop to stop movement of the pin when a surface of the vertical stop contacts the upper contact surface of the horizontal base. Varying implementations of pins include: two curved legs and one vertical stop; two partially curved legs and no vertical stop, and; a single leg bent into an N-shape. | 12-17-2015 |
20150357241 | METHOD OF REDUCING RESIDUAL CONTAMINATION IN SINGULATED SEMICONDUCTOR DIE - In one embodiment, semiconductor die are singulated from a semiconductor wafer by placing the semiconductor wafer onto a carrier tape, forming singulation lines through the semiconductor wafer, and reducing the presence of residual contaminates on the semiconductor wafer. | 12-10-2015 |
20150340482 | HIGH ELECTRON MOBILITY SEMICONDUCTOR DEVICE AND METHOD THEREFOR - In one embodiment, Group III-nitride materials are used to form a semiconductor device. A fin structure is formed in the Group III-nitride material, and a gate structure, source electrodes and drain electrodes are formed in spaced relationship to the fin structure. The fin structure provides both polar and semi-polar 2DEG regions. In one embodiment, the gate structure is configured to control current flow in the polar 2DEG region. Shield conductor layers are included above the gate structure and in spaced relationship with drain regions of the semiconductor device. | 11-26-2015 |
20150340434 | SEMICONDUCTOR DEVICES AND METHOD OF MAKING THE SAME - In one embodiment, the semiconductor devices relate to using one or more super-junction trenches for termination. | 11-26-2015 |
20150333016 | SEMICONDUCTOR DEVICES AND METHODS OF MAKING THE SAME - In one embodiment, methods for making semiconductor devices are disclosed. | 11-19-2015 |
20150332969 | SEMICONDUCTOR DIE SINGULATION METHOD AND APPARATUS - In one embodiment, die are singulated from a wafer having a back layer by placing the wafer onto a first carrier substrate with the back layer adjacent the carrier substrate, forming singulation lines through the wafer to expose the back layer within the singulation lines, and using a mechanical device to apply localized pressure to the wafer to separate the back layer in the singulation lines. The localized pressure can be applied through the first carrier substrate proximate to the back layer, or can be applied through a second carrier substrate attached to a front side of the wafer opposite to the back layer. | 11-19-2015 |
20150327372 | CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided is a circuit device in which encapsulating resin to encapsulate a circuit board is optimized in shape, and a method of manufacturing the circuit device. A hybrid integrated circuit device, which is a circuit device according to the present invention includes a circuit board, a circuit element mounted on a top surface of the circuit board, and encapsulating resin encapsulating the circuit element, and coating the top surface, side surfaces, and a bottom surface of the circuit board. In addition, the encapsulating resin is partly recessed and thereby provided with recessed areas at two sides of the circuit board. The providing of the recessed areas reduces the amount of resin to be used, and prevents the hybrid integrated circuit device from being deformed by the cure shrinkage of the encapsulating resin. | 11-12-2015 |
20150325651 | METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR - In one embodiment, a method of forming a semiconductor device may include forming a buried region within a semiconductor region, including forming an opening in the buried region. The method may also include forming a drift region of a second conductivity type in the semiconductor region with at least a portion of the drift region overlying a first portion of the buried region. Another portion of the method may include forming a first drain region of the second conductivity type in the drift region wherein the first drain region does not overlie the buried region. | 11-12-2015 |
20150325567 | SEMICONDUCTOR DIODE AND METHOD OF MANUFACTURE | 11-12-2015 |
20150321603 | Systems and Methods for In-vehicle Network Controlled Media-Synchronized Light Show - In one embodiment, the in-vehicle network controller sends instructions, via a communication signal, to the lighting network wherein the lighting network is synchronized with a media source by using a communication protocol which controls features of the lighting network such as timing, fading, color, intensity, and enable/disable. | 11-12-2015 |
20150318790 | METHOD AND APPARATUS FOR SYNCHRONOUS RECTIFIER OPERATION - A method and synchronous rectifier controller uses minimum off and on time blanking to avoid switching the switching transistor at incorrect times responsive to transients in the current sense signal. The minimum off time timer is commenced only when the current sense signal is above a reset threshold, and is reset when the current sense voltage falls below the reset threshold. Resetting the minimum off time timer in this manner avoids false starts of the minimum off time timer due to transients and allows the SRC to properly synchronize with the conduction and blocking phases of rectifier operation. | 11-05-2015 |
20150318694 | METHOD OF FORMING A BUS COUPLER AND STRUCTURE THEREFOR - In one embodiment, a bus coupled includes a voltage control circuit configured to selectively conduct a current from the first current source away from an output of the coupler to regulate a voltage drop across the another current source to a first value. An embodiment of a method of forming a bus coupler may include configuring a circuit to store energy from the input into a first storage element in response to receiving an active portion of an input signal, and to transfer energy from the storage element to the output after termination of the active portion of the input signal. | 11-05-2015 |
20150311801 | Converter and Method - In accordance with an embodiment, a DC-DC converter is provided comprising a single regulation loop that drives a control circuit, wherein the control circuit selects between operation in a pulse width modulation operating mode and a pulse frequency modulation operating mode, the single regulation loop including a compensation loop, and wherein biasing of the compensation loop is maintained in response to selecting between the pulse width modulation and the pulse frequency modulation operating modes. | 10-29-2015 |
20150311242 | IMAGE SENSOR WITH DUAL LAYER PHOTODIODE STRUCTURE - An image system with a dual layer photodiode structure is provided for processing color images. In particular, the image system can include an image sensor that can include photodiodes with a dual layer photodiode structure. In some embodiments, the dual layer photodiode can include a first layer of photodiodes (e.g., a bottom layer), an insulation layer disposed on the first layer of photodiodes, and a second layer of photodiodes (e.g., a top layer) disposed on the insulation layer. The first layer of photodiodes can include one or more suitable pixels (e.g., green, blue, clear, luminance, and/or infrared pixels). Likewise, the second layer of photodiodes can include one or more suitable pixels (e.g., green, red, clear, luminance, and/or infrared pixels). An image sensor incorporating dual layer photodiodes can gain light sensitivity with additional clear pixels and maintain luminance information with green pixels. | 10-29-2015 |
20150295029 | PROCESS OF FORMING AN ELECTRONIC DEVICE HAVING A TERMINATION REGION INCLUDING AN INSULATING REGION - An electronic device can include an electronic component and a termination region adjacent to the electronic component region. In an embodiment, the termination region can include an insulating region that extends a depth into a semiconductor layer, wherein the depth is less than 50% of the thickness of the semiconductor layer. In another embodiment, the termination region can include a first insulating region that extends a first depth into the semiconductor layer, and a second insulating region that extends a second depth into the semiconductor layer, wherein the second depth is less than the first depth. In another aspect, a process of forming an electronic device can include patterning a semiconductor layer to define a trench within termination region while another trench is being formed for an electronic component within an electronic component region. | 10-15-2015 |
20150295025 | ELECTRONIC DEVICE HAVING A TERMINATION REGION INCLUDING AN INSULATING REGION - An electronic device can include an electronic component and a termination region adjacent to the electronic component region. In an embodiment, the termination region can include an insulating region that extends a depth into a semiconductor layer, wherein the depth is less than 50% of the thickness of the semiconductor layer. In another embodiment, the termination region can include a first insulating region that extends a first depth into the semiconductor layer, and a second insulating region that extends a second depth into the semiconductor layer, wherein the second depth is less than the first depth. In another aspect, a process of forming an electronic device can include patterning a semiconductor layer to define a trench within termination region while another trench is being formed for an electronic component within an electronic component region. | 10-15-2015 |
20150287774 | HIGH VOLTAGE CAPACITOR AND METHOD - In accordance with an embodiment, an electrical element includes a first portion of a first dielectric material between a first portion of a first electrical conductor and a first portion of a second electrical conductor and a second portion of the first dielectric material between a second portion of the first electrical conductor and a first portion of a third electrical conductor. In accordance with another embodiment, a method includes forming a first electrically conductive structure over a first portion of the first layer of dielectric material and forming a second electrically conductive structure over a second portion of the first layer of dielectric material. A second layer of dielectric material is formed over the first electrically conductive structure and a third electrically conductive structure over the second layer of dielectric material, wherein the third electrically conductive structure is over portions of the first and second electrically conductive structures. | 10-08-2015 |
20150279478 | FUSE ELEMENT PROGRAMMING CIRCUIT AND METHOD - In one embodiment, a programming circuit is configured to form a programming current for a silicide fuse element by using a non-silicide programming element. | 10-01-2015 |
20150271476 | STRUCTURED LIGHT IMAGING SYSTEM - Structured light imaging method and systems are described. An imaging method generates a stream of light pulses, converts the stream after reflection by a scene to charge, stores charge converted during the light pulses to a first storage element, and stores charge converted between light pulses to a second storage element. A structured light image system includes an illumination source that generates a stream of light pulses and an image sensor. The image sensor includes a photodiode, first and second storage elements, first and second switches, and a controller that synchronizes the image sensor to the illumination source and actuates the first and second switches to couple the first storage element to the photodiode to store charge converted during the light pulses and to couple the second storage element to the photodiode to store charge converted between the light pulses. | 09-24-2015 |
20150270196 | SEMICONDUCTOR DEVICES AND METHODS OF MAKING THE SAME - In one embodiment, methods for making semiconductor devices are disclosed. | 09-24-2015 |
20150270173 | ELECTRONIC DIE SINGULATION METHOD - In one embodiment, die are singulated from a wafer having a back layer by placing the wafer onto a carrier substrate with the back layer adjacent the carrier substrate, forming singulation lines through the wafer to expose the back layer within the singulation lines, and applying a pressure substantially uniformly along the second major surface to batch separate the layer of material in the singulation lines. In one embodiment, a fluid filled vessel can be used to apply the pressure. | 09-24-2015 |
20150263629 | METHOD AND APPARATUS FOR DEDICATED SKIP MODE FOR RESONANT CONVERTERS - A method and semiconductor device for controlling skip mode operation during light load conditions in a resonant power converter includes a skip mode controller circuit that compares a feedback signal corresponding to the secondary output level with a reference voltage to determine when to invoke skip mode. When entering skip mode the skip mode controller ceases switching by turning on the lower switch for a prolonged time to leave the resonant capacitor partially charged. Upon resuming switching, the lower switch is turned on first to drive current through the inductances, and asymmetric switching is used where the upper switch is on, initially for shorter periods to allow zero voltage switching. If the load increases, the on-time of upper and lower switches converge and conventional symmetric switching resumes. | 09-17-2015 |
20150263602 | METHOD AND SEMICONDUCTOR DEVICE FOR A DEDICATED STARTUP SEQUENCE IN A RESONANT CONVERTER - A method and semiconductor device for a resonant power converter includes logic circuitry that performs a dedicated startup sequence when power is first provided to the resonant converter. The logic circuitry can discharge the resonant capacitor, then iteratively pulse only an upper switch during a portion of the startup sequence, and measures the dead time between the half bridge signal starting to fall and the next time it finishes rising. If the dead time is greater that a startup exit value, which is based on the most recent upper switch on-time, then the upper switch on-time is incremented and the process is repeated until the dead time is less than the startup exit value, whereupon the startup logic transitions to conventional symmetric switching. | 09-17-2015 |
20150263166 | ELECTRONIC DEVICE INCLUDING A TRENCH AND A CONDUCTIVE STRUCTURE THEREIN - An electronic device can include a transistor structure, including a patterned semiconductor layer overlying a substrate and having a primary surface. The electronic device can further include first conductive structures within each of a first trench and a second trench, a gate electrode within the first trench and electrically insulated from the first conductive structure, a first insulating member disposed between the gate electrode and the first conductive structure within the first trench, and a second conductive structure within the second trench. The second conductive structure can be electrically connected to the first conductive structures and is electrically insulated from the gate electrode. The electronic device can further include a second insulating member disposed between the second conductive structure and the first conductive structure within the second trench. Processing sequences can be used that simplify formation of the features within the electronic device. | 09-17-2015 |
20150262880 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a semiconductor device is provided with: a step of preparing a semiconductor wafer ( | 09-17-2015 |
20150236172 | SCHOTTKY DEVICE AND METHOD OF MANUFACTURE - A Schottky device includes a barrier height adjustment layer in a portion of a semiconductor material. In accordance with an embodiment, the Schottky device is formed from a semiconductor material of a first conductivity type which has a barrier height adjustment layer of a second conductivity type that extends from a first major surface of the semiconductor material into the semiconductor material a distance that is less than a zero bias depletion boundary. A Schottky contact is formed in contact with the doped layer. | 08-20-2015 |
20150228494 | SEMICONDUCTOR DIE SINGULATION METHOD - In one embodiment, semiconductor die are singulated from a semiconductor wafer having a backmetal layer by placing the semiconductor wafer onto a carrier tape with the backmetal layer adjacent the carrier tape, forming singulation lines through the semiconductor wafer to expose the backmetal layer within the singulation lines, and separating portions of the backmetal layer using a fluid. | 08-13-2015 |
20150207477 | CHOPPER-STABILIZED AMPLIFIER AND METHOD THEREFOR - In one embodiment a chopper-stabilized amplifier may be formed to include a symmetrical passive RC notch filter having two cut-off frequencies. In an embodiment, the chopper stabilized amplifier may use only two clock signals to control the chopping operations. | 07-23-2015 |
20150194896 | METHOD OF FORMING A POWER SUPPLY CONTROLLER AND STRUCTURE THEREFOR - In one embodiment, a power supply controller may be configured to form a status signal that is representative of a secondary current by substantially removing a primary magnetization component from a primary current signal and to use the status signal to form a first signal that is representative of a delivered output power, and configured to adjust an on-time of one of a first or second switch responsively to the delivered output power. | 07-09-2015 |
20150189772 | SEMICONDUCTOR PACKAGE AND METHOD THEREFOR - In one embodiment, a semiconductor package may be formed having a first side and a second side that is substantially opposite to the first side. An embodiment may include forming an attachment clip extending substantially laterally between the first and second sides wherein the attachment clip is positioned near a distal end of the first and second sides. An embodiment may also include forming the attachment clip to have a flexible main portion that can bend away from a plane of the main portion toward a bottom side of the semiconductor package. | 07-02-2015 |
20150189711 | LED CONTROLLER AND METHOD THEREFOR - In an embodiment, an LED controller is configured to form a charge transfer sequence to selectively enable LED transistors of a plurality of LED transistors that are configured for coupling in parallel with a plurality of LEDs. An embodiment may include that the LED controller is configured to sequentially couple a charge capacitor to a gate-to-source capacitor of each LED transistor of the plurality of LED transistors to one of charge or to refresh the gate-to-source capacitor of a respective LED transistor and to one of enable or re-enable the respective LED transistor wherein the gate-to-source capacitor is a parasitic gate-to-source capacitor of the LED transistor wherein the charge capacitor is sequentially coupled to the gate-to-source capacitor of each LED transistor. | 07-02-2015 |
20150163873 | CONTROL CIRCUIT AND METHOD - In accordance with an embodiment, a control circuit for controlling a light emitting diode includes a first switching circuit having first and second inputs and an output and a second switching circuit having at least first and second inputs and an output, the first input coupled to the second input of the first switching circuit. Another embodiment includes a method for reducing flicker by generating an adjusted rectified voltage in response to a TRIAC dimmer signal from a TRIAC dimmer and a switching current in response to the adjusted rectified voltage being greater than a first reference voltage. The switching current is decreased in response to the adjusted rectified voltage becoming less than the first reference voltage. The TRIAC dimmer is turned off in response to decreasing the switching current. | 06-11-2015 |
20150162744 | SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE - A common mode filter coupled to a protection device. In accordance with an embodiment, the common mode filter has first and second coils, each coil having a spiral shape, a central region, an exterior region, a first terminal, and a second terminal, wherein the first terminal of the first coil is formed in a first portion of the central region, the first terminal of the second coil is formed in a second portion of the central region, and wherein the central region is laterally bounded by the first and second coils and the exterior region is not surrounded by the first and second coils. The protection device has a first terminal coupled to the first terminal of the first coil and a second terminal coupled to the first terminal of the second coil. | 06-11-2015 |
20150162305 | METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR - In one embodiment, a conductor bump is formed on an under bump conductor of a semiconductor device to extend a first distance away from a surface of the under bump conductor including forming a protective layer on an outer surface of the conductor bump wherein the plurality of semiconductor dies are subsequently singulated by etching through the semiconductor substrate with an etchant and wherein the protective layer protects the conductor bump from the etchant. | 06-11-2015 |
20150145562 | LOAD DETECTION CIRCUIT AND METHOD - In one embodiment, a load detection circuit may include a first circuit configured to control a first transistor to form a load current to a load in a first operating mode of the load detection circuit, a second circuit configured to be coupled to form at least a portion of the load current in a second operating mode of the load detection circuit, and a detection circuit configured to detect the control electrode of the first transistor having a value that is less than a threshold value of the first transistor. | 05-28-2015 |
20150130977 | IMAGE SENSORS WITH N-ROW PARALLEL READOUT CAPABILITY - An image sensor configured to readout an arbitrary number of rows in parallel is described, comprising a rolling global shutter pixel array which can be operated as a true global shutter. Shielding structures may be formed in the pixel array to minimize signal coupling between adjacent pixels when multiple rows are simultaneously reset and read out. A plurality of column select lines may be formed in a given pixel pitch, and the image sensor may utilize read out components and circuitry associated with conventional readout circuits to be used in simultaneously reading out a two-dimensional region of the image sensor. The image sensor may be configured to use charge binning between rows that are reset and read out in parallel to improve power consumption. The image sensor may include redundant output stages with routing circuitry that improves image sensor yield by compensating for yield loss in the output stage. | 05-14-2015 |
20150130451 | SENSOR CIRCUIT AND METHOD THEREFOR - In one embodiment, a sensor circuit may include a first receiver circuit that may be configured to receive a first signal that is representative oil a first mutual inductance and form a first detection signal that is representative of the first mutual inductance, wherein the first variable mutual inductance varies in response to a position of a metal object. An embodiment may include a second receiver circuit configured to receive a second signal that is representative of a second mutual inductance and form a second detection signal that is representative of the second mutual inductance, wherein the second mutual inductance varies in response to the position of the metal object. In an embodiment, the sensor circuit may include a recognition circuit configured to assert a movement detected signal responsively to a first value of the first detection signal, configured to assert a movement direction signal responsively to a first value of the second detection signal. | 05-14-2015 |
20150115332 | CMOS IMAGE SENSOR WITH GLOBAL SHUTTER, ROLLING SHUTTER, AND A VARIABLE CONVERSION GAIN, HAVING PIXELS EMPLOYING SEVERAL BCMD TRANSISTORS COUPLED TO A SINGLE PHOTODIODE AND DUAL GATE BCMD TRANSISTORS FOR CHARGE STORAGE AND SENSING - The invention describes image sensor array pixels with global and rolling shutter capabilities that utilize multiple BCMD transistors for storing and sensing charge for a single photodiode. This configuration improves the Dynamic Range (DR) of the sensor, by allowing sensing different image signals from a single pixel without saturation, a low level signal with long integration time followed by a high level signal with short integration time. Signal processing circuits can process these signals into a single Wide Dynamic Range (WDR) output. Further disclosed are pixels that use multiple-gate BCMD transistors for charge storage and sensing having multiple concentric gates, which allows changing the conversion gain of the BCMD transistors. Variable conversion gain is a useful feature when building WDR sensors since low conversion gain and high well capacity allows detection of high level signals and, at the same time, low level signals with high conversion gain and low noise. | 04-30-2015 |
20150115134 | STACKED-CHIP IMAGING SYSTEMS - Imaging systems may be provided with stacked-chip image sensors. A stacked-chip image sensor may include a vertical chip stack that includes an array of image pixels, analog control circuitry and storage and processing circuitry. The array of image pixels, the analog control circuitry, and the storage and processing circuitry may be formed on separate, stacked semiconductor substrates or may be formed in a vertical stack on a common semiconductor substrate. The image pixel array may be coupled to the control circuitry using vertical metal interconnects. The control circuitry may route pixel control signals and readout image data signals over the vertical metal interconnects. The control circuitry may provide digital image data to the storage and processing circuitry over additional vertical conductive interconnects coupled between the control circuitry and the storage and processing circuitry. The storage and processing circuitry may be configured to store and/or process the digital image data. | 04-30-2015 |
20150108569 | METHOD OF FORMING A SEMICONDUCTOR DEVICE INCLUDING TRENCH TERMINATION AND TRENCH STRUCTURE THEREFOR - In an embodiment, a method of forming a semiconductor may include forming a plurality of active trenches and forming a termination trench substantially surrounding an outer periphery of the plurality of active trenches. The method may also include forming at least one active trench of the plurality of active trenches having corners linking trench ends to sides of active trenches wherein each active trench of the plurality of active trenches has a first profile along the first length and a second profile at or near the trench ends; and forming a termination trench substantially surrounding an outer periphery of the plurality of active trenches and having a second profile wherein one of the first profile or the second profile includes a non-linear shape. | 04-23-2015 |
20150102445 | ALIGNMENT MARKS AND ALIGNMENT METHODS FOR ALIGNING BACKSIDE COMPONENTS TO FRONTSIDE COMPONENTS IN INTEGRATED CIRCUITS - An imaging system may include an imager integrated circuit with frontside components such as imaging pixels and backside components such as color filters and microlenses. The imager integrated circuit may be mounted to a carrier wafer with alignment marks. Bonding marks on the carrier wafer and the imager integrated circuit may be used to align the carrier wafer accurately to the imager integrated circuit. The alignment marks on the carrier wafer may be read, by fabrication equipment, to align backside components of the imager integrated circuit, such as color filters and microlenses, with backside components of the imager integrated circuit, such as photodiodes. | 04-16-2015 |
20150102403 | SEMICONDUCTOR DEVICE HAVING A PATTERNED GATE DIELECTRIC - In one embodiment, a semiconductor device includes an isolated trench-electrode structure. The semiconductor device is formed using a modified photolithographic process to produce alternating regions of thick and thin dielectric layers that separate the trench electrode from regions of the semiconductor device. The thin dielectric layers can be configured to control the formation channel regions, and the thick dielectric layers can be configured to reduce switching losses. | 04-16-2015 |
20150097532 | METHOD OF OPERATING A BATTERY AND STRUCTURE THEREFOR - In accordance with an embodiment, a method for discharging a power source such as, for example, a battery, includes determining a capacity of the battery and discharging the battery in response to the capacity of the battery being greater than a reference level. In accordance with another embodiment, a circuit suitable for use with a battery includes a power measurement circuit coupled to a discharge indicator circuit, a control circuit, and a load. The discharge indicator circuit is coupled to the control circuit, which is coupled to a switch configured for activating a discharge operation through the load. | 04-09-2015 |
20150092079 | IMAGING SYSTEMS AND METHODS FOR GENERATING MOTION-COMPENSATED HIGH-DYNAMIC-RANGE IMAGES - Electronic devices may include image sensors. Image sensors may be used to capture images having rows of long-exposure image pixel values that are interleaved with rows of short-exposure image pixel values. The long-exposure and short-exposure values in each interleaved image frame may be interpolated to form interpolated values. A combined long-exposure image and a combined short-exposure image may be generated using the long-exposure and the short-exposure values from the interleaved image frames and the interpolated values from a selected one of the interleaved image frames. The combined long-exposure and short-exposure images may each include image pixel values from either of the interleaved image frames in a non-motion edge region and image pixel values based only on the image pixel values or the interpolated values from the selected one of the interleaved images in a motion or non-edge region. High-dynamic-range images may be generated using the combined long-exposure and short-exposure images. | 04-02-2015 |
20150084153 | SCHOTTKY DEVICE AND METHOD OF MANUFACTURE - A Schottky device includes a plurality of mesa structures where one or more of the mesa structures includes a doped region having a multi-concentration dopant profile. In accordance with an embodiment, the Schottky device is formed from a semiconductor material of a first conductivity type. Trenches having sidewalk and floors are formed in the semiconductor material to form a plurality of mesa structures. A doped region having a multi-concentration impurity profile is formed in at least one trench, where the impurity materials of the doped region having the multi-concentration impurity profile are of a second conductivity type. A Schottky contact is formed to at least one of the mesa structures having the dope region with the multi-concentration impurity profile. | 03-26-2015 |
20150077601 | METHODS FOR TRIGGERING FOR MULTI-CAMERA SYSTEM - A system may include one or more camera modules each containing one or more image sensors. The system may be configured to capture images from light spectra outside the visible band. Therefore, the pixel integration times, and frame rates of the one or more image sensors may be unique and distinct. An image sensor may respond to a trigger control signal by beginning integration of a subset of pixels some duration after an appropriate trigger control signal transitions from low to high. The image sensor may output the frame captured by the pixels a predetermined duration after the trigger control signal transitions, to ensure a deterministic response. Pixels used to generate the image of a subsequent frame may begin integrating during the readout of the current frame. The pixels may be integrated for exactly their programmed integration time, even when the frame rate is varied. | 03-19-2015 |
20150076902 | METHOD OF FORMING A POWER SUPPLY CONTROLLER AND STRUCTURE THEREFOR - In one embodiment, a power supply controller may be formed including configuring the power supply controller to use an error signal and a ramp signal to control a duty cycle of a switching control signal that is configured to control first and second switches to charge a battery, and configuring the power supply controller to selectively offset a dc value of the ramp signal responsively to detecting the adapter current is greater than a first value wherein offsetting the dc value of the ramp signal changes the duty cycle of the switching control signal to supply current from the battery to a load. | 03-19-2015 |
20150070540 | IMAGE SENSOR INCLUDING TEMPERATURE SENSOR AND ELECTRONIC SHUTTER FUNCTION - An image sensor includes a substrate having a first conductivity type. A first well in the substrate has an opposite conductivity type and is doped with opposite conductivity type dopant. A second well in the first well has the opposite conductivity type and is doped with opposite conductivity type dopant. A first region in the second well has the opposite conductivity type and is doped with opposite conductivity type dopant. A second region in the first region has the first conductivity type and is doped with first conductivity type dopant. A third region in the second well adjacent the first region is of the opposite conductivity type and is doped with opposite conductivity type dopant. A temperature sensor is disposed between, and is connected to each of, the second region and the third region. | 03-12-2015 |
20150070488 | IMAGE SENSOR INCLUDING TEMPERATURE SENSOR AND ELECTRONIC SHUTTER FUNCTION - An image capture device includes an image sensor. The image sensor includes a temperature sensor for measuring temperature measurements of the image sensor. A timing generator is coupled to the image sensor for applying an electronic shutter pulse to the image sensor to drain away all charge in photodiodes of the image sensing region prior to image capture. A reading component is coupled to the temperature sensor for reading the temperature measurements from the temperature sensor. The image capture device is configured to prevent erroneous temperature readings by the reading component resulting from substrate punch-through from the application of the electronic shutter pulse. | 03-12-2015 |
20150064836 | RANGE MODULATED IMPLANTS FOR IMAGE SENSORS - Image sensors may include a plurality of photodiodes. The photodiodes may be isolated from each other using isolations regions formed from p-well or n-well implants. Deep and narrow isolation regions may be formed using a multi-step process that selectively places implants at desired depths in a substrate. If desired, the multi-step process may include only one photolithographic patterning step, which in turn can help reduce costs, fabrication time, and alignment errors. The process may include passing ions through a stack of alternating layers of material such as alternating layers of oxide and nitride. After each implant, a layer in the stack may be removed and ions may be passed through the layers remaining in the stack to form an implant at a different depth in the substrate. | 03-05-2015 |
20150064834 | IMAGE SENSOR INTEGRATED CIRCUIT PACKAGE WITH REDUCED THICKNESS - An image sensor die may include a pixel array formed in an image sensor substrate. The image sensor die may be mounted to a thin metal interconnect layer that has been deposited on a sacrificial carrier substrate. The thin metal interconnect layer may include one or more metal layers that are patterned to form metal traces that serve as contact pads, signal lines, and other interconnects in the interconnect layer. The image sensor die may be wire bonded, flip-chip mounted, or otherwise mechanically and electrically coupled to the metal interconnect layer. The sacrificial carrier substrate may be etched or otherwise removed to expose the metal interconnects on the metal interconnect layer. An array of solder balls may be formed on the exposed metal interconnects to form a ball grid array package, or the exposed contact pads may be plated to form a leadless chip carrier package. | 03-05-2015 |
20150062422 | LENS ALIGNMENT IN CAMERA MODULES USING PHASE DETECTION PIXELS - Image sensors may include image pixels and phase detection pixels. Phase detection pixels may he used during active lens alignment operations to accurately align camera module optics to the image sensor during camera module assembly. During active alignment operations, phase detection pixels may gather phase information from a target that is viewed through the camera module optics. Control circuitry may process the phase information to determine a distance and direction of lens movement needed to bring the target into focus and thereby align the camera module optics to the image sensor. A computer-controlled positioner may be used to adjust a position of the camera module optics relative to the image sensor based on information from the phase detection pixels. Once the camera module optics are accurately aligned relative to the image sensor, structures in the camera module assembly may be permanently attached to lock the alignment in place. | 03-05-2015 |
20150062392 | IMAGE SENSORS WITH INTER-PIXEL LIGHT BLOCKING STRUCTURES - An image sensor with an array of image sensor pixels is provided. Each pixel may include a photodiode and associated pixel circuits formed in a semiconductor substrate. Buried light shields may be formed on the substrate to present pixel circuitry that is formed in the substrate between two adjacent photodiodes from being exposed to incoming light. Metal interconnect muting structures may be formed over the buried light shields. In one embodiment, light blocking structures may be formed to completely seal the interconnect routing structures. The light blocking structures may be formed on top of the buried light shields or on the surface of the substrate. In another embodiment, planar light blocking structures that are parallel to the surface of the substrate may be formed between metal routing layers to help absorb stray light. Light blocking structures formed in these ways can help reduce optical crosstalk and enhance global shutter efficiency. | 03-05-2015 |
20150062347 | IMAGE PROCESSING METHODS FOR VISIBLE AND INFRARED IMAGING - Imaging systems may be provided with image sensors for capturing information about incident light intensities in the visible and infrared bands of light. The means of capturing information about visible light may be unintentionally and undesirably influenced by infrared light. Similarly, the means of capturing information about infrared light may be unintentionally and undesirably influenced by visible light. Storage and processing circuitry may correct for the undesired influence of infrared and visible light on the signal data from the visible and infrared sensors, respectively. The correction may be determined or chosen based on a detection of the illuminant type of the imaged scene. The correction may alternatively be universal, and applicable to images of scenes illuminated by any illuminant. | 03-05-2015 |
20150028460 | SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE - A common mode filter monolithically integrated with a protection device. In accordance with an embodiment a semiconductor material having a resistivity of at least 5 Ohm-centimeters is provided. A protection device is formed from a portion of the semiconductor material and a dielectric material is formed over the semiconductor material. A coil is formed over the dielectric material. | 01-29-2015 |
20150027290 | SEMICONDUCTOR DIE SINGULATION METHODS - In one embodiment, a method of singulating semiconductor die from a semiconductor wafer includes forming a material on a surface of a semiconductor wafer and reducing a thickness of portions of the material. Preferably, the thickness of the material is reduced near where singulation openings are to be formed in the semiconductor wafer. | 01-29-2015 |
20150023064 | METHOD OF FORMING A POWER SUPPLY CONTROLLER AND STRUCTURE THEREFOR - In one embodiment, a method of forming a power supply controller includes forming the power supply controller to receive an input signal that is representative of an ac signal, and forming the power supply controller to form an average value of an output current over a period of a drive signal that is formed by the power supply controller to have a waveshape of substantially one of a squared version of the input signal or a waveshape of the input signal. | 01-22-2015 |
20150009341 | FAILSAFE IMAGE SENSOR WITH REAL TIME INTEGRITY CHECKING OF PIXEL ANALOG PATHS AND DIGITAL DATA PATHS - A method of testing analog and digital paths of a pixel in a row of an imager, includes the following steps: (a) injecting first and second charges into the analog path of the pixel, wherein the first charge is in response to a light exposure, and the second charge is in response to a built-in test; (b) sampling the first and second charges to form an image signal level and a test signal level, respectively; and (c) converting, by an analog-to-digital converter (ADC), the image signal level and the lest signal level to form image data end test data, respectively. The method then validates the image data based on the test data. | 01-08-2015 |
20140375376 | ADAPTIVE MOS TRANSISTOR GATE DRIVER AND METHOD THEREFOR - In an embodiment, a gate driver circuit and/or method therefor may include configuring the gate driver circuit form a drive current to supply to a gate of an MOS transistor wherein the value of the drive current is a minimum value that can be supplied to the gate without increasing a charge stored on a gate-to-source capacitance of the MOS transistor; configuring the gate driver circuit to change the value of the drive current responsively to changes of a Vgs of the MOS transistor. | 12-25-2014 |
20140346956 | METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR - In one embodiment, a method of forming an LED control circuit may include configuring the LED control circuit to receive a sense signal that is representative of a value of an LED current flow through a plurality of LED strings wherein each LED string includes a plurality of series coupled LEDs; configuring a detector circuit of the LED control circuit to detect the LED current being no greater than a first value and responsively initiate forming a first time period; and configuring the LED control circuit to inhibit forming the LED current responsively to termination of the first time period. | 11-27-2014 |
20140312922 | DEVICE AND METHOD FOR DETERMINING CAPACITANCE - A device and method of determining a capacitance of a device is provided, which in one embodiment includes connecting a first terminal of a capacitor having a known capacitance to the first terminal of the device, applying an AC voltage to the first terminal of the device and the first terminal of the capacitor, measuring a current through the capacitor, measuring a current through the device, determining a first voltage across the device as a function of time, computing a capacitance of the device as a function of time by multiplying the capacitance of the capacitor by the ratio of the current through the device to the current through the capacitor, determining a capacitance of the device as a function of voltage based on the capacitance as a function of time and the first voltage across the device as a function of time, and outputting data of the first capacitance of the device as a function of voltage. | 10-23-2014 |
20140289548 | METHOD OF FORMING A DETECTION CIRCUIT AND STRUCTURE THEREFOR - In one embodiment, a power supply controller is configured to use a current to detect two different operating conditions on a single input terminal. | 09-25-2014 |
20140285124 | CONTROL METHOD AND DEVICE THEREFOR - In one embodiment, a method of forming a circuit to control an electrical machine may include, configuring the circuit to obtain voltage and current information of the voltage over and current in one or more stator coils; configuring the circuit to determine a stator current vector and a stator voltage vector; configuring the circuit to determine an amplitude and phase of a fundamental vector of the stator voltage vector and stator current vector; and configuring the circuit to determine a fundamental vector of a back-EMF. | 09-25-2014 |
20140284710 | INSULATED GATE SEMICONDUCTOR DEVICE HAVING SHIELD ELECTRODE STRUCTURE - In one embodiment, a semiconductor device includes a multi-portion shield electrode structure formed in a drift region. The shield electrode includes a wide portion formed in proximity to a channel side of the drift region, and a narrow portion formed deeper in the drift region. The narrow portion is separated from the drift region by a thicker dielectric region, and the wide portion is separated from the drift region by a thinner dielectric region. That portion of the drift region in proximity to the wide portion can have a higher dopant concentration than other portions of the drift region. | 09-25-2014 |
20140278381 | ACOUSTIC SIGNAL PROCESSING SYSTEM CAPABLE OF DETECTING DOUBLE-TALK AND METHOD - An acoustic signal processing system and method. In accordance with an embodiment, the acoustic signal processing system includes an adaptive filter that filters a signal from a frequency band reservation module and generates a filter signal that is received by a subtractor. The subtractor generates an error signal that is used by a double-talk indicator module to generate a control signal that indicates the presence of double-talk. | 09-18-2014 |
20140273356 | SEMICONDUCTOR DEVICES AND METHODS OF MAKING THE SAME - In one embodiment, methods for making semiconductor devices are disclosed. | 09-18-2014 |
20140268435 | CURRENT SATURATION DETECTION AND CLAMPING CIRCUIT AND METHOD - A method and circuit for detecting and clamping current in a ground fault circuit interrupter circuit. In accordance with an embodiment the circuit includes an amplifier connected to a switch, where in the amplifier has an input connected to a first conduction terminal of the switch through a resistor and another input connected to a second conduction terminal of the switch. An output of the amplifier is connected to a control terminal of the switch. The circuit may include a ground fault circuit interrupter engine having an input connected to the first conduction terminal of the switch and another second input connected to the second conduction terminal of the switch. | 09-18-2014 |
20140266272 | GROUND FAULT CIRCUIT INTERRUPTER AND METHOD - A ground fault interrupter circuit and a method for operating a ground fault interrupter that includes configuring the ground fault interrupter to perform a plurality of self tests. The ground fault interrupter may be configured to perform a ground fault self test, a grounded-neutral self test, and a trip circuit self test. | 09-18-2014 |
20140265719 | METHOD OF FORMING A TRANSDUCER CONTROLLER AND APPARATUS THEREFROM - In one embodiment, a transducer controller is configured to form an integrated distance measuring and diagnostic cycle that includes measuring a decay time of a transducer and to selectively adjust a period of the transmitted signal responsively to a value of a reverberation period. | 09-18-2014 |
20140264807 | SEMICONDUCTOR DEVICE - Conventional semiconductor devices have a problem that it is difficult to prevent the short circuit between chips and to improve accuracy in temperature detection with the controlling semiconductor chips. In a semiconductor device of the present invention, a first mount region to which a driving semiconductor chip is fixedly attached and a second mount region to which a controlling semiconductor chip is fixedly attached are formed isolated from each other. A projecting area is formed in the first mount region, and the projecting area protrudes into the second mount region. The controlling semiconductor chip is fixedly attached to the top surfaces of the projecting area and the second mount region by use of an insulating adhesive sheet material. This structure prevents the short circuit between the two chips, and improves accuracy in temperature detection with the controlling semiconductor chip. | 09-18-2014 |
20140264761 | SEMICONDUCTOR DEVICES AND METHODS OF MAKING THE SAME - In one embodiment, methods for making semiconductor devices are disclosed. | 09-18-2014 |
20140264611 | SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE - A semiconductor component and a method for manufacturing the semiconductor component. In accordance with an embodiment, the semiconductor component includes a plurality of stacked semiconductor chips mounted to a support structure, wherein one semiconductor chip has a side with a plurality of electrical contacts electrically coupled to conductive tabs of the support structure. An electrical connector electrically connects an electrical contact formed from a side opposite the side with the plurality of electrical contacts to a corresponding conductive tab. Another semiconductor chip is mounted to the electrical connector and electrical contacts formed from this semiconductor chip are electrically connected to corresponding conductive tabs of the support structure. | 09-18-2014 |
20140264574 | ELECTRONIC DEVICE INCLUDING VERTICAL CONDUCTIVE REGIONS AND A PROCESS OF FORMING THE SAME - An electronic device can include different vertical conductive structures that can be formed at different times. The vertical conductive structures can have the same or different shapes. In an embodiment, an insulating spacer can be used to help electrically insulate a particular vertical conductive structure from another part of the workpiece, and an insulating spacer may not be used to electrically isolate a different vertical conductive structure. The vertical conductive structures can be tailored for particular electrical considerations or to a process flow when formation of other electronic components may also be formed within either or both of the particular vertical conductive structures. | 09-18-2014 |
20140264565 | METHOD OF FORMING A TRANSISTOR AND STRUCTURE THEREFOR - In one embodiment, a semiconductor device is formed to include a gate structure extending into a semiconductor material that is underlying a first region of semiconductor material. The gate structure includes a conductor and also a gate insulator that has a first portion positioned between the gate conductor and a first portion of the semiconductor material that underlies the gate conductor. The first portion of the semiconductor material is configured to form a channel region of the transistor which underlies the gate conductor. The gate structure may also include a shield conductor overlying the gate conductor and having a shield insulator between the shield conductor and the gate conductor. The shield insulator may also have a second portion positioned between the shield conductor and a second portion of the gate insulator and a third portion overlying the shield conductor. | 09-18-2014 |
20140264523 | ELECTRONIC DEVICE INCLUDING A CAPACITOR STRUCTURE AND A PROCESS OF FORMING THE SAME - An electronic device can include a capacitor structure. In an embodiment, the electronic device can include a buried conductive region, a semiconductor layer having a primary surface, a horizontally-oriented doped region adjacent to the primary surface, an insulating layer overlying the horizontally-oriented doped region, and a conductive electrode overlying the insulating layer. The capacitor structure can include a first capacitor electrode including a vertical conductive region electrically connected to the horizontally-oriented doped region and the buried conductive region. The capacitor structure can further include a capacitor dielectric layer and a second capacitor electrode within a trench. The capacitor structure can be spaced apart from the conductive electrode. In another embodiment, an electronic device can include a first transistor, a trench capacitor structure, and a second transistor, wherein the first transistor is coupled to the trench capacitor structure, and the second transistor does not have a corresponding trench capacitor structure. | 09-18-2014 |
20140264456 | METHOD OF FORMING A HIGH ELECTRON MOBILITY SEMICONDUCTOR DEVICE - In an embodiment, a semiconductor device is formed by a method that includes, providing a base substrate of a first semiconductor material, and forming a layer that is one of SiC or a III-V series material on the base substrate. In a different embodiment, the base substrate may be one of silicon, porous silicon, or porous silicon with nucleation sites formed thereon, or silicon in a (111) plane. | 09-18-2014 |
20140264454 | OHMIC CONTACT STRUCTURE FOR SEMICONDUCTOR DEVICE AND METHOD - In one embodiment, a high electron mobility device structure includes heterostructure with a Group III-nitride channel layer and a Group III-nitride barrier layer that forms a two-dimensional electron gas layer at an interface between the two layers. At least one current carrying electrode includes a recess-structured conductive contact adjoining and making Ohmic contact with the two-dimensional electron gas layer. The recess-structured conductive contact has at least one side surface defined to have a rounded wavy shape. | 09-18-2014 |
20140264453 | METHOD OF FORMING A HIGH ELECTRON MOBILITY SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR - In one embodiment, a method of forming a semiconductor device can comprise; forming a HEM device on a semiconductor substrate. The semiconductor substrate provides a current carrying electrode for the semiconductor device and one or more internal conductor structures provide a vertical current path between the semiconductor substrate and regions of the HEM device. | 09-18-2014 |
20140264452 | METHOD OF FORMING A HEMT SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR - In one embodiment, a method of forming a HEMT device may include plating a conductor or a plurality of conductors onto an insulator that overlies a plurality of current carrying electrodes of the HEMT device. The method may also include attaching a connector onto the conductor or attaching a plurality of connectors onto the plurality of conductors. | 09-18-2014 |
20140264449 | METHOD OF FORMING HEMT SEMICONDUCTOR DEVICES AND STRUCTURE THEREFOR - In one embodiment, a HEMT semiconductor device includes an isolation region that may include oxygen wherein the isolation region may extend thorough an ALGaN and GaN layer into an underlying layer. | 09-18-2014 |
20140264369 | HIGH ELECTRON MOBILITY SEMICONDUCTOR DEVICE AND METHOD THEREFOR - In one embodiment, Group III-nitride materials are used to form a semiconductor device. A fin structure is formed in the Group III-nitride material, and a gate structure, source electrodes and drain electrodes are formed in spaced relationship to the fin structure. The fin structure provides both polar and semi-polar 2DEG regions. In one embodiment, the gate structure is configured to control current flow in the polar 2DEG region. Shield conductor layers are included above the gate structure and in spaced relationship with drain regions of the semiconductor device. | 09-18-2014 |
20140264367 | HEMT Semiconductor Device and a Process of Forming the Same - A HEMT semiconductor device can include a dielectric layer that includes a silicon nitride film and an AlN film. In an embodiment, the HEMT semiconductor device can include a GaN film and an AlGaN film. In a process of forming the HEMT device, the AlN can provide an etch stop when forming an opening for a gate electrode. | 09-18-2014 |
20140248747 | CHIP-ON-LEAD PACKAGE AND METHOD OF FORMING - In one embodiment, a chip-on-lead package structures includes an electronic chip having opposing major surfaces. One major surface of the electronic chip is attached to first and second leads. The one major surface is electrically connected to the first lead, and electrically isolated from the second lead. The other major surface where active device are formed may be electrically connected to the second lead. | 09-04-2014 |
20140247527 | CIRCUIT INCLUDING A RESISTIVE ELEMENT, A DIODE, AND A SWITCH AND A METHOD OF USING THE SAME - An ESD protection element can have a high ESD protection characteristic which has a desired breakdown voltage and flows a large discharge current. A junction diode is formed by an N+ type buried layer having a proper impurity concentration and a P+ type buried layer. The P+ type buried layer is combined with a P+ type drawing layer to penetrate an N− type epitaxial layer and be connected to an anode element. An N+ type diffusion layer and a P+ typed diffusion layer connected to an surrounding the N+ type diffusion layer are formed in the N− epitaxial layer surrounded by the P+ type buried layer etc. The N+ type diffusion layer and P+ type diffusion layer are connected to a cathode electrode. An ESD protection element is formed by the PN junction diode and a parasitic PNP bipolar transistor which uses the P+ type diffusion layer as an emitted, the N− type epitaxial layer as the base, and the P+ type drawing layer etc. as the collector. | 09-04-2014 |
20140246995 | MOTOR DRIVE CIRCUIT AND ILLUMINATION APPARATUS AND METHOD - A motor-drive circuit includes: an output transistor configured to supply a drive current to a motor for a cooling fan; a switching-control circuit configured to control switching of the output transistor so that the motor rotates in a first direction, or rotates in a second direction opposite to the first direction; and a switching circuit configured to, when a first time has elapsed since start of rotation of the motor in the first direction, cause the switching-control circuit to start switching control so that the motor stops rotating in the first direction and thereafter rotates in the second direction, and configured to, when a second time has elapsed since start of rotation of the motor in the second direction, cause the switching-control circuit to start switching control so that the motor stops rotating in the second direction and thereafter rotates in the first direction. | 09-04-2014 |
20140242771 | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE - A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component includes a transient voltage suppression structure that includes at least two diodes and a Zener diode. In accordance with embodiments, a semiconductor material is provided that includes an epitaxial layer. The at least two diodes and the Zener diode are created at the surface of the epitaxial layer, where the at least two diodes may be adjacent to the Zener diode. | 08-28-2014 |
20140242503 | METHOD OF MANUFACTURING A COLOR FILTER - A color filter is manufactured on each of a plurality of light-receiving elements of an RGB sensor using a plurality of kinds of light-transmitting films having different transmission colors. In such a case, the light-transmitting film that is to be coated next does not uniformly spread across the entire semiconductor wafer, and coating nonuniformities readily occur when a pattern of the light-transmitting film formed earlier on a certain optical element has a right angle portion. In order to solve this problem, the pattern of the light-transmitting film formed earlier has a planar shape having corner-cut portions so that right angle portions do not occur. | 08-28-2014 |
20140232437 | METHOD FOR OPERATING A BACKUP CIRCUIT AND CIRCUIT THEREFOR - In some embodiments, a reset circuit for an electronic circuit equipped with a backup power capacitor includes a first detector arranged to detect a predetermined first voltage of the backup capacitor, a second detector arranged to detect a predetermined second voltage of the backup capacitor, the second voltage being lower than the first voltage, and a controller arranged to control an output of a reset request signal based on detection results of the first detector and the second detector. The controller is configured to output the reset request signal when the first detector detects the first voltage after the second detector detected the second detector. | 08-21-2014 |
20140220739 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD - A semiconductor device includes: a semiconductor substrate; a heat sink mounted on an upper surface of the semiconductor substrate; wirings formed on a lower surface of the semiconductor substrate; and the like. The heat sink is mounted on the upper surface of the semiconductor substrate, and a planar size thereof is approximately the same as that of the semiconductor substrate. Moreover, the heat sink has a thickness of 500 μm to 2 mm, and may be formed to be thicker than the semiconductor substrate. By using the heat sink to reinforce the substrate, a thickness of the semiconductor substrate can be reduced to, for example, about 50 μm. As a result, a thickness of the entire semiconductor device can be reduced. | 08-07-2014 |
20140218752 | LENS POSITION DETECTING CIRCUIT AND METHOD - A position of a lens is detected by detecting, using a phototransistor, light that is emitted from a photodiode and that varies depending on lens position. A control unit divides a moving range of the lens into a plurality of areas, approximates a relationship between lens positions and current of the phototransistor for each of the areas, corrects a current of the phototransistor using the approximated relationship so as to obtain a corrected detection current having a linear relationship with respect to lens positions, and detects the position of the lens using the obtained corrected detection current. | 08-07-2014 |
20140217937 | SINGLE-PHASE BRUSHLESS MOTOR DRIVER AND METHOD - A driving circuit for a single-phase-brushless motor and a method that includes a driving-signal-generating circuit configured to generate a driving signal for supplying, to a driving coil of the single-phase brushless motor, an output circuit coupled to the driving signal generating circuit; and an induced voltage zero-cross detecting circuit having a plurality of inputs and an output, a first input coupled to the driving signal generating circuit and configured to detect a zero cross of an induced voltage in response to operation in the de-energized period. | 08-07-2014 |
20140214434 | Method for processing sound data and circuit therefor - A sound data processing apparatus includes a central processing unit for controlling predetermined processing in the apparatus, a rewritable RAM, a decoder performing the decoding processing for sound data, and an interface unit for being fitted with an external memory. The sound data processing apparatus reads a driver from the external memory mounted in the interface unit and stores the read driver into the RAM, and reads the sound data from the external memory with the driver and processes the read sound data. As a result, the wastefully using of the memory capacity of the memory mounted in the sound data processing apparatus is reduced. | 07-31-2014 |
20140207287 | ACTUATOR CONTROL APPARATUS - An actuator control apparatus includes an analog-digital conversion circuit, a servo circuit, a sampling circuit, and a driving circuit. The analog-digital conversion circuit is configured to sample a position detection signal with a first sampling period, convert the sampled signal into a digital signal, and output the digital signal, the position detection signal outputted from a position sensor corresponding to a position of a control target. The servo circuit is configured to calculate a displacement amount, by which the control target is to be displaced by an actuator, and output first servo control data corresponding to the calculated displacement amount, based on the position detection signal converted into the digital signal. The sampling circuit is configured to linearly interpolate the first servo control data, and output second servo control data sampled with a second sampling period shorter than the first sampling period. | 07-24-2014 |
20140197483 | TRENCH SHIELDING STRUCTURE FOR SEMICONDUCTOR DEVICE AND METHOD - A shielding structure for a semiconductor device includes a plurality of trenches. The trenches include passivation liners and shield electrodes, which are formed therein. In one embodiment, the shielding structure is placed beneath a control pad. In another embodiment, the shielding structure is placed beneath a control runner. | 07-17-2014 |
20140191790 | OFFSET CANCELLING CIRCUIT AND METHOD - When a voltage is applied from outside such that a current flowing in a Hall element is switched, each of a plurality of capacitors is charged with an output voltage of the Hall element in each state. A dummy switching element is connected to a switching element which connects the plurality of capacitors in parallel to each other, the dummy switching element and the switching element being controlled to be switched ON and OFF exclusively with respect to each other. | 07-10-2014 |
20140184109 | DRIVE CONTROL CIRCUIT FOR LINEAR VIBRATION MOTOR AND METHOD - A drive signal generating unit generates a drive signal used to alternately deliver a positive current and a negative current to a coil. A driver unit generates the drive current in response to the drive signal generated by the drive signal generating unit and supplies the drive current to the coil. After the drive termination of a linear vibration motor, the drive signal generating unit generates a drive signal whose phase is opposite to the phase of the drive signal generated during the motor running. The driver unit quickens the stop of the linear vibration motor by supplying to the coil the drive current of opposite phase according to the drive signal of opposite phase. | 07-03-2014 |
20140179063 | RESIN SEALING TYPE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME, AND LEAD FRAME - The invention is directed to firm bonding between semiconductor dies etc bonded to a lead frame and wire-bonding portions of the lead frame by ultrasonic Al wire bonding, and the prevention of shortcircuit between the semiconductor dies etc due to a remaining portion of the outer frame of the lead frame after the outer frame is cut. By extending the wire-bonding portion etc on the lead frame in a wire-bonding direction and connecting the wire-bonding portion etc to the outer frame of the lead frame through a connection lead etc, the ultrasonic vibration force in the ultrasonic Al wire bonding is prevented from dispersing and the Al wire and the wire-bonding portion etc are firmly bonded. The outer frame is cut after a resin sealing process is completed. Even when a portion of the outer frame remains on the side surface of the resin package, connection between the connection lead etc and other hanging lead etc are prevented by providing a notch etc in the outer frame between the connection lead etc and the hanging lead etc. | 06-26-2014 |
20140176146 | METHOD FOR DETERMINING A POWER LEVEL OF A BATTERY AND CIRCUIT THEREFOR - A remaining battery power calculation circuit includes: a detection unit configured to detect an output voltage of a battery; a data storage unit configured to store data in an associated manner with each of a plurality of current values for charge or discharge of the battery, the data indicating a relationship between the output voltage and a ratio of remaining power of the battery to a capacity of the battery in a case where the battery is charged or discharged with each of the plurality of current values; and a first calculation unit configured to calculate a charging/discharging current of the battery based on the data and the output voltage. | 06-26-2014 |
20140175994 | METHOD FOR DRIVING A LIGHT-EMITTING UNIT AND CIRCUIT THEREFOR - A driver circuit is provided which comprises a series-connected unit having a light-emitting element and a current limiting inductor directly connected to the light-emitting element, a regenerative diode which is connected in parallel to the series-connected unit and which regenerates energy stored in the current limiting inductor, a transistor which controls a current flowing through the light-emitting element and the current limiting inductor, and a controller which controls an operation of the transistor, wherein the controller controls the transistor according to a voltage value of a power supply applied to the light-emitting element. | 06-26-2014 |
20140167159 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N−-type semiconductor layer. A source layer including an N−-type layer is disposed in a surface portion of the body layer. An N− type drift layer is formed in a surface portion of the N−-type semiconductor layer. This drift layer includes a first region having a first N type impurity concentration peak region and a second region having a second N type impurity concentration peak region that is positioned deeper than the first N type impurity concentration peak region, the second region adjoining this first region. An N+ type drain layer is formed in a surface portion of the second region. | 06-19-2014 |
20140159108 | METHOD OF FORMING AN ESD DEVICE AND STRUCTURE THEREFOR - In one embodiment, an ESD device is configured to include a trigger device that assists in forming a trigger of the ESD device. The trigger device is configured to enable a transistor or a transistor of an SCR responsively to an input voltage having a value that is no less than the trigger value of the ESD device. | 06-12-2014 |
20140151883 | METHOD FOR MANUFACTURING A SEMICONDUCTOR COMPONENT AND STRUCTURE THEREFOR - A semiconductor component having wettable leadframe lead surfaces and a method of manufacture. A leadframe having leadframe leads is embedded in a mold compound. A portion of at least one leadframe lead is exposed and an electrically conductive material is formed on the exposed portion. The mold compound is separated to form singulated semiconductor components. | 06-05-2014 |
20140151788 | TRENCH POWER FIELD EFFECT TRANSISTOR DEVICE AND METHOD - In one embodiment, a structure for a trench power field effect transistor device with controlled, shallow, abrupt, body contact regions. | 06-05-2014 |
20140151787 | ELECTRONIC DEVICE INCLUDING A TRENCH AND A CONDUCTIVE STRUCTURE THEREIN - An electronic device can include a transistor structure, including a patterned semiconductor layer overlying a substrate and having a primary surface, wherein the patterned semiconductor layer defines a first trench and a second trench that extend from the primary surface towards the substrate. The electronic device can further include a first conductive electrode and a gate electrode within the first trench. The electronic device can still further include a second conductive electrode within the second trench. The electronic device can include a source region within the patterned semiconductor layer and disposed between the first and second trenches. The electronic device can further include a body contact region within the patterned semiconductor layer and between the first and second trenches, wherein the body contact region is spaced apart from the primary surface. Processes of forming the electronic device can take advantage of forming all trenches during processing sequence. | 06-05-2014 |
20140145256 | ELECTRONIC DEVICE COMPRISING A CONDUCTIVE STRUCTURE AND AN INSULATING LAYER WITHIN A TRENCH - An electronic device can include a semiconductor layer overlying a substrate and having a primary surface and a thickness, wherein a trench extends through at least approximately 50% of the thickness of semiconductor layer to a depth. The electronic device can further include a conductive structure within the trench, wherein the conductive structure extends at least approximately 50% of the depth of the trench. The electronic device can still further include a vertically-oriented doped region within the semiconductor layer adjacent to and electrically insulated from the conductive structure; and an insulating layer disposed between the vertically-oriented doped region and the conductive structure. A process of forming an electronic device can include patterning a semiconductor layer to define a trench extending through at least approximately 50% of the thickness of the semiconductor layer and forming a vertically-oriented doped region after patterning the semiconductor layer to define the trench. | 05-29-2014 |
20140134828 | SEMICONDUCTOR DIE SINGULATION METHOD - In one embodiment, semiconductor die are singulated from a semiconductor wafer having a backmetal layer by placing the semiconductor wafer onto a carrier tape with the backmetal layer adjacent the carrier tape, forming singulation lines through the semiconductor wafer to expose the backmetal layer within the singulation lines, and separating portions of the backmetal layer within the singulation lines using a pressurized fluid applied to the carrier tape. | 05-15-2014 |
20140132253 | INDUCTIVE SENSOR - In one embodiment, an electronic device includes an excitation control; a first excitation element coupled to the excitation control; a second excitation element coupled to the excitation control; a target positioned near the first and second excitation elements and within the electromagnetic fields generated by the first and second excitation elements; a receiving element positioned near the target and within the electromagnetic fields generated by the first and second excitation elements; and a signal processor coupled to the receiving element and coupled to the excitation control. | 05-15-2014 |
20140127885 | SEMICONDUCTOR DIE SINGULATION METHOD - In one embodiment, die are singulated from a wafer having a back layer by placing the wafer onto a first carrier substrate with the back layer adjacent the carrier substrate, forming singulation lines through the wafer to expose the back layer within the singulation lines, and using a mechanical device to apply localized pressure to the wafer to separate the back layer in the singulation lines. The localized pressure can be applied through the first carrier substrate proximate to the back layer, or can be applied through a second carrier substrate attached to a front side of the wafer opposite to the back layer. Heat is applied to the first carrier substrate while the localized pressure is applied. | 05-08-2014 |
20140127880 | SEMICONDUCTOR DIE SINGULATION METHOD AND APPARATUS - In one embodiment, die are singulated from a wafer having a back layer by placing the wafer onto a first carrier substrate with the back layer adjacent the carrier substrate, forming singulation lines through the wafer to expose the back layer within the singulation lines, and using a mechanical device to apply localized pressure to the wafer to separate the back layer in the singulation lines. The localized pressure can be applied through the first carrier substrate proximate to the back layer, or can be applied through a second carrier substrate attached to a front side of the wafer opposite to the back layer. | 05-08-2014 |
20140103424 | ELECTRONIC DEVICE COMPRISING CONDUCTIVE STRUCTURES AND AN INSULATING LAYER BETWEEN THE CONDUCTIVE STRUCTURES AND WITHIN A TRENCH - An electronic device can include a substrate including an underlying doped region and a semiconductor layer overlying the substrate. A trench can have a sidewall and extend at least partly through the semiconductor layer. The electronic device can further include a first conductive structure adjacent to the underlying doped region, an insulating layer, and a second conductive structure within the trench. The insulating layer can be disposed between the first and second conductive structures, and the first conductive structure can be disposed between the insulating layer and the underlying doped region. Processes of forming the electronic device may be performed such that the first conductive structure includes a conductive fill material or a doped region within the semiconductor layer. The first conductive structure can allow the underlying doped region to be farther from the channel region and allow R | 04-17-2014 |
20140097517 | SEMICONDUCTOR DEVICE HAVING LOCALIZED CHARGE BALANCE STRUCTURE AND METHOD - In one embodiment, a semiconductor substrate is provided having a localized superjunction structure extending from a major surface. A doped region is then formed adjacent the localized superjunction structure to create a charge imbalance therein. In one embodiment, the doped region can be an ion implanted region formed within the localized superjunction structure. In another embodiment, the doped region can be an epitaxial layer having a graded dopant profile adjoining the localized superjunction structure. The charge imbalance can improve, among other things, UIS performance. | 04-10-2014 |
20140097489 | SEMICONDUCTOR DEVICE HAVING LOCALIZED CHARGE BALANCE STRUCTURE AND METHOD - In one embodiment, a semiconductor device has a superjunction structure formed adjoining a low-doped n-type region. A low-doped p-type region is formed adjoining the superjunction structure above the low-doped n-type region and is configured to improve Eas characteristics. A body region is formed adjacent the low-doped p-type region and a control electrode structure is formed adjacent the body region for controlling a channel region within the body region. | 04-10-2014 |
20140091729 | LIGHT-EMITTING ELEMENT DRIVING CIRCUIT SYSTEM - A light-emitting element driving circuit system is provided in which a plurality of current paths, in each of which a light-emitting element and a switching element which is controlled to be switched ON and OFF for causing light to be emitted from the light-emitting element are connected in series, are placed in parallel to each other, wherein an ON time of each switching element is adjusted based on a light-emission period which is a period in which the light-emitting elements are caused to emit light in a circulating manner, such that a number of switching operations of each switching element is reduced. | 04-03-2014 |
20140091399 | ELECTRONIC DEVICE INCLUDING A TRANSISTOR AND A VERTICLE CONDUCTIVE STRUCTURE - An electronic device, including an integrated circuit, can include a buried conductive region and a semiconductor layer overlying the buried conductive region, wherein the semiconductor layer has a primary surface and an opposing surface lying closer to the buried conductive region. The electronic device can also include a first doped region and a second doped region spaced apart from each other, wherein each is within the semiconductor layer and lies closer to primary surface than to the opposing surface. The electronic device can include current-carrying electrodes of transistors. A current-carrying electrode of a particular transistor includes the first doped region and is a source or an emitter and is electrically connected to the buried conductive region. Another current-carrying electrode of a different transistor includes the second doped region and is a drain or a collector and is electrically connected to the buried conductive region. | 04-03-2014 |
20140087542 | SEMICONDUCTOR DIE SINGULATION APPARATUS AND METHOD - In one embodiment, a method of singulating semiconductor die from a semiconductor wafer includes forming a material on a surface of a semiconductor wafer and reducing a thickness of portions of the material. Preferably, the thickness of the material is reduced near where singulation openings are to be formed in the semiconductor wafer. | 03-27-2014 |
20140078798 | POWER FACTOR CONTROLLER AND METHOD - In accordance with an embodiment, a converter includes a power factor controller that varies the switching frequency of a switching transistor in accordance with a signal representative of power at the input of the converter. | 03-20-2014 |
20140049240 | MULTI-PHASE POWER SUPPLY CONTROLLER AND METHOD THEREFOR - In one embodiment, a method of forming a multi-channel power supply controller includes forming a plurality of channels configured to regulate an output voltage between first and second values, configuring the controller to select a channel that has a lowest current value and initiate forming a drive signal for that channel responsively to the output voltage having a value that is less than the first value, configuring a reset circuit for each channel to terminate the respective drive signal responsively to at least the output voltage having a value greater than the first value. | 02-20-2014 |
20140049232 | RIPPLE SUPPRESSOR CIRCUIT AND METHOD THEREFOR - In one embodiment, a method of forming a ripple suppressor circuit includes a configuring the ripple suppressor circuit to receive a first signal that is representative of a requested voltage and a second signal that is a filtered value of the first signal. The method also includes configuring the ripple suppressor circuit to determine a peak value of the second signal responsively to the first signal and to determine a minimum value of the second signal responsively to the first signal. The method may also include configuring the ripple suppressor circuit to form an average value of the peak value and the minimum value. | 02-20-2014 |
20140048917 | EM PROTECTED SEMICONDUCTOR DIE - In one embodiment, a semiconductor die is formed to have sloped sidewalls. A conductor is formed on the sloped sidewalls. | 02-20-2014 |
20140043013 | SENSOR CIRCUIT - A method of measuring signals related to a photodiode based sensor and calculating a corrected data value thereof is disclosed. A nominal reset voltage value of the photodiode may be measured. A knee point voltage may be applied to the photodiode and resets a voltage on the photodiode to the knee point voltage when the voltage on the photodiode falls below the knee point voltage. Applying the knee point voltage may extend the dynamic range of the sensor. An output voltage of the photodiode at end of an integration time of the photodiode may be measured. The knee point voltage may be applied again after the end of the integration time. A voltage value of the photodiode of the knee point voltage may be measured. The nominal reset voltage value, the output voltage of a sensor and the knee point voltage may be reported to calculate the corrected data value. | 02-13-2014 |
20140035114 | SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD - In one embodiment, a semiconductor package structure includes a substrate having a well region extending from a major surface. An interposer structure is attached to the substrate within the well region. The interposer structure has a major surface that is substantially co-planar with the major surface of the substrate. An electrical device is directly attached to the substrate and the interposer structure. The interposer structure can be an active device, such as a gate driver integrated circuit, or passive device structure, such as an impedance matching network. | 02-06-2014 |
20140035052 | ELECTRONIC DEVICE INCLUDING A TAPERED TRENCH AND A CONDUCTIVE STRUCTURE THEREIN - An electronic device can include a semiconductor layer, and a trench extending into the semiconductor layer and having a tapered shape. In an embodiment, the trench includes a wider portion and a narrower portion. The electronic device can include a doped semiconductor region that extends to a narrower portion of the trench and has a dopant concentration greater than a dopant concentration of the semiconductor layer. In another embodiment, the electronic device can include a conductive structure within a relatively narrower portion of the trench, and a conductive electrode within a relatively wider portion of the trench. In another embodiment, a process of forming the electronic device can include forming a sacrificial plug and may allow insulating layers of different thicknesses to be formed within the trench. | 02-06-2014 |
20140029682 | LOW-IF TRANSCEIVER ARCHITECTURE - A transceiver, receiver, and transmitter are provided. The transceiver may also include a programmable matching block configured to implement impedance-matching between an antenna and the receiver and/or between the antenna and the transmitter. The programmable matching block may implement the impedance-matching through a shared matching circuit block. The programmable matching block may include at least one of a programmable inductor and a programmable capacitor. | 01-30-2014 |
20140027894 | RESIN MOLDED SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - This invention is directed to provide a method of manufacturing a resin molded semiconductor device with high reliability by preventing a resin leakage portion from occurring due to burrs on a lead frame formed by punching. The method of manufacturing the resin molded semiconductor device according to the invention includes bonding a semiconductor die on an island in a lead frame, electrically connecting the semiconductor die with the lead frame, resin-molding the lead frame on which the semiconductor die is bonded, and applying prior to the resin-molding a compressive pressure that is higher than a clamping pressure applied in the resin-molding to a region of the lead frame being clamped by molds in the resin-molding of the lead frame. | 01-30-2014 |
20140015476 | CHARGING SYSTEM FOR PORTABLE ELECTRONIC EQUIPMENT - In a charging system for portable electronic equipment, providing the charging current is automatically restarted even in the case where an amount of charging current taken into the portable electronic equipment exceeds charging current providing capacity of a USB battery charger and the USB battery charger stops providing the charging current. When a voltage at a VBUS terminal is lower than a first predetermined voltage, a CPU assumes that the USB battery charger has stopped providing the charging current and turns off a first switching device. And the CPU turns on a second switching device for a predetermined period of time. As a result, the voltage at the VBUS terminal falls to 0.7V or below during the predetermined period of time. In response to the change in the voltage at the VBUS terminal, the USB battery charger restarts providing the charging current to the VBUS terminal. | 01-16-2014 |
20140010384 | MICROPHONE AMPLIFIER CIRCUIT - The invention provides a microphone amplifier circuit which enhances the SNR (signal noise ratio) and expands the dynamic range by reducing the noise level. A microphone amplifier circuit includes a preamplifier which amplifies an audio signal from a capacitor microphone, a level detection circuit which outputs a level detection signal when the level of the audio signal is in the vicinity of the noise level of the microphone amplifier circuit, and an attenuator which attenuates the level of the audio signal outputted from the preamplifier in response to the level detection signal. The preamplifier includes an operational amplifier, a feedback capacitor and a feedback resistor. | 01-09-2014 |
20140009177 | Device and Method for Determining Capacitance as a Function of Voltage - A device and method of determining a capacitance of a device is provided, which in one embodiment includes connecting a first terminal of a capacitor having a known capacitance to the first terminal of the device, applying an AC voltage to the first terminal of the device and the first terminal of the capacitor, measuring a current through the capacitor, measuring a current through the device, determining a first voltage across the device as a function of time, computing a capacitance of the device as a function of time by multiplying the capacitance of the capacitor by the ratio of the current through the device to the current through the capacitor, determining a capacitance of the device as a function of voltage based on the capacitance as a function of time and the first voltage across the device as a function of time, and outputting data of the first capacitance of the device as a function of voltage. | 01-09-2014 |
20140001539 | INSULATED GATE SEMICONDUCTOR DEVICE | 01-02-2014 |
20130341712 | TRENCH SHIELDING STRUCTURE FOR SEMICONDUCTOR DEVICE AND METHOD - A shielding structure for a semiconductor device includes a plurality of trenches. The trenches include passivation liners and shield electrodes, which are formed therein. In one embodiment, the shielding structure is placed beneath a control pad. In another embodiment, the shielding structure is placed beneath a control runner. | 12-26-2013 |
20130334990 | DRIVER CIRCUIT AND METHOD - A drive signal generating unit generates a drive signal used to alternately deliver a positive current and a negative current to a coil. The drive signal is such that nonconducting periods are set before and after a positive current conducting period and the nonconducting periods are set before and after a negative current conducting period. A driver unit generates the drive current in response to the drive signal generated by the drive signal generating unit and then supplies the drive current to the coil. The drive signal generating unit sets the width of a nonconducting period such that, after the drive start of the linear vibration motor, the width of a nonconducting period to be set before at least the first conducting period of the drive signal is shorter than the width of a nonconducting period to be set before each conducting period during steady operation of the linear vibration motor. | 12-19-2013 |
20130324067 | TUNING CIRCUIT - To adjust a tuning frequency without an output being muted while an oscillation frequency is adjusted. A tuning circuit includes a pair of an inductor and a tuning variable capacitor unit, adjusts a tuning frequency by changing a capacitance of the tuning variable capacitor unit, and obtains a tuning signal having a limited band from a received signal. The tuning circuit includes an oscillating inductor that passes a current corresponding to the tuning signal, an oscillating variable capacitor unit that adjusts the oscillation frequency of a system including the oscillating inductor, and a controller that changes a capacitance of the oscillating variable capacitor unit correspondingly to a desired tuning frequency while adjusting the capacitance such that the oscillation frequency corresponds to the desired tuning frequency, and adjusts a capacitance of the tuning variable capacitor unit in accordance with the adjusted capacitance of the oscillating variable capacitor unit. | 12-05-2013 |
20130314032 | CHARGE CONTROL CIRCUIT, CHARGE CIRCUIT, AND MOBILE ELECTRONIC DEVICE - A charge control circuit includes a comparator circuit to compare a secondary-battery voltage with a comparison voltage corresponding to an input-power-supply voltage, a transistor to supply an input current to an inductor, a first control circuit to control the transistor, and a second control circuit to control second and third transistors to increase and decrease an inductor current, respectively, so that a boost DC-DC converter performs a boost operation. When the secondary-battery voltage is equal to or higher than the comparison voltage, the first and second control circuits turn on the transistor and perform switching of the second and third transistors complementarily, respectively. When the secondary-battery voltage is lower than the comparison voltage, the first control circuit controls the transistor so that the input current takes a predetermined value, and the second control circuit turns on and off the third and second transistors, respectively. | 11-28-2013 |
20130307490 | CHARGE CONTROL CIRCUIT, CHARGE CIRCUIT, AND MOBILE DEVICE - A charge control circuit includes: a charge/discharge circuit to charge a capacitor when an input current from an input power supply is smaller than a first current, and discharge the capacitor when the input current is greater than the first current; a discharge circuit to discharge the capacitor when the input current becomes greater than a second current greater than the first current; an error amplifier circuit to amplify an error between a lower voltage between a capacitor charging voltage and a reference voltage corresponding to the maximum output voltage, and a feedback voltage corresponding to the output voltage; and a drive circuit to perform switching of a transistor of a booster circuit, including an inductor and the transistor to increase an inductor current, configured to boost the output voltage by supplying the inductor current to the terminal when the transistor is off, so that the error becomes smaller. | 11-21-2013 |
20130307454 | DRIVER CIRCUIT AND METHOD - An amount of a motor drive current is controlled to an appropriate value. Two coils are provided, and a rotor is rotated by the coils by setting different phases for the supplied currents to the two coils. During a phase where one of the coils is in a high-impedance state, an induced voltage generated in the coil is detected. According to the state of the induced voltage, an output control circuit controls the amounts of the motor drive currents supplied to the two coils. | 11-21-2013 |
20130285714 | TUNER - A center frequency F | 10-31-2013 |
20130272034 | METHOD OF FORMING A LOW POWER DISSIPATION REGULATOR AND STRUCTURE THEREFOR - In one embodiment, a method of forming a conditioning circuit includes configuring an output biasing network to provide a biasing voltage to an MOS transistor to enable the MOS transistor to operate in a saturated operating mode for input voltages that are less than a threshold voltage. | 10-17-2013 |
20130257801 | TOUCH SENSOR - A plurality of detection patterns are formed as conductive patterns directly on a back surface of a panel substrate to which an operation object such as a finger comes in proximity from a front surface side thereof. By independently detecting a change in capacitance in the plurality of detection patterns caused by proximity of the operation object from the front surface side, proximity of the operation object to the panel substrate is detected. | 10-03-2013 |
20130256507 | PHOTODETECTOR CIRCUIT - Light from a photodiode is detected using a phototransistor. At the time of startup, set data concerning a detected current is received at a communication interface, and the received set data is compared with the detected current. A control unit adjusts a current of the phototransistor so that the detected current matches the set data. | 10-03-2013 |
20130248982 | SEMICONDUCTOR DEVICE WITH ENHANCED MOBILITY AND METHOD - In one embodiment, a vertical insulated-gate field effect transistor includes a feature embedded within a control electrode. The feature is placed within the control electrode to induce stress within predetermined regions of the transistor. | 09-26-2013 |
20130244418 | METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT - A method for manufacturing a semiconductor component that includes the use of multiple layers of photoresist. A first layer of electrically conductive material is formed over a substrate and a first layer of photoresist is formed over the first layer of electrically conductive material. A portion of the first layer of photoresist is removed leaving photoresist having sidewalls separated by a gap. A second layer of electrically conductive material having first and second sidewalls is formed in the gap. A second layer of photoresist is formed over the first layer of photoresist and over the second layer of electrically conductive material. Portions of the second layer of photoresist and the first layer of photoresist are removed to uncover the first and second edges of the second layer of electrically conductive material. A protective structure is formed over the first and second edges of the second electrically conductive material. | 09-19-2013 |
20130235700 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING SAME FOR ACOUSTIC SENSING OF CLOSE PROXIMITY OBJECTS - In embodiments a circuit provides a circuit for use in detecting close proximity objects in an acoustic distance sensing system. The circuit produces a close proximity zone flag when the time after transmitting an acoustic distance sensing pulse corresponds to the defined close proximity range. The circuit can also include a time of flight counter for determining the time of flight of a received echo. The circuit can further produce a close proximity time if flight valid flag indicating that echoes are being received in close proximity time frame. | 09-12-2013 |
20130234311 | Semiconductor component that includes a protective structure - In accordance with an embodiment a semiconductor component includes an electrically conductive structure formed over a portion of a semiconductor material. An electrical interconnect having a top surface and opposing edges contacts the electrically conductive structure. A protective structure is formed on the top surface and the opposing edges of the electrical interconnect and over a portion of the electrically conductive structure, wherein the protective structure forms a seal that protects the electrical interconnect. | 09-12-2013 |
20130215537 | GROUND FAULT CIRCUIT INTERRUPTER AND METHOD - A method and circuit for determining a circuit element parameter in a ground fault circuit interrupter circuit. An electrical signal provided to a first node is used to generate another electrical signal at a second node. The electrical signal at the second node is multiplexed with a modulation signal to generate a modulated signal that is then filtered and converted into a digital representation of a portion of the circuit element parameter. The electrical signal at the second node is multiplexed with the modulation signal after it has been phase shifted to produce a modulated signal that is filter and converted into a digital representation of another portion of the circuit element parameter. In another aspect, a slope based solenoid self-test method is used for self-testing in a GFCI circuit. Alternatively, a method for determining a wiring fault is provided using a digital filter. | 08-22-2013 |
20130207583 | VOLTAGE OUTPUT CIRCUIT, LOAD DRIVE CIRCUIT, AND METHOD FOR OUTPUTTING VOLTAGE - A voltage output circuit includes: an oscillator circuit configured to output an oscillation signal while changing an oscillation frequency thereof; and a voltage generating circuit configured to convert a first voltage into a second voltage higher than the first voltage, and output the second voltage, based on the oscillation signal. | 08-15-2013 |
20130194587 | LENS POSITION DETECTING CIRCUIT - A position of a lens is detected by detecting, using a phototransistor, light that is emitted from a photodiode and that varies depending on lens position. A control unit divides a moving range of the lens into a plurality of areas, approximates a relationship between lens positions and current of the phototransistor for each of the areas, corrects a current of the phototransistor using the approximated relationship so as to obtain a corrected detection current having a linear relationship with respect to lens positions, and detects the position of the lens using the obtained corrected detection current. | 08-01-2013 |
20130187029 | PHOTODETECTOR CONTROL CIRCUIT - A photodetector control circuit in a photodetector for detecting light from a photodiode using a phototransistor and controls drive of the photodiode and detection of a current of the phototransistor has a received light amount detecting unit that detects a detection current, which flows through the phototransistor in accordance with a received light amount, by converting the detection current into a detection voltage, and compares the detection voltage with a reference voltage detected during reception of a reference light amount, to thereby detect a change in the received light amount, a diode current control unit for controlling a diode current that is caused to flow through the photodiode, and a control unit that detects a temperature based on a forward drop voltage of the photodiode and estimates a current change rate of the phototransistor based on the detected temperature. | 07-25-2013 |
20130154099 | PAD OVER INTERCONNECT PAD STRUCTURE DESIGN - A design rule checker that performs a maximum pattern density check in a first intermediary metallization layer that underlies a top metallization layer and a pad opening in an integrated circuit. The maximum pattern density check is performed at least under some circumstances if a modulus of the primary metallization material is less than a modulus of a surrounding dielectric material. The maximum pattern density check verifies that the pattern density within the underlying portion is below a maximum pattern density that depends on the thickness of the access pad. A maximum metal width check may also be performed in this portion. | 06-20-2013 |
20130113401 | PWM SIGNAL OUTPUT CIRCUIT - A PWM-signal-output circuit includes a detecting unit to detect time periods during which a speed signal with logic level changing alternately and having a period corresponding to a motor-rotation speed is at one and the other logic levels; a generating unit configured to, when the logic level of the speed signal changes, generate a signal to increase and thereafter decrease a current flowing through a motor coil within a first time period detected by the detecting unit, in a second time period occurring after the first time period; and a second generating unit configured to, when the first time period has elapsed after a change in the logic level of the speed signal but before a subsequent change in the logic level thereof in the second time period, generate the signal from when the first time period has elapsed until when the logic level thereof changes. | 05-09-2013 |
20130083949 | System and method for identification of a peripheral device - A system and method for identification of a peripheral device is provided. A system and method for automatic parameter adjustment of a destination device based on the identification of a peripheral device is provided. | 04-04-2013 |
20130076288 | Motor Control Circuit And Servo Device Provided With The Same - When a servo device receives the frequency setting signal as a control signal through the receiver from the transmitter, it select the information in conformity with the received frequency setting signal among the driving frequency setting information as stored in advance. When the handling signal is input as the control signal by the transmitter, the servo device is configured to transform the difference data taken synchronously with the difference data timing signal from the pulse width comparison part into the selected driving frequency. The servo device is configured to generate the driving signal from the transformed difference data signal of the desired corresponding count value range, and to perform drive control the driving feature. | 03-28-2013 |
20130075866 | SEMICONDUCTOR DEVICE - A PN junction diode is formed by an N+ type buried layer having a proper impurity concentration and a P+ type buried layer. The P+ type buried layer is combined with a P+ type drawing layer to penetrate an N− type epitaxial layer and be connected to an anode electrode. An N+ type diffusion layer and a P+ type diffusion layer connected to and surrounding the N+ type diffusion layer are formed in the N− type epitaxial layer surrounded by the P+ type buried layer etc. The N+ type diffusion layer and the P+ type diffusion layer are connected to a cathode electrode. An ESD protection element is formed by the PN junction diode and a parasitic PNP bipolar transistor which uses the P+ type diffusion layer as the emitter, the N− type epitaxial layer as the base, and the P+ type drawing layer etc as the collector. | 03-28-2013 |
20130075865 | SEMICONDUCTOR DEVICE - An ESD protection element is formed by a PN junction diode including an N+ type buried layer having a proper impurity concentration and a first P+ type buried layer and a parasitic PNP bipolar transistor which uses a second P+ type buried layer connected to a P+ type diffusion layer as the emitter, an N− type epitaxial layer as the base, and the first P+ type buried layer as the collector. The first P+ type buried layer is connected to an anode electrode, and the P+ type diffusion layer and an N+ type diffusion layer surrounding the P+ type diffusion layer are connected to a cathode electrode. When a large positive static electricity is applied to the cathode electrode, and the parasitic PNP bipolar transistor turns on to flow a large discharge current. | 03-28-2013 |
20130075864 | SEMICONDUCTOR DEVICE - An ESD protection element is formed by a PN junction diode including an N+ type buried layer having a proper impurity concentration and a P+ type buried layer and a parasitic PNP bipolar transistor which uses a P+ type drawing layer connected to a P+ type diffusion layer as the emitter, an N− type epitaxial layer as the base, and a P type semiconductor substrate as the collector. The P+ type buried layer is connected to an anode electrode, and the P+ type diffusion layer and an N+ type diffusion layer connected to and surrounding the P+ type diffusion layer are connected to a cathode electrode. When a large positive static electricity is applied to the cathode electrode, the parasitic PNP bipolar transistor turns on to flow a large discharge current. | 03-28-2013 |
20130069702 | PWM SIGNAL OUTPUT CIRCUIT - A PWM-signal-output circuit includes a first output unit to output a PWM signal with a first duty cycle, in a first period in which a motor starts rotating, a second output unit to output the PWM signal whose duty cycle increases toward a second duty cycle and decreases from the second duty cycle in a period from a logic level change in speed signal until its subsequent logic level change, in a second period following the first, the speed signal having a period corresponding to a motor-rotation speed and a logic level changing alternately, and a third output unit to output the PWM signal whose duty cycle increases toward that of the input signal and thereafter decreases from that of the input signal in a period from a logic level change in the speed signal until its subsequent logic level change, after the second period elapses. | 03-21-2013 |
20130069580 | PWM SIGNAL OUTPUT CIRCUIT - A PWM-signal-output circuit includes a detecting unit to detect periods in which a speed signal with logic level changing alternately and having a period corresponding to a motor-rotation speed is at one and the other logic levels, a dividing unit to divide each of the periods into first to third periods; a first output unit to change a PWM-signal duty-cycle in a stepwise manner toward an input-signal duty-cycle in the first period, a second output unit to cause a PWM-signal duty-cycle to become equal to an input-signal duty-cycle, to maintain a current flowing through the motor coil constant, in the second period; and a third output unit to change a PWM-signal duty-cycle in a stepwise manner from an input-signal duty-cycle, to decrease a current flowing through the motor coil, in the third period. | 03-21-2013 |
20130051581 | AUDIO SIGNAL PROCESSING CIRCUIT - An audio signal processing circuit includes: a first low-pass filter configured to pass a component whose frequency is in a band lower than a lowest reproducible frequency of a speaker out of an audio signal inputted for reproduction by the speaker; a first high-pass filter substantially similar in phase characteristics to the first low-pass filter configured to pass a component whose frequency is in a band higher than the lowest reproducible frequency of the speaker out of the audio signal inputted for reproduction by the speaker; a harmonic generation unit configured to generate a harmonic from the audio signal having passed through the first low-pass filter; and a first addition unit configured to add the audio signal according to an output of the harmonic generation unit to the audio signal according to an output of the first high-pass filter. | 02-28-2013 |
20130039505 | AUDIO SIGNAL PROCESSING CIRCUIT - An audio-signal-processing circuit includes: a noise-detecting unit to detect presence or absence of noise in an audio signal generated based on an output from a tuner configured to receive a broadcast signal; a low-pass filter, having predetermined phase characteristics, to pass the audio signal having a band of frequencies lower than a predetermined frequency; a high-pass filter, having the predetermined phase characteristics, to pass the audio signal having a band of frequencies higher than the predetermined frequency; first- and second-output units to multiply the signals outputted from the low-pass and high-pass filters by first and second coefficients and output the multiplied signals, respectively; an adding unit to add the signals respectively outputted from the first and the second output units; and a coefficient control unit to, when the noise-detecting unit has detected the presence of noise, decrease the second coefficient below the first coefficient. | 02-14-2013 |
20130038805 | LIQUID CRYSTAL DRIVING CIRCUIT - A liquid-crystal-driving circuit includes: resistors connected in series between first and second potentials lower than the first potential; one or more voltage follower circuits to impedance-convert one or more intermediate potentials between the first and second potentials, to be outputted, respectively, the intermediate potentials generated at one or more connection points between the resistors, respectively; a common-signal-output circuit to supply common signals to common electrodes of a liquid crystal panel, respectively, the common signals being at the first, second, or one or more intermediate potentials in a predetermined order; and a segment-signal output circuit supplies segment signals to segment electrodes of the liquid crystal panel, respectively, the segment signals being at the first and second potentials, or the intermediate potentials according to the common signals, wherein the segment-signal output circuit increases impedances of the segment signals only for a first period when the of segment signals potentials are switched. | 02-14-2013 |
20130038229 | LIGHT-EMITTING DEVICE CONTROL CIRCUIT - In a control circuit for a light-emitting device, a reference voltage generation circuit detects a full-wave rectified voltage and generates a first voltage as well as generating a second voltage by converting the rectified voltage into a DC voltage. A voltage corresponding to a difference between the first voltage and the second voltage or a voltage corresponding to a ratio of the first voltage to the second voltage is generated as a reference voltage by a subtraction circuit or by a division circuit, respectively. As a result, a change in amplitude of the reference voltage can be suppressed when amplitude of the rectified voltage is varied due to a variation in an AC input voltage supplied from an AC power supply. | 02-14-2013 |
20130020974 | SINGLE-PHASE BRUSHLESS MOTOR DRIVE CIRCUIT - A driving circuit for a single-phase brushless motor includes: a driving-signal-generating circuit to generate a driving signal for supplying first and second driving currents to a driving coil of the single-phase brushless motor in an alternate manner with a de-energized period therebetween; an output circuit to supply the first or the second driving current to the driving coil in response to the driving signal; and a zero-cross detecting circuit to detect a zero cross of an induced voltage, generated across the driving coil, during the de-energized period, wherein the driving-signal-generating circuit determines a length of a subsequent energized period, based on a driving cycle from a start of an energized period to a time when the zero-cross detecting circuit detects the zero cross, and the zero-cross-detecting circuit starts detection of the zero-cross after a predetermined time period has elapsed from a start of the de-energized period. | 01-24-2013 |
20130009690 | H BRIDGE DRIVER CIRCUIT - A PWM mode for turning on and off two output transistors by an output of a high impedance circuit and a constant voltage mode for controlling voltages at two output terminals by an output of an op amp are provided. Then, the two modes are switched by a switching signal. | 01-10-2013 |
20130009582 | SINGLE-PHASE BRUSHLESS MOTOR DRIVE CIRCUIT - A driving circuit for a single-phase-brushless motor, includes: a driving-signal-generating circuit to generate a driving signal for supplying, to a driving coil of the single-phase-brushless motor, first- and second-driving currents, alternately with a de-energized period therebetween during which neither of the first or the second driving current is supplied to the driving coil; an output circuit to supply the first or the second driving current to the driving coil in response to the driving signal; and a zero-cross detecting circuit to detect a zero cross of an induced voltage, generated across the driving coil, during the de-energized period, wherein the driving-signal-generating circuit determines a length of a subsequent energized period based on a driving cycle from a start of an energized period, during which the output circuit supplies the first or the second driving current to the driving coil, to a time when the zero-cross-detecting circuit detects the zero cross. | 01-10-2013 |
20130002345 | ADAPTIVE FILTER - An adaptive filter includes: a filter configured to perform a filtering process for an input signal with a filter coefficient set therein, and output the processed input signal as an output signal; a calculating unit configured to calculate a value indicative of an error between an amplitude of the output signal and a reference amplitude; an output unit configured to output a first constant as a parameter when the amplitude of the output signal is greater than the predetermined amplitude, the parameter used when updating the filter coefficient, and output a second constant as the parameter when the amplitude of the output signal is smaller than the predetermined amplitude; and an updating unit configured to update the filter coefficient with an update amount corresponding to the parameter and the value indicative of the error, such that the error is reduced. | 01-03-2013 |