Interuniversitair Microelektronica Centrum (IMEC) Patent applications |
Patent application number | Title | Published |
20130043132 | MANIPULATION OF MAGNETIC OR MAGNETIZABLE OBJECTS USING COMBINED MAGNETOPHORESIS AND DIELECTROPHORESIS - A device for manipulating magnetic or magnetizable objects in a medium is provided. The device has a surface lying in a plane and comprises a set of at least two conductors electrically isolated from each other, wherein the at least two conductors are adapted for both generating a magnetophoresis force for moving the magnetic or magnetizable objects over the surface of the device in a direction substantially parallel to the plane of the surface, and generating a dielectrophoresis force for moving the magnetic or magnetizable objects in a direction substantially perpendicular to the plane of the surface. Also provided is a method for manipulating magnetic or magnetizable objects in a medium. The method uses a combined magnetophoresis and dielectrophoresis actuation principle for controlling in-plane as well as out-of-plane movement of the magnetic or magnetizable objects. | 02-21-2013 |
20120279837 | METHOD FOR REDUCING SUBSTRATE CHARGING - An electrostatically actuatable micro electromechanical device is provided with enhanced reliability and lifetime. The electrostatically actuatable micro electromechanical device comprises: a substrate, a first conductor fixed to the top layer of the substrate, forming a fixed electrode, a second conductor fixed to the top layer of the substrate, and a substrate area. The second conductor is electrically isolated from the first conductor and comprises a moveable portion, suspended at a predetermined distance above the first conductor, the moveable portion forming a moveable electrode which approaches the fixed electrode upon applying an actuation voltage between the first and second conductors. The selected substrate surface area is defined as the orthogonal projection of the moveable portion on the substrate between the first and second conductors. In the substrate surface area at least one recess is provided in at least the top layer of the substrate. | 11-08-2012 |
20110311227 | Systems and Methods for Transferring Single-Ended Burst Signal Onto Differential Lines, Especially for Use in Burst-Mode Receiver - Systems and methods for transferring incoming single-ended burst signals of which at least one characteristic varies widely from burst to burst onto a pair of differential lines. The systems comprise an input for receiving an incoming burst signal, a signal adaptation block for adapting said widely varying characteristic and a single-ended-to-differential converter. In a first aspect a reset signal for resetting a settings determination block, which controls the signal adaptation block, is sent backwards over the differential lines, preferably using a common-mode signal. In a second aspect, a status freezing mechanism is employed for freezing the settings of the settings determination block after the end of the preamble of an incoming burst. | 12-22-2011 |
20110309457 | Method for Forming a Notched Gate Insulator for Advanced MIS Semiconductor Devices and Devices Thus Obtained - Methods of providing a semiconductor device with a control electrode structure having a controlled overlap between control electrode and first and second main electrode extensions without many spacers are disclosed. A preferred method provides a step of etching back an insulating layer performed after amorphizing and implanting the main electrode extensions. Preferably, the step that amorphizes the extensions also partly amorphizes the insulating layer. Because etch rates of amorphous insulator and crystalline insulator differ, the amorphized portion of the insulating layer may serve as a natural etch stop to enable even better fine-tuning of the overlap. Corresponding semiconductor devices are also provided. | 12-22-2011 |
20110230172 | METHOD FOR OPERATING A COMBINED MULTIMEDIA-TELECOM SYSTEM - Presented is a method of managing the operation of a system including a processing subsystem configured to run a multimedia application and a telecommunication subsystem. The method includes determining telecom environment conditions, and selecting a working point from a plurality of predetermined working points. The selecting is based at least in part on the determined environmental conditions. The method also includes setting control parameters in the multimedia application and/or the telecommunication subsystem to configure the system to operate at the selected working point, and operating the system at the selected working point. | 09-22-2011 |
20110026921 | Systems and Methods for Transferring Single-Ended Burst Signal Onto Differential Lines, Especially for Use in Burst-Mode Receiver - Systems and methods for transferring incoming single-ended burst signals of which at least one characteristic varies widely from burst to burst onto a pair of differential lines. The systems comprise an input for receiving an incoming burst signal, a signal adaptation block for adapting said widely varying characteristic and a single-ended-to-differential converter. In a first aspect a reset signal for resetting a settings determination block, which controls the signal adaptation block, is sent backwards over the differential lines, preferably using a common-mode signal. In a second aspect, a status freezing mechanism is employed for freezing the settings of the settings determination block after the end of the preamble of an incoming burst. | 02-03-2011 |
20100285656 | FORMATION OF METAL-CONTAINING NANO-PARTICLES FOR USE AS CATALYSTS FOR CARBON NANOTUBE SYNTHESIS - The present invention relates to a method for forming metal-silicide catalyst nanoparticles with controllable diameter. The method according to embodiments of the invention leads to the formation of ‘active’ metal-suicide catalyst nanoparticles, with which is meant that they are suitable to be used as a catalyst in carbon nanotube growth. The nano-particles are formed on the surface of a substrate or in case the substrate is a porous substrate within the surface of the inner pores of a substrate. The metal-silicide nanoparticles can be Co-silicide, Ni-silicide or Fe-silicide particles. The present invention relates also to a method to form carbon nanotubes (CNT) on metal-silicide nanoparticles, the metal-silicide containing particles hereby acting as catalyst during the growth process, e.g. during the chemical vapour deposition (CVD) process. Starting from very defined metal-containing nanoparticles as catalysts, the diameter of grown CNT can be well controlled and a homogeneous set of CNT will be obtained. | 11-11-2010 |
20100225369 | Devices Comprising Delay Line for Applying Variable Delay to Clock Signal - The disclosure relates to a device comprising at least one delay line for applying a variable delay to a clock signal and a controller for controlling the variable delay of the delay line. Each delay line comprises a plurality of concatenated delay banks which provide different delay values with respect to each other, a bypass parallel over each of said the delay banks, and switching elements associated with each of the delay banks for selecting either the respective delay bank or the respective bypass. Each of the delay banks is provided with a delay bank status indicator for indicating propagation of the clock signal through the delay bank towards the controller. The controller is provided for taking the indicated propagation of the clock signal into account upon setting said switching elements. Devices according to this disclosure are, amongst other uses, suited for use in Ultra Wide Band (UWB) receiving or transmitting devices, in particular those devices, designed for low power consumption, by enabling power on and off switching of parts of such devices as analog to digital converters and integrators, during timing windows. | 09-09-2010 |
20100164487 | Method for Ultra-Fast Controlling of a Magnetic Cell and Related Devices - The present invention relates to a device and corresponding method for ultrafast controlling of the magnetization of a magnetic element. A device ( | 07-01-2010 |
20100127233 | METHOD FOR CONTROLLED FORMATION OF THE RESISTIVE SWITCHING MATERIAL IN A RESISTIVE SWITCHING DEVICE AND DEVICE OBTAINED THEREOF - The present disclosure provides a method for controlled formation of the resistive switching layer in a resistive switching device. The method comprises providing a substrate ( | 05-27-2010 |
20100096618 | DOPING OF NANOSTRUCTURES - A catalyst particle for use in growth of elongated nanostructures, such as e.g. nanowires, is provided. The catalyst particle comprises a catalyst compound for catalyzing growth of an elongated nanostructure comprising a nanostructure material without substantially dissolving in the nanostructure material and at least one dopant element for doping the elongated nanostructure during growth by substantially completely dissolving in the nanostructure material. A method for forming an elongated nanostructure, e.g. nanowire, on a substrate using the catalyst particle is also provided. The method allows controlling dopant concentration in the elongated nanostructures, e.g. nanowires, and allows elongated nanostructures with a low dopant concentration of lower than 10 | 04-22-2010 |
20100090251 | SURFACE TREATMENT AND PASSIVATION OF AIGaN/GaN HEMT - In the preferred embodiments, a method to reduce gate leakage and dispersion of group III-nitride field effect devices covered with a thin in-situ SiN layer is provided. This can be obtained by introducing a second passivation layer on top of the in-situ SiN-layer, in combination with cleaning of the in-situ SiN before gate deposition and before deposition of the second passivation layer. | 04-15-2010 |
20100090192 | METHOD FOR CONTROLLED FORMATION OF THE RESISTIVE SWITCHING MATERIAL IN A RESISTIVE SWITCHING DEVICE AND DEVICE OBTAINED THEREOF - For improved scalability of resistive switching memories, a cross-point resistive switching structure is disclosed wherein the plug itself is used to store the resistive switching material and where the top electrode layer is self-aligned to the plug using, for example, chemical-mechanical-polishing (CMP) or simply mechanical-polishing. | 04-15-2010 |
20100032812 | Method for forming silicon germanium layers at low temperatures, layers formed therewith and structures comprising such layers - A method is provided for controlling the average stress and the strain gradient in structural silicon germanium layers as used in micromachined devices. The method comprises depositing a single silicon germanium layer on a substrate and annealing a predetermined part of the deposited silicon germanium layer. The process parameters of the depositing and/or annealing steps are selected such that a predetermined average stress and a predetermined strain gradient are obtained in the predetermined part of the silicon germanium layer. Preferably a plasma assisted deposition technique is used for depositing the silicon germanium layer, and a pulsed excimer laser is used for local annealing, with a limited thermal penetration depth. Structural silicon germanium layers for surface micromachined structures can be formed at temperatures substantially below 400° C., which offers the possibility of post-processing micromachined structures on top of a substrate comprising electronic circuitry such as CMOS circuitry. Such structural silicon germanium layers may be also be formed at temperatures not exceeding 210° C., which allows the integration of silicon germanium based micromachined structures on substrates such as polymer films. | 02-11-2010 |
20090325424 | Connecting Scheme for Orthogonal Assembly of Microstructures - In the present disclosure a device for sensing and/or actuation purposes is presented in which microstructures ( | 12-31-2009 |
20090308456 | Photovoltaic Structures and Method to Produce the Same - The present disclosure relates to the field of organic optoelectronics. More particularly, the present disclosure relates to photovoltaic structures and to methods to produce the same. One aspect of the disclosure is a photovoltaic structure comprising:
| 12-17-2009 |
20090270575 | METHOD OF PREPARING DERIVATIVES OF POLYARYLENE VINYLENE AND METHOD OF PREPARING AN ELECTRONIC DEVICE INCLUDING SAME - A technique is described for the preparation of polymers according to a process in which the starting compound of formula (I) is polymerized in the presence of a base in an organic solvent. No end chain controlling agents are required during the polymerisation to obtain soluble precursor polymers. The precursor polymer such obtained comprises structural units of the formula (II). In a next step, the precursor polymer (II) is subjected to a conversion reaction towards a soluble or insoluble conjugated polymer by thermal treatment. The arylene or heteroarylene polymer comprises structural units of the formula III. In this process the dithiocarbamate group acts as a leaving group and permits the formation of a precursor polymer of structural formula (II), which has an average molecular weight from 5000 to 1000000 Dalton and is soluble in common organic solvents. The precursor polymer with structural units of formula (II) is thermally converted to the conjugated polymer with structural formula (III). | 10-29-2009 |
20090262043 | Self-Actuating RF MEMS Device by RF Power Actuation - Systems and methods for controlling a micro electromechanical device using power actuation are disclosed. The disclosed micro electromechanical systems comprise at least one electrostatically actuatable micro electromechanical device and an actuation device. The micro electromechanical device comprises a first conductor and a second conductor having a moveable portion which in use may be attracted by the first conductor as a result of a predetermined actuation power. The actuation device comprises a high frequency signal generator for generating at least part of the actuation power by means of a predetermined high frequency signal with a frequency higher than the mechanical resonance frequency of the moveable portion of the micro electromechanical device. | 10-22-2009 |
20090250433 | SLURRY COMPOSITION AND METHOD FOR CHEMICAL MECHANICAL POLISHING OF COPPER INTEGRATED WITH TUNGSTEN BASED BARRIER METALS - The present invention is related to a slurry composition for polishing copper integrated with tungsten containing barrier layers and its use in a CMP method. The present invention is also related to a method for polishing copper integrated with tungsten containing barrier layers by means of an aqueous solution containing abrasive particles, an inorganic acid such as HNO | 10-08-2009 |
20090221446 | Polymer Replicated Interdigitated Electrode Array for (Bio) Sensing Applications - Interdigitated electrode arrays are very promising devices for multi-parameter (bio)sensing, for example the label-free detection of nucleic acid hybridisation for diagnostic applications. The current disclosure provides an innovative method for the affordable manufacturing of polymer-based arrays of interdigitated electrodes with μm-dimensions. The method is based on a combination of an appropriate three-dimensional structure and a single and directional deposition of conductive material. The three-dimensional structure can be realized in a polymer material using a moulding step, for which the moulds are manufactured by electroplating as a reverse copy of a silicon master structure. In order to ensure sufficient electrical isolation and individual, but convenient, accessibility of the sensors in the array, the interdigitated electrode regions need to be complemented with specific features on the three-dimensional structure. Combined with the use of e.g. shadow masks in the deposition step, these features allow for the site-specific deposition of the conductive material. The technology described has the additional advantage to integrate highly miniaturized and arrayed electronics elements into polymer micro-fluidics technology, which leads to the affordable manufacturing of (bio)sensor arrays. | 09-03-2009 |
20090195424 | A/D Converter Comprising a Voltage Comparator Device - The present invention is related to an analogue-to-digital (A/D) converter comprising at least two voltage comparator devices. Each of the voltage comparator devices is arranged for being fed with a same input signal and for generating an own internal voltage reference. The two internal voltage references are different. Each voltage comparator is arranged for generating an output signal indicative of a bit position of a digital approximation of said input signal. | 08-06-2009 |
20090195319 | Large Time Constant Steering Circuit and Instrumentation Amplifier Implementing Same - The present invention relates to a large time constant steering circuit for slowly changing a voltage on a node between at least two discrete voltage levels. The present invention further relates to a slow steering current DAC comprising said large time constant steering circuit. The present invention further relates to an instrumentation amplifier device comprising a current balancing instrumentation amplifier for amplifying an input signal to an amplified output signal and a DC servo-loop for removing a DC-component from the input signal. The present invention further relates to an EEG acquisition ASIC comprising said instrumentation amplifier device. | 08-06-2009 |
20090187756 | SYSTEM AND METHOD FOR HARDWARE-SOFTWARE MULTITASKING ON A RECONFIGURABLE COMPUTING PLATFORM - A platform supporting reconfigurable computing, enabling the introduction of reconfigurable hardware into portable devices is described. Dynamic hardware/software multitasking methods for a reconfigurable computing platform including reconfigurable hardware devices such as gate arrays, especially FPGA's, and software, such as dedicated hardware/software operating systems and middleware, adapted for supporting the methods, especially multitasking, are described. A computing platform, which is a heterogeneous multi-processor platform, containing one or more instruction set processors (ISP) and a reconfigurable matrix (for instance a gate array, especially an FPGA), adapted for (dynamic) hardware/software multitasking is described. | 07-23-2009 |
20090183767 | METHOD OF PREPARING DERIVATIVES OF POLYARYLENE VINYLENE AND METHOD OF PREPARING AN ELECTRONIC DEVICE INCLUDING SAME - A technique is described for the preparation of polymers according to a process in which the starting compound of formula (I) is polymerized in the presence of a base in an organic solvent. No end chain controlling agents are required during the polymerisation to obtain soluble precursor polymers. The precursor polymer such obtained comprises structural units of the formula (II). In a next step, the precursor polymer (II) is subjected to a conversion reaction towards a soluble or insoluble conjugated polymer by thermal treatment. The arylene or heteroarylene polymer comprises structural units of the formula III. In this process the dithiocarbamate group acts as a leaving group and permits the formation of a precursor polymer of structural formula (II), which has an average molecular weight from 5000 to 1000000 Dalton and is soluble in common organic solvents. The precursor polymer with structural units of formula (II) is thermally converted to the conjugated polymer with structural formula (III). | 07-23-2009 |
20090166715 | Scalable Interpoly Dielectric Stacks With Improved Immunity To Program Saturation - A method for manufacturing a non-volatile memory device is described. The method comprises growing a layer in a siliconoxide consuming material, e.g. DyScO, on top of the upper layer of the layer where charge is stored. A non-volatile memory device is also described. In the non-volatile memory device, the interpoly/blocking dielectric comprises a layer in a siliconoxide consuming material, e.g. DyScO, on top of the upper layer of the layer where charge is stored, the siliconoxide consuming material having consumed at least part of the upper layer. | 07-02-2009 |
20090140317 | Multiple Layer floating gate non-volatile memory device - The disclosed systems and methods relate to floating gate non-volatile memory cells, with a floating gate comprising at least two layers constructed in different conductive or semiconductive materials. At least two of the layers of the floating gate are separated by an intermediate dielectric layer having a predetermined thickness enabling direct tunneling current between the layers | 06-04-2009 |
20090131245 | CONTROLLED AND SELECTIVE FORMATION OF CATALYST NANAOPARTICLES - A method for forming catalyst nanoparticles on a substrate and a method for forming elongate nanostructures on a substrate using the nanoparticles as a catalyst are provided. The methods may advantageously be used in, for example, semiconductor processing. The methods are scalable and fully compatible with existing semiconductor processing technology. Furthermore, the methods allow forming catalyst particles and elongate nanostructures at predetermined locations on a substrate. | 05-21-2009 |
20090129281 | QUALITY-ENERGY SCALABILITY TECHNIQUE FOR TRACKING SYSTEMS - A method of managing the operation of a system is presented. The system includes a processing subsystem configured to run a multimedia application and a telecommunication subsystem. The method includes determining telecom environment conditions, and selecting a configuration from a plurality of configurations. The selecting is based at least in part on the determined environmental conditions. The method also includes setting control parameters such as channel speed in the multimedia application and/or the telecommunication subsystem to cause the system to operate at the selected configuration, and operating the system at the selected configuration. The configuration are determined by simultaneously updating control parameters by a controller of both the multimedia application and the telecommunication subsystem. | 05-21-2009 |
20090117750 | Methods of Forming a Semiconductor Device - The present disclosure relates to methods for forming a high-k gate dielectric, the methods comprising the steps of providing a semiconductor substrate, cleaning the substrate, performing a thermal treatment, and performing a high-k dielectric material deposition, wherein said thermal treatment step is performed in a non-oxidizing ambient, leading to the formation of a thin interfacial layer between said semiconductor substrate and said high-k dielectric material and wherein the thickness of said thin interfacial layer is less than 10 Å. | 05-07-2009 |
20090091011 | SEMICONDUCTOR DEVICE HAVING INTERCONNECTED CONTACT GROUPS - The present invention is related to a method of producing a semiconductor device and the resulting device. The method is suitable in the first place for producing high power devices, such as High Electron Mobility Transistors (HEMT), in particular HEMT-devices with multiples source-gate-drain groups or multiple base bipolar transistors. According to the method, the interconnect between the source contacts is not produced by air bridge structures, but by etching vias through the semiconductor layer directly to the ohmic contacts and applying a contact layer on the backside of the device. | 04-09-2009 |
20090073621 | Fast Triggering ESD Protection Device and Method for Designing Same - A method and apparatus for designing an ESD protection circuit comprising a main ESD device and a triggering device connected to a triggering node of the main ESD device by means of which the main ESD device can be triggered for conducting ESD current at a reduced voltage. The triggering device is located in an initial current path for the ESD current. In this initial current path, there is at least one triggering component which can be triggered from an off-state to an on-state. The triggering speed of this component is considered and its design is optimised in view of increasing its triggering speed. Further shown is an ESD protection circuit in which at least one triggering component is selected to be of a predetermined type for achieving a fast triggering speed, preferably of the gated diode type. | 03-19-2009 |
20090050982 | Method for Modulating the Effective Work Function - A new MOSFET device is described comprising a metal gate electrode, a gate dielectric and an interfacial layer. The interfacial layer comprises a lanthanum hafnium oxide material for modulating the effective work function of the metal gate. The gate dielectric material in contact with the interfacial layer is different that the interfacial layer material. A method for its manufacture is also provided and its applications. | 02-26-2009 |
20090035597 | FUNCTIONALIZATION OF POLY(ARYLENEVINYLENE) POLYMERS FOR INTEGRATED CIRCUITS - A method is provided for modifying a poly(arylene vinylene) or poly(heteroarylene vinylene) precursor polymer having dithiocarbamate moieties by reacting it with an acid and further optionally reacting the acid-modified polymer with a nucleophilic agent. Also provided are novel polymers and copolymers bearing nucleophilic side groups which are useful as components of electronic devices, e.g. in the form of thin layers. | 02-05-2009 |
20090032811 | FUNCTIONALIZATION OF POLY(ARYLENE-VINYLENE) POLYMERS FOR ELECTRONIC DEVICES - A method is provided for modifying a poly(arylene vinylene) or poly(heteroarylene vinylene) precursor polymer having dithiocarbamate moieties by reacting it with an acid and further optionally reacting the acid-modified polymer with a nucleophillic agent. Also provided are novel polymers and copolymers bearing nucleophillic side groups which are useful as components of electronic devices, e.g. in the form of thin layers. | 02-05-2009 |
20090027681 | Method for determining an analyte in a sample - In one aspect of the invention, a method or apparatus is described for determining concentration(s) of one or more analytes in a sample using plasmonic excitations. In another aspect, a method relates to designing systems for such concentration determination, wherein metallic nanostructures are used in combination with local electrical detection of such plasmon resonances via a semiconducting photodetector. In certain aspects, the method exploits the coupling of said metallic nanostructure(s) to a semiconducting photodetector, said detector being placed in the “metallic structure's” near field. Surface plasmon excitation can be transduced efficiently into an electrical signal through absorption of light that is evanescently coupled or scattered in a semiconductor volume. This local detection technique allows the construction of sensitive nanoscale bioprobes and arrays thereof. | 01-29-2009 |
20090027063 | Method for Calibrating an Electrostatic Discharge Tester - The present disclosure relates to a method for calibrating transient behaviour of an electrostatic discharge (ESD) test system. The system includes an ESD pulse generator and probe needles for applying a predetermined pulse on a device under test. The probe needles are connected to the ESD pulse generator via conductors. The test system includes measurement equipment for detecting transient behaviour of the device under test by simultaneously capturing voltage and current waveforms the device as a result of the pulse. The method comprises the steps of: (a) applying the ESD test system on a first known system with a first known impedance, (b) applying the ESD test system on a second known system with a known second impedance, and (c) determining calibration data for the transient behaviour the ESD test system on the basis of captured voltage and current waveforms, taking into account said known first and second impedances. In preferred embodiments the waveforms are transferred to the frequency domain for correlation. | 01-29-2009 |
20090019847 | Stepping Actuator and Method of Fabrication - The current invention provides a stepping actuator, achieving large range up to ±35 μm with low operating voltages of 15V or lower and large output forces of up to ±110 μN. The actuator has an in-plane-angular deflection conversion which allows achieving step sizes varying from few nanometers to few micrometers with a minor change in the design. According to certain embodiments of the invention, the stepping actuator comprises a geometrical structure with a displacement magnification ratio of between 0.15 and 2 at operating voltages of 15V or lower. The present invention also provides a method for forming such stepping actuators. | 01-22-2009 |
20090016340 | System with Distributed Analogue Resources - The present disclosure relates to a system comprising at least a first and a second essentially analogue portion and an essentially digital portion, the analogue portions forming a part of a unidirectional circular network. First communication means is provided between the digital portion and the first analogue portion. Second communication means is provided between the first and second analogue portions. The first and second communication means are configurable for establishing communication between the digital portion and the second analogue portion. The first and second communication means are arranged to determine if a packet communicated over the first or second communication means is of interest for any of the analogue portions. | 01-15-2009 |
20090012759 | METHOD AND APPARATUS FOR SIMULATION PHYSICAL FIELDS - In order to design on-chip interconnect structures in a flexible way, a CAD approach is advocated in three dimensions, describing high frequency effects such as current redistribution due to the skin-effect or eddy currents and the occurrence of slow-wave modes. The electromagnetic environment is described by a scalar electric potential and a magnetic vector potential. These potentials are not uniquely defined, and in order to obtain a consistent discretization scheme, a gauge-transformation field is introduced. The displacement current is taken into account to describe current redistribution and a small-signal analysis solution scheme is proposed based upon existing techniques for static fields in semiconductors. In addition methods and apparatus for refining the mesh used for numerical analysis is described. | 01-08-2009 |
20090004975 | Electrical device comprising analog frequency conversion circuitry and method for delivering characteristics thereof - An electrical device comprises analog conversion circuitry having an input and an output. The electrical device is essentially provided for converting a first input signal within a first frequency range applied to the input to a first output signal within a second frequency range different from the first frequency range at the output. The electrical device further comprises a signal adding means for adding at least a portion of the first output signal as second input signal to the first input signal. The analog conversion circuitry is also capable of converting the second input signal, which is within the second frequency range, back to the first frequency range. Additionally, a characteristic deriving means is provided for deriving at least one characteristic of the electrical device from the frequency converted second input signal, which appears at the output of the analog conversion circuitry. | 01-01-2009 |
20090004685 | Interface Device and Method for Using the Same - The present disclosure is related to an interface device for providing access to a network to be monitored. The interface device includes a plurality of elements, the elements being sensors and/or actuators. A selection means is provided for selecting a subset of elements among the plurality of elements, each element of the subset being arranged for outputting and/or receiving a signal. A local memory is provided for storing the subset. | 01-01-2009 |
20090002212 | Digital-to-Analogue Converter System with Increased Performance - The invention relates to an N-bit digital-to-analogue converter (DAC) system, comprising—a DAC unit comprising an N-bit master DAC and a slave DAC, yielding a master DAC unit output signal and a slave DAC unit output signal, respectively, said N-bit master DAC having an output step size,—an adder unit combining the master DAC unit output signal and the slave DAC unit output signal, and—a means for storing correction values for at least the master DAC, said correction values being used by the slave DAC, whereby the DAC system is arranged for master DAC output corrections with a size in absolute value higher than half of the output step size. | 01-01-2009 |
20090001483 | Method for Forming a Nickelsilicide FUSI Gate | 01-01-2009 |
20080319298 | CMOS Compatible Microneedle Structures - The present invention provides an electronic device for sensing and/or actuating, the electronic device comprising at least one microneedle ( | 12-25-2008 |
20080310456 | Communication System over a Power Line Distribution Network - The present disclosure provides a system for receiving signals over a power line distribution. Typically, problems of noise and interference are being solved at the receiver side. Systems of the present disclosure, however, are not limited to the receiver-side solution. Systems according to the present disclosure may also be used at the transmitter side. The receiver comprises a high pass filter, a preselect crossover filter, and an analog front-end receiver architecture. | 12-18-2008 |
20080308881 | Method for Controlled Formation of a Gate Dielectric Stack - The present disclosure relates to methods for forming a gate stack in a MOSFET device and to MOSFET devices obtainable through such methods. In exemplary methods described herein, a rare-earth-containing layer is deposited on a layer of a silicon-containing dielectric material. Before these layers are annealed, a gate electrode material is deposited on the rare-earth-containing layer. Annealing is performed after the deposition of the gate electrode material, such that a rare earth silicate layer is formed. | 12-18-2008 |
20080276960 | Method and Apparatus for Controlled Transient Cavitation - The invention relates to a method for creating transient cavitation comprising the steps of creating gas bubbles having a range of bubble sizes in a liquid, creating an acoustic field and subjecting the liquid to the acoustic field, characterized in that the range of bubble sizes and/or the characteristics of the acoustic field are selected to tune them to each other, thereby controlling transient cavitation in the selected range of bubble sizes. It also relates to an apparatus suitable for performing the method according to the invention. | 11-13-2008 |
20080268622 | METHOD FOR MANUFACTURING A CRYSTALLINE SILICON LAYER - A method of forming a crystalline silicon layer on a microrough face of a substrate by reducing the microroughness of the face and then performing a metal induced crystallization process on the face is disclosed. The method further comprises, after metal induced crystallization and before removing the metal layer, removing silicon islands using the metal layer as a mask. | 10-30-2008 |
20080254605 | METHOD OF REDUCING THE INTERFACIAL OXIDE THICKNESS - One inventive aspect is related to a method of minimizing the final thickness of an interfacial oxide layer between a semiconductor material and a high dielectric constant material. The method comprises depositing a covering layer on the high dielectric constant material. The method further comprises removing adsorbed/absorbed water from the high dielectric constant material prior to depositing the covering layer. The removal of adsorbed/absorbed water is preferably done by a degas treatment. The covering layer may be a gate electrode or a spacer dielectric. | 10-16-2008 |
20080241499 | Method for treating a damaged porous dielectric - In the manufacture of electronic devices that use porous dielectric materials, the properties of the dielectric in a pristine state can be altered by various processing steps. In a method for restoring and preserving the pristine properties of a porous dielectric layer, a substrate is provided with a layer of processed porous dielectric on top, whereby the processed porous dielectric is at least partially exposed. A thin aqueous film is formed at least on the exposed parts of the processed porous dielectric. The exposed porous dielectric with the aqueous film is exposed to an ambient containing a mixture comprising at least one silylation agent and dense CO | 10-02-2008 |
20080224312 | DEVICE HAVING A BONDING STRUCTURE FOR TWO ELEMENTS - A device and a method for bonding elements are described. A first solder ball is produced on a main surface of a first element. A second solder ball is produced on a main surface of a second element. Contact is provided between the first solder ball and the second solder ball. The first and second elements are bonded by applying a reflow act whereby the solder balls melt and form a joined solder ball structure. Prior to the bonding, the first solder ball is laterally embedded in a first layer of non-conductive material and the second solder ball is laterally embedded in a second layer of non-conductive material, such that the upper part of the first solder ball and upper part of the second solder ball are not covered by the non-conductive material. A third solder volume is applied on one or both of the embedded first or second solder balls, prior to the bonding. | 09-18-2008 |
20080219080 | Memory Device with Reduced Standby Power Consumption and Method for Operating Same - Disclosed herein are memory devices comprising a plurality of memory cells to which a standby voltage is to be supplied during standby mode to avoid loss of data, and methods of operating said memory devices, the methods comprising: (a) determining an actual value of a bit integrity parameter of the memory cells; (b) comparing said actual value with a predetermined minimal value of the bit integrity parameter which takes into account possible variations in cell properties as a result of process variations; and (c) adjusting the standby voltage towards a more optimal value based on the result of the comparison in such a way that said bit integrity parameter determined for said more optimal value of the standby voltage approaches the predetermined minimal value. The circuitry for measuring the bit integrity parameter preferably comprises a plurality of replica test cells which are added to the memory matrix. | 09-11-2008 |
20080217181 | FREE STANDING SINGLE-CRYSTAL NANOWIRE GROWTH BY ELECTRO-CHEMICAL DEPOSITION - The present invention relates to a method for obtaining monocrystalline or single crystal nanowires. Said nanowires are grown in a pattern making use of electro-chemical deposition techniques. Most preferred, the electrolytic bath is based on chlorides and has an acidic pH. Single element as well as combinations of two elements nanowires can be grown. Depending on the element properties the obtained nanowire can have metallic (conductive) or semi-metallic (semi-conductive) properties. The observed nanowire growth presents an unusual behavior compared to the classical nanowire template-assisted growth where a cap is formed as soon as the metal grows out of the pattern. Under given conditions of bath composition and potential (current) settings the nanowires grow out of the pattern up to a few microns without any significant lateral overgrowth. | 09-11-2008 |