CHINGIS TECHNOLOGY CORPORATION Patent applications |
Patent application number | Title | Published |
20110278656 | STACKED CAPACITOR FOR DOUBLE-POLY FLASH MEMORY - A stacked capacitor for double-poly flash memory is provided. The stacked capacitor is formed by a lower electrode, a lower dielectric layer, a central electrode, an upper dielectric layer, and an upper electrode, wherein the lower electrode is a doped region in a substrate. The manufacturing process of this stacked capacitor can be fully integrated in to the manufacturing process of the double-poly flash memory cell. | 11-17-2011 |
20110246704 | METHOD FOR OPERATING NON-VOLATILE FLASH MEMORY WITH WRITE PROTECTION MECHANISM - A method for operating a non-volatile flash memory with a write protection mechanism is provided. The method comprises the steps as follow. A command is issued. When the command is a safeguard information modification command, only when the safeguard information modification command matches the specific combination of the plurality of modification instructions, a safeguard information is allowed to be modified. When the command is a flash memory data modification command, only when both the status register protection information and the safeguard information indicate that the memory block/sector is not under write-protection, the memory block/sector is allowed to be modified according to the flash memory data modification command. | 10-06-2011 |
20110233643 | PMOS Flash Cell Using Bottom Poly Control Gate - A two-transistor PMOS memory cell has a selective gate (SG) PMOS and a floating gate (FG) PMOS is provided. A control gate, overlapping the floating gate of the FG PMOS, of the memory cell is made by a polysilicon layer and located on an isolation structure. | 09-29-2011 |