ANOBIT TECHNOLOGIES LTD. Patent applications |
Patent application number | Title | Published |
20120320672 | MEMORY DEVICE READOUT USING MULTIPLE SENSE TIMES - A method for data storage includes storing data in a group of analog memory cells by writing respective storage values into the memory cells in the group. One or more of the memory cells in the group are read using a first readout operation that senses the memory cells with a first sense time. At least one of the memory cells in the group is read using a second readout operation that senses the memory cells with a second sense time, longer than the first sense time. The data stored in the group of memory cells is reconstructed based on readout results of the first and second readout operations. | 12-20-2012 |
20120290768 | SELECTIVE DATA STORAGE IN LSB AND MSB PAGES - A method for data storage includes providing a memory, which includes multiple groups of memory cells and is configured to concurrently store first data using a first storage configuration having a first access time, and second data using a second storage configuration having a second access time, longer than the first access time, such that each memory cell in each of the groups stores at least one bit of the first data and one or more bits of the second data. Data items are accepted for storage in the memory. The accepted data items are classified into a fast-access class and a normal-access class. The data items in the fast-access class are stored in the memory using the first storage configuration, and the data items in the normal-access class are stored in the memory using the second storage configuration. | 11-15-2012 |
20120265962 | HIGH-PERFORMANCE SAS TARGET - A method for data storage includes, in a storage device that communicates with a host over a storage interface for executing a storage command in a memory of the storage device, estimating an expected data under-run between fetching data for the storage command from the memory and sending the data over the storage interface. A data size to be prefetched from the memory, in order to complete uninterrupted execution of the storage command, is calculated in the storage device based on the estimated data under-run. The storage command is executed in the memory while prefetching from the memory data of at least the calculated data size. | 10-18-2012 |
20120265903 | EFFICIENT CONNECTION MANAGEMENT IN A SAS TARGET - A method includes pre-configuring a hardware-implemented front-end of a storage device with multiple contexts of respective connections conducted between one or more hosts and the storage device. Storage commands, which are received in the storage device and are associated with the connections having the pre-configured contexts, are executed in a memory of the storage device using the hardware-implemented front-end. Upon identifying a storage command associated with a context that is not pre-configured in the hardware-implemented front-end, software of the storage device is triggered to configure the context in the hardware-implemented front-end, and the storage command is then executed using the hardware-implemented front-end in accordance with the context configured by the software. | 10-18-2012 |
20120254694 | REDUNDANT STORAGE IN NON-VOLATILE MEMORY BY STORING REDUNDANCY INFORMATION IN VOLATILE MEMORY - A method for data storage includes storing two or more data items in a non-volatile memory. Redundancy information is calculated over the data items, and the redundancy information is stored in a volatile memory. Upon a failure to retrieve a data item from the non-volatile memory, the data item is reconstructed from remaining data items stored in the non-volatile memory and from the redundancy information stored in the volatile memory. | 10-04-2012 |
20120246443 | INDEPENDENT MANAGEMENT OF DATA AND PARITY LOGICAL BLOCK ADDRESSES - A data storage method includes identifying, in a set of data items associated with respective logical addresses for storage in a memory, a first subset of the logical addresses associated with the data items containing application data, and a second subset of the logical addresses associated with the data items containing parity information that has been calculated over the application data. The data items associated with the first identified subset are stored in one or more first physical memory areas of the memory, and the data items associated with the second identified subset are stored in one or more second physical memory areas of the memory, different from the first physical memory areas. A memory management task is performed independently in the first physical memory areas and in the second physical memory areas. | 09-27-2012 |
20120246435 | STORAGE SYSTEM EXPORTING INTERNAL STORAGE RULES - A data storage method includes, in a memory controller that accepts memory access commands from a host for execution in one or more memory units, holding a definition of a policy to be applied by the memory controller in the execution of the memory access commands in the memory units. The policy is reported from the memory controller to the host so as to cause the host to format memory access commands based on the reported policy. | 09-27-2012 |
20120224423 | PROGRAMMING AND ERASURE SCHEMES FOR ANALOG MEMORY CELLS - A method for data storage, in a memory that includes multiple analog memory cells, includes setting a parameter of an iterative process applied to a group of the memory cells based on one or more data values stored in at least one of the memory cells in the memory. The iterative process is performed in the group of the memory cells in accordance with the set parameter. | 09-06-2012 |
20120224404 | ENHANCED PROGRAMMING AND ERASURE SCHEMES FOR ANALOG MEMORY CELLS - A method for data storage includes setting a group of analog memory cells to respective analog values by performing an iterative process that applies a sequence of pulses to the memory cells in the group. During the iterative process, a progress of the iterative process is assessed, and a parameter of the iterative process is modified responsively to the assessed progress. The iterative process is continued in accordance with the modified parameter. | 09-06-2012 |
20120221913 | ERROR CORRECTION CODES FOR INCREMENTAL REDUNDANCY - A method includes accepting input including at least part of a codeword that has been encoded by an ECC defined by a set of parity check equations. The codeword includes data bits and parity bits. A decoding process is applied to the codeword using the data bits and only a first partial subset of parity bits in the input, and using only a second partial subset of equations. Upon a failure to decode the codeword using the partial subsets, the codeword is re-decoded using the data bits and all parity bits in the input, and using all equations. The set of parity check equations is defined such that any parity bit in the codeword appears in multiple equations, and any parity bit in the first partial subset of the parity bits appears in a plurality of equations in the second partial subset of the equations. | 08-30-2012 |
20120201078 | Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N - A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set. | 08-09-2012 |
20120163080 | Reducing Distortion Using Joint Storage - A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order. | 06-28-2012 |
20120163079 | Programming Orders for Reducing Distortion Based on Neighboring Rows - A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order. | 06-28-2012 |
20120159281 | AUTOMATIC DEFECT MANAGEMENT IN MEMORY DEVICES - A method for data storage in a memory including multiple memory cells arranged in blocks, includes storing first and second pages in respective first and second groups of the memory cells within a given block of the memory. A pattern of respective positions of one or more defective memory cells is identified in the first group. The second page is recovered by applying the pattern identified in the first group to the second group of the memory cells. | 06-21-2012 |
20120044762 | REJUVENATION OF ANALOG MEMORY CELLS - A method for data storage in a memory that includes multiple analog memory cells fabricated using respective physical media, includes identifying a group of the memory cells whose physical media have deteriorated over time below a given storage quality level. A rejuvenation process, which causes the physical media of the memory cells in the group to meet the given storage quality level, is applied to the identified group. Data is stored in the rejuvenated group of the memory cells. | 02-23-2012 |
20120026789 | DISTORTION ESTIMATION AND CANCELLATION IN MEMORY DEVICES - A method for operating a memory ( | 02-02-2012 |
20120026788 | DISTORTION ESTIMATION AND CANCELLATION IN MEMORY DEVICES - A method for operating a memory ( | 02-02-2012 |
20110225472 | READING MEMORY CELLS USING MULTIPLE THRESHOLDS - A method for operating a memory ( | 09-15-2011 |
20100332955 | CHIEN SEARCH USING MULTIPLE BASIS REPRESENTATION - A method for decoding an Error Correction Code (ECC) includes accepting coefficients, including at least first and second coefficients, of an Error Locator Polynomial (ELP) that is defined over a vector space and has at least one root that is indicative of a location of an error in a set of bits, which represent data that has been encoded with the ECC. The first coefficient is represented using a first basis of the vector space, and the second coefficient is represented using a second basis of the vector space, different from the first basis. Using processing circuitry, the root of the ELP is identified by applying algebraic operations to the coefficients, such that the algebraic operations are applied to the first coefficient using the first basis, and to the second coefficient using the second basis. The error is corrected responsively to the identified root of the ELP. | 12-30-2010 |
20100250836 | Use of Host System Resources by Memory Controller - A method for data storage includes, in a system that includes a host having a host memory and a memory controller that is separate from the host and stores data for the host in a non-volatile memory including multiple analog memory cells, storing in the host memory information items relating to respective groups of the analog memory cells of the non-volatile memory. A command that causes the memory controller to access a given group of the analog memory cells is received from the host. In response to the command, a respective information item relating to the given group of the analog memory cells is retrieved from the host memory by the memory controller, and the given group of the analog memory cells is accessed using the retrieved information item. | 09-30-2010 |
20100220510 | Optimized Selection of Memory Chips in Multi-Chips Memory Devices - A method includes accepting a definition of a type of multi-unit memory device ( | 09-02-2010 |
20100220509 | Selective Activation of Programming Schemes in Analog Memory Cell Arrays - A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme. | 09-02-2010 |
20100199150 | Data Storage In Analog Memory Cell Arrays Having Erase Failures - A method for data storage includes performing an erasure operation on a group of analog memory cells ( | 08-05-2010 |
20100195390 | MEMORY DEVICE WITH NEGATIVE THRESHOLDS - A method for data storage in a memory that includes a plurality of analog memory cells includes storing data in the memory by writing first storage values to the cells. One or more read reference levels are defined for reading the cells, such that at least one of the read reference levels is negative. After storing the data, second storage values are read from the cells using the read reference levels, so as to reconstruct the stored data. In another disclosed method, data is stored in the memory by mapping the data to first storage values selected from a set of the nominal storage values, and writing the first storage values to the cells. The set of nominal storage values is defined such that at least one of the nominal storage values is negative. | 08-05-2010 |
20100165730 | READING MEMORY CELLS USING MULTIPLE THRESHOLDS - A method for operating a memory ( | 07-01-2010 |
20100165689 | REJUVENATION OF ANALOG MEMORY CELLS - A method for data storage in a memory that includes multiple analog memory cells fabricated using respective physical media, includes identifying a group of the memory cells whose physical media have deteriorated over time below a given storage quality level. A rejuvenation process, which causes the physical media of the memory cells in the group to meet the given storage quality level, is applied to the identified group. Data is stored in the rejuvenated group of the memory cells. | 07-01-2010 |
20100157675 | PROGRAMMING ORDERS FOR REDUCING DISTORTION IN ARRAYS OF MULTI-LEVEL ANALOG MEMORY CELLS - A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order. | 06-24-2010 |
20100157641 | MEMORY DEVICE WITH ADAPTIVE CAPACITY - A method for data storage in a memory ( | 06-24-2010 |
20100131827 | MEMORY DEVICE WITH INTERNAL SIGNAP PROCESSING UNIT - A method for operating a memory ( | 05-27-2010 |
20100131826 | ESTIMATION OF NON-LINEAR DISTORTION IN MEMORY DEVICES - A method for operating a memory ( | 05-27-2010 |
20100124088 | STORAGE AT M BITS/CELL DENSITY IN N BITS/CELL ANALOG MEMORY CELL DEVICES, M>N - A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set. | 05-20-2010 |
20100115376 | AUTOMATIC DEFECT MANAGEMENT IN MEMORY DEVICES - A method for storing data in a memory ( | 05-06-2010 |
20100110787 | MEMORY CELL READOUT USING SUCCESSIVE APPROXIMATION - A method for operating a memory ( | 05-06-2010 |
20100091535 | ADAPTIVE ESTIMATION OF MEMORY CELL READ THRESHOLDS - A method for operating a memory ( | 04-15-2010 |
20090240872 | MEMORY DEVICE WITH MULTIPLE-ACCURACY READ COMMANDS - A method for data storage includes defining at least first and second read commands for reading storage values from analog memory cells. The first read command reads the storage values at a first accuracy, and the second read command reads the storage values at a second accuracy, which is finer than the first accuracy. A condition is evaluated with respect to a read operation that is to be performed over a given group of the memory cells. One of the first and second read commands is selected responsively to the evaluated condition. The storage values are read from the given group of the memory cells using the selected read command. | 09-24-2009 |
20090213654 | PROGRAMMING ANALOG MEMORY CELLS FOR REDUCED VARIANCE AFTER RETENTION - A method includes defining a nominal level of a physical quantity to be stored in analog memory cells for representing a given data value. The given data value is written to the cells in first and second groups of the cells, which have respective first and second programming responsiveness such that the second responsiveness is different from the first responsiveness, by applying to the cells in the first and second groups respective, different first and second patterns of programming pulses that are selected so as to cause the cells in the first and second groups to store respective levels of the physical quantity that fall respectively in first and second ranges, such that the first range is higher than and the second range is lower than the nominal level. The given data value is read from the cells at a later time. | 08-27-2009 |
20090213653 | PROGRAMMING OF ANALOG MEMORY CELLS USING A SINGLE PROGRAMMING PULSE PER STATE TRANSITION - A method for data storage in analog memory cells includes defining multiple programming states for storing data in the analog memory cells. The programming states represent respective combinations of more than one bit and correspond to respective, different levels of a physical quantity stored in the memory cells. The data is stored in the memory cells by applying to the memory cells programming pulses that cause the levels of the physical quantity stored in the memory cells to transition between the programming states, such that a given transition is caused by only a single programming pulse. | 08-27-2009 |
20090199074 | PARAMETER ESTIMATION BASED ON ERROR CORRECTION CODE PARITY CHECK EQUATIONS - A method for operating a memory, which includes analog memory cells, includes encoding data with an Error Correction Code (ECC) that is representable by a plurality of equations. The encoded data is stored in a group of the analog memory cells by writing respective input storage values to the memory cells in the group. Multiple sets of output storage values are read from the memory cells in the group using one or more different, respective read parameters for each set. Numbers of the equations, which are satisfied by the respective sets of the output storage values, are determined. A preferred setting of the read parameters is identified responsively to the respective numbers of the satisfied equations. The memory is operated on using the preferred setting of the read parameters. | 08-06-2009 |
20090187803 | DECODING OF ERROR CORRECTION CODE USING PARTIAL BIT INVERSION - A method includes receiving an Error Correction Code (ECC) code word, which includes multiple encoded bits that represent data and have a bit order. Multiple subsets of the encoded bits are selected using a selection criterion that does not sequentially follow the bit order. For each subset in at least some of the multiple subsets, the bits in the subset are inverted and the code word having the inverted bits is decoded, so as to reconstruct the data. | 07-23-2009 |
20090168524 | WEAR LEVEL ESTIMATION IN ANALOG MEMORY CELLS - A method for operating a memory includes applying at least one pulse to a group of analog memory cells, so as to cause the memory cells in the group to assume respective storage values. After applying the pulse, the respective storage values are read from the memory cells in the group. One or more statistical properties of the read storage values are computed. A wear level of the group of the memory cells is estimated responsively to the statistical properties. | 07-02-2009 |
20090158126 | EFFICIENT INTERFERENCE CANCELLATION IN ANALOG MEMORY CELL ARRAYS - A method includes storing data in a group of analog memory cells by writing first storage values to the cells. After storing the data, second storage values are read from the cells using one or more first read thresholds. Third storage values that potentially cause cross-coupling interference in the second storage values are identified, and the third storage values are processed, to identify a subset of the second storage values as severely-interfered values. Fourth storage values are selectively re-read from the cells holding the severely-interfered values using one or more second read thresholds, different from the first read thresholds. The cross-coupling interference in the severely-interfered storage values is canceled using the re-read fourth storage values. The second storage values, including the severely-interfered values in which the cross-coupling interference has been canceled, are processed so as to reconstruct the data stored in the cell group. | 06-18-2009 |
20090144600 | Efficient re-read operations from memory devices - A method for data storage includes storing data, which is encoded with an Error Correction Code (ECC), in a group of analog memory cells by writing respective first storage values to the memory cells in the group. After storing the data, respective second storage values are read from the memory cells in the group, and the read second storage values are processed so as to decode the ECC. | 06-04-2009 |
20090106485 | READING ANALOG MEMORY CELLS USING BUILT-IN MULTI-THRESHOLD COMMANDS - A method for data storage includes storing data in a memory that includes multi-bit analog memory cells, each of which stores at least first and second data bits by assuming one of a predefined plurality of programming levels associated with respective storage values. The memory has at least a first built-in command for reading the first data bits of the memory cells by comparing the storage values of the memory cells to a first number of first thresholds, and a second built-in command for reading the second data bits of the memory cells by comparing the storage values of the memory cells to a second number of second thresholds, such that the first number is less than the second number. After storing the data, the first data bits are read from the memory cells by executing at least the second built-in command. | 04-23-2009 |
20090103358 | REDUCING PROGRAMMING ERROR IN MEMORY DEVICES - A method for storing data in an array ( | 04-23-2009 |
20090043951 | PROGRAMMING SCHEMES FOR MULTI-LEVEL ANALOG MEMORY CELLS - A method for data storage includes storing first data bits in a set of multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels. Second data bits are stored in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits. A storage strategy is selected responsively to a difference between the first and second times. The storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits. | 02-12-2009 |
20090024905 | COMBINED DISTORTION ESTIMATION AND ERROR CORRECTION CODING FOR MEMORY DEVICES - A method for operating a memory device ( | 01-22-2009 |
20080282106 | DATA STORAGE WITH INCREMENTAL REDUNDANCY - A method for operating a memory includes encoding input data with an Error Correction Code (ECC) to produce input encoded data including first and second sections, such that the ECC is decodable based on the first section at a first redundancy, and based on both the first and the second sections at a second redundancy that is higher than the first redundancy. | 11-13-2008 |
20080263262 | COMMAND INTERFACE FOR MEMORY DEVICES - A method for operating a memory device that includes a plurality of analog memory cells includes accepting at an input of the memory device a self-contained command to perform a memory access operation on at least one of the memory cells. The command includes an instruction specifying the memory access operation and one or more parameters that are indicative of analog settings to be applied to the at least one of the memory cells when performing the memory access operation. | 10-23-2008 |
20080219050 | REDUCTION OF BACK PATTERN DEPENDENCY EFFECTS IN MEMORY DEVICES - A method for operating a memory that includes multiple analog memory cells includes storing data in the memory by writing first storage values to the cells, so as to cause the cells to hold respective electrical charge levels. After storing the data, second storage values are read from at least some of the cells, including at least one interfered cell that belongs to a group of cells. A Back Pattern Dependency (BPD) distortion caused by the electrical charge levels of one or more interfering cells in the group to at least one of the second storage values read from the at least one interfered cell is detected and canceled. The second storage values, including the at least one of the second storage values in which the BPD distortion was canceled, are processed so as to reconstruct the data. | 09-11-2008 |
20080198652 | Memory Device Programming Using Combined Shaping And Linear Spreading - A method for data storage includes accepting data for storage in a memory ( | 08-21-2008 |
20080198650 | Distortion Estimation And Cancellation In Memory Devices - A method for operating a memory ( | 08-21-2008 |