| Patent application number | Description | Published |
|---|
| 20090244789 | METHOD AND SYSTEM FOR PROVIDING A HARD BIAS CAPPING LAYER - The method and system for providing a magnetoresistive device are disclosed. The magnetoresistive device is formed from a plurality of magnetoresistive layer. The method and system include providing a mask. The mask covers a first portion of the magnetoresistive element layers in at least one device area. The magnetoresistive element(s) are defined using the mask. The method and system include depositing hard bias layer(s). The method and system also include providing a hard bias capping structure on the hard bias layer(s). The hard bias capping structure includes a first protective layer and a planarization stop layer. The first protective layer resides between the planarization stop layer and the hard bias layer(s). The method and system also include performing a planarization. The planarization stop layer is configured for the planarization. | 10-01-2009 |
| 20110146062 | METHOD FOR MANUFACTURING A MAGNETIC WRITE HEAD HAVING A WRAP AROUND SHIELD THAT IS MAGNETICALLY COUPLED WITH A LEADING MAGNETIC SHIELD - A method for manufacturing a magnetic write head having a leading magnetic shield and a trailing magnetic shield that are arranged to prevent the lost of magnetic write field to the trailing magnetic shield. The write head includes a non-magnetic step layer that provides additional spacing between the trailing magnetic shield and the write pole at a region removed from the air bearing surface. | 06-23-2011 |
| 20110151279 | MAGNETIC WRITE HEAD MANUFACTURED BY AN ENHANCED DAMASCENE PROCESS PRODUCING A TAPERED WRITE POLE WITH A NON-MAGNETIC SPACER AND NON-MAGNETIC BUMP - A magnetic write head having a tapered trailing edge and having a magnetic layer formed over a trailing edge of the write pole at a location recessed from the ABS, the magnetic layer being separated from the trailing edge of the write pole by a thin non-magnetic layer. The thin non-magnetic layer is preferably sufficiently thin that the magnetic layer can function as a portion of the write pole in a region removed from the ABS. A trailing magnetic shield is formed over the write pole and is separated from the write pole by a non-magnetic trailing gap layer. A non-magnetic spacer layer can be formed over the magnetic layer to provide additional separation between the magnetic layer and the trailing magnetic shield. | 06-23-2011 |
| 20120106002 | MAGNETIC WRITE HEADS WITH BI-LAYER WRAP AROUND SHIELDS HAVING DISSIMILAR SHIELD LAYER WIDTHS - Magnetic write heads and corresponding fabrication methods for bi-layer wrap around shields resulting in dissimilar shield layer widths are disclosed. A gap structure is formed around a main write pole for a magnetic write head. A wrap around shield for the main write pole is fabricated to include a first magnetic layer proximate to the main write pole and a second magnetic layer on the first magnetic layer. A width of the first magnetic layer is less than the width of the second magnetic layer, and back edges of the first and second magnetic layers are coplanar. Further, a throat height of the wrap around shield is maintained between the first and the second magnetic layers because their back edges are coplanar. | 05-03-2012 |
| 20120125886 | PROCESS TO MAKE PMR WRITER WITH LEADING EDGE SHIELD (LES) AND LEADING EDGE TAPER (LET) - Methods for fabrication of leading edge shields and tapered magnetic poles with a tapered leading edge are provided. The leading edge shield may be formed by utilizing a CMP stop layer. The CMP stop layer may aid in preventing over polishing of the magnetic material. For the tapered magnetic poles with a tapered leading edge, a magnetic material is deposited on a planarized surface, a patterned resist material is formed, and exposed magnetic material is etched to form at least one tapered surface of the magnetic material. | 05-24-2012 |
| 20120127612 | PROCESS TO MAKE PMR WRITER WITH LEADING EDGE SHIELD (LES) AND LEADING EDGE TAPER (LET) - Methods for fabrication of leading edge shields and tapered magnetic poles with a tapered leading edge are provided. The leading edge shield may be formed by utilizing a CMP stop layer. The CMP stop layer may aid in preventing over polishing of the magnetic material. For the tapered magnetic poles with a tapered leading edge, a magnetic material is deposited on a planarized surface, a patterned resist material is formed, and exposed magnetic material is etched to form at least one tapered surface of the magnetic material. | 05-24-2012 |
| 20120127615 | TMR READER STRUCTURE AND PROCESS FOR FABRICATION - The present invention generally relates to a TMR reader and a method for its manufacture. The TMR reader discussed herein adds a shield layer to the sensor structure. The shield layer is deposited over the capping layer so that the shield layer and the capping layer collectively protect the free magnetic layer within the sensor structure from damage during further processing. Additionally, the hard bias layer is shaped such that the entire hard bias layer underlies the hard bias capping layer so that a top lead layer is not present. By eliminating the top lead layer and including a shield layer within the sensor structure, the read gap is reduced while still protecting the free magnetic layer during later processing. | 05-24-2012 |
| 20120127616 | TMR READER WITHOUT DLC CAPPING STRUCTURE - Embodiments herein generally relate to TMR readers and methods for their manufacture. The embodiments discussed herein disclose TMR readers that utilize a structure that avoids use of the DLC layer over the sensor structure and over the hard bias layer. The capping structure over the sensor structure functions as both a protective layer for the sensor structure and a CMP stop layer. The hard bias capping structure functions as both a protective structure for the hard bias layer and as a CMP stop layer. The capping structures that are free of DLC reduce the formation of notches in the second shield layer so that second shield layer is substantially flat. | 05-24-2012 |
| 20130019467 | METHOD FOR MANUFACTURING A MAGNETIC WRITE POLE HAVING STRAIGHT SIDE WALLS AND A WELL DEFINED TRACK-WIDTH - A method for manufacturing a magnetic write head having a write pole with a very narrow track width, straight well defined sides and a well defined trailing edge width (e.g. track-width). The method includes uses two separate chemical mechanical polishing processes that stop at separate CMP stop layers. The first CMP stop layer is deposited directly over a RIEable fill layer. A RIE mask, is formed over the fill layer and first CMP stop layer, the RIE mask having an opening. A trench then is formed in the RIEable fill layer. A second CMP stop layer is then deposited into the trench and over the RIE mask, followed by plating of a magnetic material. First and second chemical mechanical polishing processes are then performed, the first stopping at the first CMP stop and the second stopping at the second CMP stop. | 01-24-2013 |
| 20130020204 | MAGNETIC WRITE HEAD HAVING AN ELECTROPLATED WRITE POLE WITH A LEADING EDGE TAPER - A method for manufacturing a magnetic write head having a tapered leading edge. The method includes depositing a sacrificial non-magnetic layer to a thickness that is at least as great as the thickness of the write pole to be formed. The sacrificial non-magnetic layer is then masked and ion milled so as to form a tapered edge on the sacrificial non-magnetic layer that extends through the thickness of the non-magnetic fill layer. A magnetic material is then deposited and planarized by chemical mechanical polishing. The remaining magnetic material forms the entirety of the magnetic write pole so that there is no need to deposit additional magnetic layers further construct the write pole. | 01-24-2013 |
| 20130163124 | MAGNETIC READ SENSOR HAVING FLAT SHIELD PROFILE - A magnetic read sensor having a flat shield for improved gap thickness definition and control. The magnetic read head includes a sensor stack and hard bias layer formed at either side of the sensor stack. A SiNx hard bias capping layer is formed over the hard bias layers between the hard bias structure and the upper magnetic shield. The hard bias capping layer has an upper surface that has been planarized by chemical mechanical polishing that is co-planar with an upper surface of the sensor stack. The read sensor is constructed by a method wherein the hard bias capping layer is constructed of a material (e.g. SiNx) that is also used as a CMP stop layer and that can be planarized by chemical mechanical polishing while having some resistance to removal by chemical mechanical polishing. | 06-27-2013 |
| 20140174655 | POLISHING TOOL WITH DIAPHRAM FOR UNIFORM POLISHING OF A WAFER - A chemical mechanical polishing to that can provide uniform polishing across a wafer even when polishing hard wafers such as AlTiC wafers used in the formation of magnetic recording sliders. The chemical mechanical polishing to has a wafer carrier that includes a diaphragm or bladder that is configured such that an inner portion of the bladder can be pneumatically pressurized so as to bow outward, while outer portions remain unpressurized. | 06-26-2014 |
| 20150206550 | RECESSED IRMN READER PROCESS - The embodiments of the present invention relate to a method for forming a magnetic read head with pinned layers extending to the ABS of the read head and magnetically coupled with an antiferromagnetic layer that is recessed in relation to the ABS of the read head. Portions of the antiferromagnetic layer and a magnetic layer that are extending to the ABS are removed, exposing a shield. A shielding material is formed on the exposed shield and a seed layer is formed on the shield and on or over a portion of the remaining antiferromagnetic layer. A pinned layer structure is formed on the seed layer and the magnetic layer. | 07-23-2015 |
| Patent application number | Description | Published |
|---|
| 20080224731 | NON-VOLATILE MEMORY ARCHITECTURE FOR PROGRAMMABLE-LOGIC-BASED SYSTEM ON A CHIP - A programmable system-on-a-chip integrated circuit device includes a programmable logic block. A digital input/output circuit block is coupled to the programmable logic block. A SRAM block is coupled to the programmable logic block. At least one non-volatile memory block is coupled to the programmable logic block. A JTAG port is coupled to the programmable logic block. An analog circuit block including an analog-to-digital converter may be coupled to the programmable logic block and an analog input/output circuit block may be coupled to the analog circuit block. | 09-18-2008 |
| 20080272803 | SYSTEM-ON-A-CHIP INTEGRATED CIRCUIT INCLUDING DUAL-FUNCTION ANALOG AND DIGITAL INPUTS - An integrated circuit includes a plurality of inputs, a plurality of output pads, a programmable logic block, an analog circuit block, an analog-to-digital converter programmably coupleable to individual analog circuits in the analog circuit block, and an interconnect architecture programmably coupling selected ones of the plurality of inputs, the plurality of outputs, the programmable logic block, the analog circuit block, and the analog-to-digital converter. At least one of the inputs may be programmably configured as one of a digital input programmably coupleable to elements in the programmable logic block or as an analog input to an analog circuit in the analog circuit block. | 11-06-2008 |
| 20080303547 | PROGRAMMABLE SYSTEM ON A CHIP FOR TEMPERATURE MONITORING AND CONTROL - A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and temperature sensing and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip chip, face-to-face, or other multiple die configuration. The programmable system-on-a-chip integrated circuit with temperature measuring and control circuitry performs temperature measurement and control functions and can be used to create an on-chip temperature log. | 12-11-2008 |
| 20080309393 | CLOCK-GENERATOR ARCHITECTURE FOR A PROGRAMMABLE-LOGIC-BASED SYSTEM ON A CHIP - A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A real-time clock is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A programmable logic block is coupled to the clock conditioning circuit and the real-time clock. | 12-18-2008 |
| 20090292937 | PROGRAMMABLE SYSTEM ON A CHIP - A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another. | 11-26-2009 |
| Patent application number | Description | Published |
|---|
| 20090059968 | INJECTION-SEEDED MONOLITHIC LASER - An injection seeding laser system in which the seeded laser has a monolithic structure without any moving parts. The seeder emits light whose wavelength is swept in a radio frequency (RF) over a range that covers one or more longitudinal mode(s) of the seeded laser, which eliminates the need for active cavity length control and phase locking between the injected and output signals. The gain medium of the seeded laser is an active medium whose population is substantially inversed in response to an excitation, which can be electrical or optical. Time synchronization between the injected seeds and the triggering signal to the slave is generally not required. The present invention enables fiber MOPO that produces high power laser pulses in an efficient and cost-effective manner. | 03-05-2009 |
| 20090097507 | Wavelength and Intensity Stabilized Laser Diode and Application of Same to Pumping Solid-State Lasers - An efficient and low-noise solid-state laser is optically pumped by one or more laser diode(s) driven by RF modulated current. The solid-state laser operation is stabilized by the pump source stable in both spectrum and intensity, in conjunction with automatic power control wherein the feedback loop accurately reflects the true drift in the output power. Moreover, the pump efficiency is optimized and the optical noise is minimized by adjusting the diode operation temperature such that the pump wavelength coincides with the absorption peak of the gain medium. By internally or externally modulating the amplitude of the drive current, the pump diode(s) operate in pulsed mode with controllable shape, width, repetition rate, and pulse-to-pulse intervals, which enables essentially constant optical energy produced from each pulse of the solid-state laser in high repetition rates with variable pulse-to-pulse intervals. | 04-16-2009 |
| 20090201952 | Method and apparatus for producing UV laser from all-solid-state system - An all-solid-state laser system produces coherent DUV radiation through a third or fourth harmonic generation. The fundamental wavelength is generated by a slave laser optically pumped by one or more light source(s) of high density array(s) and is stabilized by injecting optical seeds whose wavelength is rapidly swept to cover the fundamental wavelength. The pump effects are enhanced by a pump chamber that recycles unabsorbed pump light. The present invention enables DUV pulses with a width shorter than 1 ns and a repetition rate higher than 100 kHz. The output DUV wavelength is adjustable by selecting an appropriate seeder. | 08-13-2009 |
| 20100091806 | Semiconductor Lasers with Improved Temporal, Spectral, and Spatial Stability and Beam Profile Uniformity - A method for improving spectral, spatial, and temporal stability of semiconductor lasers and their beam profile uniformity based on statistical average of plural transient or unsteady state longitudinal and lateral modes that are continuously perturbed. A laser module implementing the method comprises a semiconductor laser, a drive circuit generating RF-modulated drive current, and an automatic power control loop for producing stable, low noise and uniform or nearly uniform illumination field along one or two dimensions. | 04-15-2010 |
| Patent application number | Description | Published |
|---|
| 20100089450 | NEAR-FIELD DIFFRACTION SUPERPOSITION OF LIGHT BEAMS FOR CONCENTRATING SOLAR SYSTEMS - Disclosed herein is a concentrating photovoltaic system utilizing a lens/reflector array to spatially divide the incident sunlight into separate incoherent beams, and a principle optical element to superpose the separate beams that undergo near-field diffraction/transmission, and form a uniform illumination pattern on the photovoltaic (PV) cell with similar shape and size. The array and principle optical element can be flexibly disposed in the system as long as the near-field diffraction condition is satisfied. The PV cell is disposed close to the focus of the principle optical element, and the concentrated illumination pattern on the PV cell is nearly a geometric projection of individual lens/reflector in the array. The size of the pattern is controlled by changing the focal lengths of the array and principle optical element, the distance between them, and the size of individual lens/reflector in the array. The system is insensitive to component misalignment and has the advantage of achieving high concentration ratio and efficient energy conversion with relatively low cost and compact design. | 04-15-2010 |
| 20130014813 | HIGH EFFICIENCY AND LOW COST GaInP/GaAs/Si TRIPLE JUNCTION BY EPITAXY LIFT-OFF AND MECHANICAL STACK - The invention disclosed a method of fabricating GaInP/GaAs/Si triple junction solar cells by epitaxy lift-off and mechanical stack techniques. First, a GaInP(1.85 eV)/GaAs(1.42 eV) dual-junction cell is fabricated on a GaAs substrate, and a Si single junction is fabricated on a Si substrate. The Si single junction cell and the GaInP/GaAs dual-junction cell are joined together robustly by metal-metal bonding. A buffer layer, Gallium Phosphide (GaP) inserted between GaAs and Si can further optimize electrical, thermal and optical coupling. Furthermore, when a GaP layer is grown on a p-type Si substrate, a Si p-n junction as a fully functional solar cell is formed simultaneously, thereby reducing manufacturing cost. The technology can achieve GaInP/GaAs/Si triple junction solar cells of the conversion efficiency as high as 36% under a standard AM1.5 solar spectrum, with the optimal current 13.3 mA/cm | 01-17-2013 |
| Patent application number | Description | Published |
|---|
| 20100297502 | Nanostructured Materials for Battery Applications - The present invention relates to nanostructured materials (including nanowires) for use in batteries. Exemplary materials include carbon-comprising, Si-based nanostructures, nanostructured materials disposed on carbon-based substrates, and nanostructures comprising nanoscale scaffolds. The present invention also provides methods of preparing battery electrodes, and batteries, using the nanostructured materials. | 11-25-2010 |
| 20110008707 | Catalyst Layer for Fuel Cell Membrane Electrode Assembly, Fuel Cell Membrane Electrode Assembly Using the Catalyst Layer, Fuel Cell, and Method for Producing the Catalyst Layer - A catalyst layer for a fuel cell membrane electrode assembly includes a plurality of agglomerates, adjacent ones of the plurality of agglomerates contacting with each other with pores provided between said adjacent ones of the plurality of agglomerates, each of the plurality of agglomerates being formed by packing a plurality of catalysts each consisting of noble metal fine particles supported on a fiber-like support material, adjacent ones of the plurality of catalysts contacting with each other with pores provided between said adjacent ones of the plurality of catalysts, and each of the plurality of catalysts contacting with a plurality of catalysts other than said each catalyst at a plurality of contact points. This allows providing a catalyst layer, a fuel cell membrane electrode assembly, and a fuel cell, each of which has compact size and excellent power generation performance, and a method for producing the same. | 01-13-2011 |
| 20110275005 | Membrane Electrode Assemblies With Interfacial Layer - The present invention relates to interfacial layers for use m membrane electrode assemblies that comprise nanowire-supported catalysts, and fuel cells comprising such membrane electrode assemblies. The present invention also relates to methods of preparing membrane electrode assemblies and fuel cells comprising interfacial layers and nanowire-supported catalysts. | 11-10-2011 |
| 20110275011 | Electrochemical Catalysts for Fuel Cells - The present invention relates to electrochemical catalyst particles, including nanoparticles, which can be used membrane electrode assemblies and in fuel cells. In exemplary embodiments, the present invention provides electrochemical catalysts supported by various materials. Suitably the catalysts have an atomic ratio of oxygen to a metal in the nanoparticle of about 3 to about 6. | 11-10-2011 |
| 20120021331 | NANOSTRUCTURED CATALYST SUPPORTS - The present invention relates to SiC nanostructures, including SiC nanopowder, SiC nanowires, and composites of SiC nanopowder and nanowires, which can be used as catalyst supports in membrane electrode assemblies and in fuel cells. The present invention also relates to composite catalyst supports comprising nanopowder and one or more inorganic nanowires for a membrane electrode assembly. | 01-26-2012 |
| 20140248543 | Silicon Nanostructure Active Materials for Lithium Ion Batteries and Processes, Compositions, Components and Devices Related Thereto - The present invention relates to nanostructured materials for use in rechargeable energy storage devices such as lithium batteries, particularly rechargeable secondary lithium batteries, or lithium-ion batteries (LIBs). The present invention includes materials, components, and devices, including nanostructured materials for use as battery active materials, and lithium ion battery (LIB) electrodes comprising such nanostructured materials, as well as manufacturing methods related thereto. Exemplary nanostructured materials include silicon-based nanostructures such as silicon nanowires and coated silicon nanowires, nanostructures disposed on substrates comprising active materials or current collectors such as silicon nanowires disposed on graphite particles or copper electrode plates, and LIB anode composites comprising high-capacity active material nanostructures formed on a porous copper and/or graphite powder substrate. | 09-04-2014 |
| Patent application number | Description | Published |
|---|
| 20100190777 | COMPOUNDS AND METHODS FOR KINASE MODULATION, AND INDICATIONS THEREFOR - Compounds of formula I active on protein kinases are described, as well as methods of using such compounds to treat diseases and conditions associated with aberrant activity of protein kinases. Formula (I) wherein Ar is optionally substituted heteroaryl; R | 07-29-2010 |
| 20110207716 | INHIBITORS OF POLO-LIKE KINASE - The present invention provides compounds having a structure according to Formula (I): | 08-25-2011 |
| 20110212942 | INHIBITORS OF POLO-LIKE KINASE - The present invention provides compounds having a structure according to Formula (I): | 09-01-2011 |
| 20120115848 | Inhibitors of Polo-Like Kinase - The present invention provides compounds having a structure according to Formula (I): | 05-10-2012 |
| 20130040945 | CERTAIN CHEMICAL ENTITIES, COMPOSITIONS, AND METHODS - Chemical entities that are arctigenin derivatives, pharmaceutical compositions and methods of treatment of cancer are described. | 02-14-2013 |
| 20130053384 | Certain Chemical Entities, Compositions, and Methods - Chemical entities that are kinase inhibitors, pharmaceutical compositions and methods of using these chemical entities, e.g., for treatment of cancer are described. | 02-28-2013 |
| 20130231335 | INHIBITORS OF POLO-LIKE KINASE - The present invention provides compounds having a structure according to Formula (I): | 09-05-2013 |
| 20130303534 | COMPOUNDS AND METHODS FOR KINASE MODULATION, AND INDICATIONS THEREFOR - Compounds active on protein kinases are described, as well as methods of using such compounds to treat diseases and conditions associated with aberrant activity of protein kinases. | 11-14-2013 |
| 20130331376 | INHIBITORS OF POLO-LIKE KINASE - The present invention provides compounds having a structure according to Formula (I): | 12-12-2013 |
| 20140038948 | COMPOUNDS AND METHODS FOR KINASE MODULATION, AND INDICATIONS THEREFOR - Compounds active on protein kinases are described, as well as methods of using such compounds to treat diseases and conditions associated with aberrant activity of protein kinases. | 02-06-2014 |
| 20150057276 | CERTAIN CHEMICAL ENTITIES, COMPOSITIONS, AND METHODS - Chemical entities that are kinase inhibitors, pharmaceutical compositions and methods of treatment of cancer are described. | 02-26-2015 |
| 20150057277 | CERTAIN CHEMICAL ENTITIES, COMPOSITIONS, AND METHODS - Chemical entities that are quinoxaline kinase inhibitors, pharmaceutical compositions and methods of treatment of cancer are described. | 02-26-2015 |
| 20150126502 | INHIBITORS OF POLO-LIKE KINASE - The present invention provides compounds having a structure according to Formula (I): | 05-07-2015 |
| 20150158826 | CERTAIN CHEMICAL ENTITIES, COMPOSITIONS, AND METHODS - Chemical entities based on quinoxaline that are kinase inhibitors are described. Specifically quinoxaline derivatives of Formula I, containing a diarylamide or diarylurea substructure that inhibit Braf mutant kinase activity, pharmaceutical compositions containing the inhibitor compounds and methods of treatment of cancer comprising administering an effective amount of the Braf inhibitor compound are described. | 06-11-2015 |
| 20150175601 | CERTAIN CHEMICAL ENTITIES, COMPOSITIONS, AND METHODS - Chemical entities that are kinase inhibitors, pharmaceutical compositions and methods of treatment of cancer are described. | 06-25-2015 |
| 20150246885 | CERTAIN CHEMICAL ENTITES, COMPOSITIONS, AND METHODS - Chemical entities that are kinase inhibitors, pharmaceutical compositions and methods of treatment of cancer are described. | 09-03-2015 |
