Yutaka Uematsu
Yutaka Uematsu, Kanagawa JP
Patent application number | Description | Published |
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20100321060 | SEMICONDUCTOR LSI AND SEMICONDUCTOR DEVICE - In a signal transmission system, performing signal transmission via signal interconnections | 12-23-2010 |
20120119387 | SEMICONDUCTOR PACKAGE WITH BONDING WIRES OF REDUCED LOOP INDUCTANCE - A semiconductor package includes a semiconductor device including a plurality of signal pads and a plurality of auxiliary pads which are alternatively arranged in a predetermined direction, and a package board including a plurality of signal bond fingers, a plurality of first power supply voltage bond fingers, and a plurality of second power supply voltage bond fingers. The signal pads are connected respectively to the signal bond fingers by first wires. The first power supply voltage bond fingers and the second power supply voltage bond fingers are connected respectively to the auxiliary pads by second wires. The first wires are disposed between those of the second wires which are connected to the first power supply voltage bond fingers and those of the second wires which are connected to the second power supply voltage bond fingers. | 05-17-2012 |
20130140674 | SEMICONDUCTOR DEVICE - A semiconductor device according to this invention includes a first power line that supplies power to a first circuit, a second power line that supplies power to a second circuit, and a capacitive element that is provided between the first power line and the second power line. | 06-06-2013 |
20140103542 | SEMICONDUCTOR PACKAGE WITH BONDING WIRES OF REDUCED LOOP INDUCTANCE - A semiconductor package includes a semiconductor device including a plurality of signal pads and a plurality of auxiliary pads which are alternatively arranged in a predetermined direction, and a package board including a plurality of signal bond fingers, a plurality of first power supply voltage bond fingers, and a plurality of second power supply voltage bond fingers. The signal pads are connected respectively to the signal bond fingers by first wires. The first power supply voltage bond fingers and the second power supply voltage bond fingers are connected respectively to the auxiliary pads by second wires. The first wires are disposed between those of the second wires which are connected to the first power supply voltage bond fingers and those of the second wires which are connected to the second power supply voltage bond fingers. | 04-17-2014 |
20150022255 | SEMICONDUCTOR DEVICE - A semiconductor device according to this invention includes a first power line that supplies power to a first circuit, a second power line that supplies power to a second circuit, and a capacitive element that is provided between the first power line and the second power line. | 01-22-2015 |
Yutaka Uematsu, Tokyo JP
Patent application number | Description | Published |
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20100090325 | SEMICONDUCTOR DEVICE - In order to solve a problem of increased noise accompanying increased area of a return path in a stacked package structure, provided is a semiconductor device which is formed in a stacked package such as a PoP package, which realizes low noise without changing a package size. An additional power supply wiring that runs along a signal wiring between an upper PoP and a lower PoP is newly added in the lower PoP of a package having a PoP structure. | 04-15-2010 |
20120200159 | SEMICONDUCTOR DEVICE - A semiconductor device includes: first and second power supply wirings VDDQ and VSSQ, respectively; an output circuit | 08-09-2012 |
Yutaka Uematsu, Chiyoda-Ku JP
Patent application number | Description | Published |
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20100013528 | SEMICONDUCTOR DEVICE AND INFORMATION PROCESSING SYSTEM - A semiconductor device or an information processing system comprises a plurality of circuit units, and a control unit for controlling a start timing of large-current operations executed by the respective circuit units within a predetermined period, where the large-current operation involves a relatively large current which flows in a power supply system, as compared with other operations. The control unit controls the start timing of the large-current operation from one circuit unit to another such that the waveform of a current flowing from the power supply system is shaped into the waveform of a half cycle of a sinusoidal wave when the circuit units execute large-current operations within the predetermined period. | 01-21-2010 |
20110234249 | TEST METHOD AND INTERPOSER USED THEREFOR - An interposer to be mounted with an integrated circuit to be a test object is provided with a switch and a probe to detect an electric current corresponding to individual terminals of the integrated circuit. A test pattern signal is then inputted to the integrated circuit through a test substrate as a switch that is connected to a power supply terminal of the integrated circuit and that is turned off. If the integrated circuit normally operates and the current values of all the terminals of the integrated circuit are within a tolerance, the power supply terminal connected to the turned-off switch is identified as a terminal that may be removed. | 09-29-2011 |
Yutaka Uematsu, Yokohama JP
Patent application number | Description | Published |
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20090213558 | SUPPORT METHOD AND APPARATUS FOR PRINTED CIRCUIT BOARD - An orthogonal array is formed by performing electromagnetic field analysis only once and determining a range by using the mount position and type of a capacitor and the number of capacitors as parameters to perform circuit analysis a small number of times. An estimation equation is formed by using as an index a result of the absolute value of the calculated power source impedance, and a capacitor is disposed to reduce noises by using the estimation equation. | 08-27-2009 |
20110239176 | DESIGN SUPPORT METHOD AND APPARATUS FOR PRINTED CIRCUIT BOARD - An orthogonal array is formed by performing electromagnetic field analysis only once and determining a range by using the mount position and type of a capacitor and the number of capacitors as parameters to perform circuit analysis a small number of times. An estimation equation is formed by using as an index a result of the absolute value of the calculated power source impedance, and a capacitor is disposed to reduce noises by using the estimation equation. | 09-29-2011 |
Yutaka Uematsu, Yokohama-Shi JP
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20090189293 | Semiconductor device - A semiconductor device having a chip-on-chip structure is constituted of a first semiconductor chip and even-numbered pairs of second semiconductor chips, all of which are laminated together on the surface of an interposer. The first semiconductor chip controls each pair of the second semiconductor chips so as to activate one second semiconductor chip while inactivating another second semiconductor chip. The second semiconductor chips are paired together in such a way that through-vias and electrodes thereof are positioned opposite to each other via bumps. Since drive voltage electrodes supplied with a drive voltage (VDD) and reference potential electrodes supplied with a reference potential (VSS) are mutually connected together between the paired second semiconductor chips, it is possible to increase the overall electrostatic capacitance of each second semiconductor chip so as to substantially reduce feed noise without increasing the overall layout area of the semiconductor device. | 07-30-2009 |
20090195295 | Semiconductor device having power supply system - A semiconductor device is provided which includes: a first semiconductor integrated circuit; a ground line and a power supply line trough which electric power is supplied to the first semiconductor integrated circuit; and a variable impedance component which is connected between the ground line and the power supply line. | 08-06-2009 |
Yutaka Uematsu, Hachioji JP
Patent application number | Description | Published |
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20080266031 | SEMICONDUCTOR DEVICE AND WIRING PART THEREOF - A technique capable of achieving both improvement of mounting density and noise reduction for a semiconductor device is provided. An LSI mounted on a printed wiring board comprises a grounding BGA ball and a power BGA ball to get power supply from the printed wiring board, and the grounding BGA ball and the power BGA ball are arranged closely to each other. A decoupling capacitor is mounted on the printed wiring board and has a first terminal and a second terminal. The grounding BGA ball and the first terminal are connected by a first metal electrode plate, and the power BGA ball and the second terminal are connected by a second metal electrode plate. The first metal electrode plate and the second metal electrode plate interpose a dielectric film having a thickness equal to or smaller than 1 μm therebetween. | 10-30-2008 |
20080290495 | Low noise semiconductor device - As a power feed route in a semiconductor chip, a power feed route which reduces antiresonance impedance in the frequency range of tens of MHz is to be realized thereby to suppress power noise in a semiconductor device. By inserting structures which raise the resistance in the medium frequency band into parts where the resistance is intrinsically high, such as power wiring in a semiconductor package and capacitor interconnecting electrode parts, the antiresonance impedance in the medium frequency band can be effectively reduced while keeping the impedance low at the low frequency. | 11-27-2008 |
Yutaka Uematsu, Kawasaki JP
Patent application number | Description | Published |
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20110193215 | SEMICONDUCTOR PACKAGE - Means for decreasing parasitic inductance by a realistic mounting method is provided. On a surface layer of a semiconductor package, there is provided a ground pad having a plurality of comb-tooth-shaped ground pads which are connecting points for wire bonding and are protruded on the surface layer of the semiconductor package. A power-supply pad is arranged between the comb-tooth-shaped ground pads. Two long and short ground wires are arranged in one comb-tooth-shaped ground pad. Also, two long and short power-supply wires are arranged in one power-supply pad. By arranging the long ground wire and the long power-supply wire so as to be parallel and close to each other and arranging the short power-supply wire and the short ground wire so as to be parallel and close to each other, the parasitic inductance is decreased. | 08-11-2011 |
20120112849 | DATA TRANSMISSION SYSTEM AND SEMICONDUCTOR CIRCUIT - A data transmission system is provided in which it is possible to perform both of suppressing the degrading of the slew rate and suppressing the ringing even if load capacitance of an input buffer is changed. | 05-10-2012 |
20120262885 | SIGNAL TRANSFER CIRCUIT - Provided is a signal transfer circuit which uses a low cost circuit board with a high packing density but is capable of reducing a crosstalk noise between signal lines and also reducing a reflection noise due to a stub. A signal transfer circuit of the present invention is configured such that lead terminals of electronic components and through-hole vias are connected to each other by surface wirings, respectively, to allow no branching from the middle of the through-hole vias. Further, first wirings connecting a first electronic component are each arranged between a corresponding pair of second wirings connecting a second electronic component, and signals are transmitted through the first wirings and the second wirings by interleaved transmission. | 10-18-2012 |
20130207234 | SEMICONDUCTOR APPARATUS, SIGNAL TRANSMISSION SYSTEM AND SIGNAL TRANSMISSION METHOD - A slew rate of a signal transmitted between a semiconductor device having a small load capacitance and a semiconductor device having a large load capacitance is improved. When a signal is transmitted to the semiconductor device (for example, a memory device) having the large load capacitance, pre-emphasis is performed, and when a signal is transmitted to the semiconductor device (for example, a memory controller) having the small load capacitance, pre-emphasis is not performed or is slightly performed. By this, when the signal is transmitted to the memory device, blunting in signal rising due to the load capacitance is suppressed, and when the signal is transmitted to the memory controller, ringing due to the reflection of the signal is suppressed, and the slew rate of the data transmission is improved. | 08-15-2013 |
20130307582 | SEMICONDUCTOR DEVICE - To suppress power consumption and enhance signal quality as compared with the case where first and second semiconductor elements are terminated only by on-chip input termination resistor circuits. A first semiconductor element with a switching function and a second semiconductor element with a switching function are connected to each other with a substrate interconnection, and a resistor element is connected in parallel with the substrate interconnection. The resistor element is placed at an arbitrary position or a branch point on the signal interconnection. | 11-21-2013 |
20140112073 | SIGNAL TRANSMISSION SYSTEM AND STORAGE SYSTEM - A signal transmission system is provided which connects a memory controller and a plurality of semiconductor memories. The signal transmission system comprises a semiconductor device arranged between the memory controller and the plurality of memories, in which: the semi-conductor device comprises a control circuit; and the control circuit receives a signal from the semiconductor memory and outputs a control signal to the memory controller in response to the signal from the semiconductor memory. | 04-24-2014 |
Yutaka Uematsu, Zama-Shi JP
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20130112390 | VEHICLE HEATING AND AIR CONDITIONING SYSTEM - A vehicle heating and air conditioning system basically includes an interior/exterior air introducing structure, a heating device, a driving end time acquiring section and an interior/exterior air switching control section. The interior/exterior air introducing structure switches the flow of cabin intake air between an interior air recirculation mode and an exterior air introducing mode. The heating device heats the cabin intake air being introduced by the interior/exterior air introducing structure. The driving end time acquiring section estimates a driving end time corresponding to a point in time at which driving of a vehicle is predicted to end. The interior/exterior air switching control section switches the interior/exterior air introducing structure from the exterior air introducing mode to the interior air recirculation mode during a period of time from a prescribed point in time until the driving end time to restrict windshield fogging while in the interior air recirculation mode. | 05-09-2013 |
20130199217 | AIR CONDITIONER FOR VEHICLE - An air conditioner for a vehicle includes: a compressor ( | 08-08-2013 |