Patent application number | Description | Published |
20080268653 | METHOD OF FORMING HIGH DIELECTRIC FILM USING ATOMIC LAYER DEPOSITION AND METHOD OF MANUFACTURING CAPACITOR HAVING THE HIGH DIELECTRIC FILM - A method of forming a high dielectric film using atomic layer deposition (ALD), and a method of manufacturing a capacitor having the high dielectric film, include supplying a precursor containing a metal element to a semiconductor substrate and purging a reactor; supplying an oxidizer and purging the reactor; and supplying a reaction source containing nitrogen and purging the reactor. | 10-30-2008 |
20090014777 | Flash Memory Devices and Methods of Manufacturing the Same - Provided are flash memory devices. Embodiments of such devices may include a tunnel insulator formed on a substrate, a charge-storage layer formed on the tunnel insulator, a lower buffer layer formed on the charge-storage layer, a blocking layer formed on the lower buffer layer, and a first gate electrode formed on the blocking layer. Such devices may include second gate electrode formed on the first gate electrode, such that the lower buffer layer includes a silicon-free insulator, the blocking layer includes oxides or ternary lanthanum compounds, and | 01-15-2009 |
20090050210 | Methods for Operating Liquid Chemical Delivery Systems Having Recycling Elements - Liquid chemical delivery systems are provided which include a liquid chemical storage canister, a pressurized gas source that feeds a pressurized gas into the storage canister, a vaporizer that may be used to vaporize the liquid chemical supplied from the storage canister, a delivery line that connects the storage canister to the vaporizer, a liquid mass flow controller that controls the flow rate of the liquid chemical through the delivery line, a reaction chamber that is connected to the vaporizer, and a liquid chemical recycling element that collects at least some of the chemical flowing through the system during periods when the liquid chemical delivery system is isolated from the reaction chamber. | 02-26-2009 |
20090096008 | NONVOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - A nonvolatile memory device having a blocking insulating layer with an excellent data retention property and a method of fabricating the same are provided. The nonvolatile memory device may include a semiconductor substrate having a channel region formed therein; and a gate stack including a tunneling insulating layer, a charge storing layer, a blocking insulating layer and a control gate electrode sequentially stacked on the channel region of the semiconductor substrate. The blocking insulating layer may comprise a lanthanum aluminum oxide having a formula of La | 04-16-2009 |
20100052041 | Nonvolatile Memory Devices Having Charge-Trap Layers Therein with Relatively High Election Affinity - Provided is a nonvolatile memory device. The nonvolatile memory device may include a tunnel insulating layer on a semiconductor substrate; a charge trap layer disposed on the tunnel insulating layer and having an electron affinity greater than a silicon nitride layer; a barrier insulating layer on the charge trap layer; a blocking insulating layer on the barrier insulating layer; and a gate electrode on the blocking insulating layer. An electron affinity of the barrier insulating layer is smaller than an electron affinity of the blocking insulating layer. | 03-04-2010 |
20100117194 | METAL-INSULATOR-METAL CAPACITORS WITH A CHEMICAL BARRIER LAYER IN A LOWER ELECTRODE - A metal-insulator-metal (MIM) capacitor includes a lower electrode, a dielectric layer, and an upper electrode. The lower electrode includes a first conductive layer, a chemical barrier layer on the first conductive layer, and a second conductive layer on the chemical barrier layer. The chemical barrier layer is between the first and second conductive layers and is a different material than the first and second conductive layers. The dielectric layer is on the lower electrode. The upper electrode is on the dielectric layer opposite to the lower electrode. The first and second conductive layers can have the same thickness. The chemical barrier layer can be thinner than each of the first and second conductive layers. Related methods are discussed. | 05-13-2010 |
20100187655 | Integrated Circuit Capacitors Having Composite Dielectric Layers Therein Containing Crystallization Inhibiting Regions and Methods of Forming Same - Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers. | 07-29-2010 |
20110278698 | Integrated Circuit Capacitors Having Composite Dielectric Layers Therein Containing Crystallization Inhibiting Regions and Methods of Forming Same - Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers. | 11-17-2011 |
20130023080 | CHEMICAL VAPOR DEPOSITION AND METHOD OF MANUFACTURING LIGHT-EMITTING DEVICE USING CHEMICAL VAPOR DEPOSITION - A chemical vapor deposition (CVD) method includes forming a first semiconductor layer on a substrate that is mounted on a satellite disk at a first process temperature; and forming a second semiconductor layer on the first semiconductor layer at a second process temperature. Also, a method of manufacturing a light-emitting device (LED) includes: forming a quantum well layer on a substrate that is mounted on a satellite disk at a first process temperature; and forming a quantum barrier layer on the quantum well layer at a second process temperature. | 01-24-2013 |
20130130465 | METHODS OF FORMING INTEGRATED CIRCUIT CAPACITORS HAVING COMPOSITE DIELECTRIC LAYERS THEREIN CONTAINING CRYSTALLIZATION INHIBITING REGIONS - Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers. | 05-23-2013 |
20130134475 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device is provided and includes an n-type semiconductor layer, a p-type semiconductor layer having a structure in which first and second doping regions including p-type impurities provided in different doping concentrations are alternately disposed one or more times; and an active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer, wherein the p-type semiconductor layer includes at least one interface between the first and second doping regions to prevent diffusion of p-type impurities. | 05-30-2013 |
20130146840 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device includes: n-type and p-type semiconductor layers; and an active layer disposed between the n-type and p-type semiconductor layers. The active layer has a structure in which a plurality of quantum well layers and a plurality of quantum barrier layers are alternately disposed, wherein the plurality of quantum well layers are made of Al | 06-13-2013 |
20130146842 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device includes first conductivity type and second conductivity type semiconductor layers, an active layer disposed between the semiconductor layers and having a structure in which one or more quantum well layers and one or more quantum barrier layers are alternately disposed An electron blocking layer is disposed between the active layer and the second conductivity type semiconductor layer. A capping layer is disposed between the active layer and the electron blocking layer and blocking a dopant element from being injected into the active layer from the second conductivity type semiconductor layer. | 06-13-2013 |
20130221398 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND FABRICATION METHOD THEREOF - A semiconductor light emitting device includes a conductive substrate, a light emitting structure, a first contact layer, a conductive via and a current interruption region. The light emitting structure is disposed on the conductive substrate and includes a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer. The first contact layer is disposed between the conductive substrate and the first conductive semiconductor layer. The conductive via is disposed to extend from the conductive substrate to be connected to the second conductive semiconductor layer. The current interruption region is disposed in a region adjacent to the conductive via in the light emitting structure. | 08-29-2013 |
20140346437 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device is provided including a first conductivity-type semiconductor layer, an active layer including at least one quantum barrier layer made of In | 11-27-2014 |