Patent application number | Description | Published |
20150041966 | Methods and Systems for Dopant Activation Using Microwave Radiation - Systems and methods are provided for activating dopants in a semiconductor structure. For example, a semiconductor structure including a plurality of dopants is provided. One or more microwave-absorption materials are provided, the microwave-absorption materials being capable of increasing an electric field density associated with the semiconductor structure. Microwave radiation is applied to the microwave-absorption materials and the semiconductor structure to activate the plurality of dopants for fabricating semiconductor devices. The microwave-absorption materials are configured to increase the electric field density in response to the microwave radiation so as to increase the semiconductor structure's absorption of the microwave radiation to activate the dopants. | 02-12-2015 |
20150053983 | SYSTEMS AND METHODS FOR DOPANT ACTIVATION USING PRE-AMORPHIZATION IMPLANTATION AND MICROWAVE RADIATION - Systems and methods are provided for dopant activation in a semiconductor structure for fabricating semiconductor devices. For example, a substrate is provided. A semiconductor structure is formed on the substrate. Pre-amorphization implantation is performed on the semiconductor structure. Microwave radiation is applied to the semiconductor structure to activate dopants in the semiconductor structure for fabricating semiconductor devices. Microwave-radiation absorption of the semiconductor structure is increased after the pre-amorphization implantation. | 02-26-2015 |
20150061026 | Semiconductor Logic Circuits Fabricated Using Multi-Layer Structures - Systems and methods are provided for fabricating a semiconductor device structure. An example semiconductor device structure includes a first device layer, a second device layer and an inter-level connection structure. The first device layer is formed on a substrate and includes a first semiconductor device, the first semiconductor device including a first electrode structure. The second device layer is formed on the first device layer and includes a second semiconductor device, the second semiconductor device including a second electrode structure. The first inter-level connection structure includes one or more first conductive materials and is configured to electrically connect to the first electrode structure and the second electrode structure. | 03-05-2015 |
20150091090 | MULTI-LAYER SEMICONDUCTOR DEVICE STRUCTURE - A semiconductor device structure and a method of fabricating a semiconductor device structure are provided. A first device layer is formed over a substrate, where an alignment structure is patterned in the first device layer. A dielectric layer is provided over the first device layer. The dielectric layer is patterned to include an opening over the alignment structure. A second device layer is formed over the dielectric layer. The second device layer is patterned using a mask layer, where the mask layer includes a structure that is aligned relative to the alignment structure. The alignment structure is visible via the opening during the patterning of the second device layer. | 04-02-2015 |
20150108575 | SYSTEMS AND METHODS FOR INTEGRATING DIFFERENT CHANNEL MATERIALS INTO A CMOS CIRCUIT BY USING A SEMICONDUCTOR STRUCTURE HAVING MULTIPLE TRANSISTOR LAYERS - A multilayer semiconductor structure having a layout footprint with a first region and a non-overlapping second region and different transistor types fabricated using different channel material. The semiconductor structure comprises a first transistor layer comprising a first type of channel material in the first region but no channel material in the second region. The semiconductor structure further comprises a second transistor layer comprising a second type of channel material in the second region but no channel material in the first region. The second transistor layer is vertically elevated above the first transistor layer. A first transistor is fabricated on the first transistor layer. A second transistor is fabricated on the second transistor layer, and the first transistor is interconnected with the second transistor to form a circuit. | 04-23-2015 |
20150123202 | SYSTEMS AND METHODS FOR A SEMICONDUCTOR STRUCTURE HAVING MULTIPLE SEMICONDUCTOR-DEVICE LAYERS - A multilayer semiconductor device structure comprising a first buried oxide and a first semiconductor device layer fabricated above the first buried oxide is provided. The first semiconductor device layer comprises a patterned top surface. The patterned surface comprises insulator material and conductor material. The surface density of the insulator material is greater than 40 percent. The multilayer semiconductor device structure further comprises a second buried oxide bonded to the patterned surface of the first semiconductor device layer and a second semiconductor device layer fabricated above the second buried oxide. | 05-07-2015 |
20150123203 | SYSTEMS AND METHODS FOR A SEMICONDUCTOR STRUCTURE HAVING MULTIPLE SEMICONDUCTOR-DEVICE LAYERS - A semiconductor structure having multiple semiconductor-device layers is provided. The semiconductor structure comprises a first buried oxide and a first semiconductor device layer fabricated above the first buried oxide. The first semiconductor device layer comprises a patterned top surface. A blanket layer comprising insulator material is fabricated over the patterned surface. The semiconductor structure further comprises a second buried oxide bonded to the blanket layer and a second semiconductor device layer fabricated above the second buried oxide. | 05-07-2015 |
20150129891 | MULTI-LAYER SEMICONDUCTOR DEVICE STRUCTURES WITH DIFFERENT CHANNEL MATERIALS - Systems and methods are provided for fabricating a semiconductor device structure. An example semiconductor device structure includes a first device layer and a second device layer formed on a first device layer. The first device layer is formed on a substrate and includes a first channel structure configured to conduct a first current, the first channel structure including a first material capable of sustaining a first processing temperature. The second device layer includes a second channel structure configured to conduct a second current, the second channel structure including a second material capable of sustaining a second processing temperature, the second processing temperature being equal to or lower than the first processing temperature. | 05-14-2015 |
20150129932 | SYSTEMS AND METHODS FOR A SEMICONDUCTOR STRUCTURE HAVING MULTIPLE SEMICONDUCTOR-DEVICE LAYERS - A method of fabricating a semiconductor structure having multiple semiconductor device layers is provided. The method comprises providing a bulk substrate and growing a first channel material on the bulk substrate wherein the lattice constant of the channel material is different from the lattice constant of the bulk substrate to introduce strain to the channel material. The method further comprises fabricating a first semiconductor device layer on the bulk substrate with the strained first channel material, fabricating a buffer layer comprising dielectric material with a blanket top surface above the first semiconductor layer, bonding to the blanket top surface a bottom surface of a second substrate comprising a buried oxide with second channel material above the buried oxide, and fabricating a second semiconductor device layer on the second substrate. | 05-14-2015 |
20150129968 | SYSTEMS AND METHODS FOR A SEMICONDUCTOR STRUCTURE HAVING MULTIPLE SEMICONDUCTOR-DEVICE LAYERS - A multilayer semiconductor device structure having different circuit functions on different semiconductor device layers is provided. The semiconductor structure comprises a first semiconductor device layer fabricated on a bulk substrate. The first semiconductor device layer comprises a first semiconductor device for performing a first circuit function. The first semiconductor device layer includes a patterned top surface of different materials. The semiconductor structure further comprises a second semiconductor device layer fabricated on a semiconductor-on-insulator (“SOI”) substrate. The second semiconductor device layer comprises a second semiconductor device for performing a second circuit function. The second circuit function is different from the first circuit function. A bonding surface coupled between the patterned top surface of the first semiconductor device layer and a bottom surface of the SOI substrate is included. The bottom surface of the SOI substrate is bonded to the patterned top surface of the first semiconductor device layer via the bonding surface. | 05-14-2015 |