Patent application number | Description | Published |
20130086292 | Systems and Methods for Hot-Plug Detection Recovery - One embodiment is a method for establishing a link between a source device and a sink device. The method comprises enabling a hot plug detect (HPD) handler in the source device, utilizing the HPD handler to receive an HPD interrupt upon the sink device being coupled to the source device, applying one or more predetermined parameters corresponding to the HPD interrupt to establish the link between the source device and the sink device, and adjusting the one or more predetermined parameters if the link between the source device and the sink device is not established. | 04-04-2013 |
20130228918 | THREE-DIMENSIONAL INTEGRATED CIRCUIT WHICH INCORPORATES A GLASS INTERPOSER AND METHOD FOR FABRICATING THE SAME - A three-dimensional integrated circuit (3D-IC) which incorporates a glass interposer and a method for fabricating the three-dimensional integrated circuit (3D-IC) with the glass interposer are described herein. In one embodiment, the 3D-IC incorporates a glass interposer which has vias formed therein which are not filled with a conductor that allow for precision metal-to-metal interconnects (for example) between redistribution layers. In another embodiment, the 3D-IC incorporates a glass interposer which has vias and has a coefficient of thermal expansion (CTE) that is different than the CTE of silicon which is 3.2 ppm/° C. | 09-05-2013 |
20130321437 | GRAPHICS PROCESSING UNIT AND MANAGEMENT METHOD THEREOF - A graphics processing unit (GPU) and a management method of the GPU are provided. The GPU includes at least one graphics engine and an engine manager. The graphics engine performs a video decoding function or a graphics rendering function according to a graphics command from a driver software. The engine manager records a workload index of each graphics engine. The engine manager also adjusts the work ability of one of or more of the at least one graphics engine according to an adjustment command from the driver software. The driver software provides the adjustment command according to the workload index. | 12-05-2013 |
20150055368 | DISPLAY DEVICE - A display device includes a back cover, a front frame, a backlight module, and a display panel. The back cover has at least one supporting structure and at least one position-limiting structure. The front frame is assembled to the back cover. The backlight module is disposed between the back cover and the front frame and includes a light guide plate (LGP), and the supporting structure supports a bottom surface of the LGP. The display panel is disposed between the backlight module and the front frame, the position-limiting structure is aligned to a side surface of the display panel, and a position of the display panel is limited by the position-limiting structure. | 02-26-2015 |
Patent application number | Description | Published |
20130268102 | AUDIO RECOGNITION SYSTEM AND METHOD - An audio recognition system includes a storage, a display, an audio player, an audio receiving module, an audio converting module, an audio database module, an audio recognition module, and a control chip. The audio receiving module receives audio signal. The audio converting module converts the audio signal to audio receiving data and stores the audio receiving data to the storage. The audio database module stores different character data and audio data. The audio recognition module finds character receiving data, first audio response data, first character response data, and sends the character receiving data and the first character response data to the control chip. The control chip displays the character receiving data and the first character response data via the display, and plays the first audio response data via the audio player. | 10-10-2013 |
20140213354 | ELECTRONIC DEVICE AND HUMAN-COMPUTER INTERACTION METHOD - An electronic device includes a base member and a display member rotatably coupled to the base member. A keyboard and a touchpad are located on a working surface of the base member. The touchpad defines a middle touch area, a left touch area, and a right touch area. The middle touch area is configured for simulating a mouse. The first and second touch areas are configured for simulating a gaming controller. A human-computer interaction method is also provided. | 07-31-2014 |
20140215250 | ELECTRONIC DEVICE AND POWER SAVING METHOD FOR ELECTRONIC DEVICE - A power saving method for an electronic device includes the following steps. The electronic device detects if an input operation is received by the electronic device. The electronic device enters a monitor mode when no input operation is detected within a predefined time. The electronic device determines if a facial feature in front of the electronic device is present while in the monitor mode with a camera. The electronic device enters a power saving mode when no facial feature is detected. | 07-31-2014 |
20140240254 | ELECTRONIC DEVICE AND HUMAN-COMPUTER INTERACTION METHOD - An electronic device includes a base member and a display member rotatably coupled to the base member. A keyboard and a touchpad are located on a working surface of the base member. When two spaced points of the touchpad are pressed and the touchpad simultaneously detects a slide touch made along a direction substantially perpendicular to a straight line determined by the two spaced points of the touchpad, the touchpad recognizes the slide touch as a scroll operation on a scroll wheel of a mouse. A human-computer interaction method is also provided. | 08-28-2014 |
20150029117 | ELECTRONIC DEVICE AND HUMAN-COMPUTER INTERACTION METHOD FOR SAME - An electronic device includes a display member rotatably coupled to a base member. A touchpad is located on a working surface of the base member. The touchpad includes a first touch area, a second touch area, and a third touch area. When the first touch area detects a palm touch gesture, the first touch area is disabled from sensing and recognizing any touch gestures and the second touch area and the third touch area are enabled to sense and recognize touch gestures. A human-computer interaction method is also disclosed. | 01-29-2015 |
Patent application number | Description | Published |
20130034948 | Method of Manufacturing a Semiconductor Device - A method for fabricating a semiconductor device is disclosed. An exemplary method includes a providing substrate. A dielectric layer is formed over the semiconductor substrate and a stop layer is formed over the dielectric layer. The stop layer and the dielectric layer comprise a different material. The method further includes forming a patterned hard mask layer over the stop layer and etching the semiconductor substrate through the patterned hard mask layer to form a plurality of trenches. The method also includes depositing an isolation material on the semiconductor substrate and substantially filling the plurality of trenches. Thereafter, performing a CMP process on the semiconductor substrate, wherein the CMP process stops on the stop layer. | 02-07-2013 |
20140042491 | GATE ELECTRODE OF FIELD EFFECT TRANSISTOR - This description relates to a gate electrode of a field effect transistor. An exemplary structure for a field effect transistor includes a substrate; a gate electrode over the substrate including a first top surface and a sidewall; a source/drain (S/D) region at least partially disposed in the substrate on one side of the gate electrode; a spacer on the sidewall distributed between the gate electrode and the S/D region; and a contact etch stop layer (CESL) adjacent to the spacer and further comprising a portion extending over the S/D region, wherein the portion has a second top surface substantially coplanar with the first top surface. | 02-13-2014 |
20140162446 | METHOD FOR REMOVING HARD MASK OXIDE AND MAKING GATE STRUCTURE OF SEMICONDUCTOR DEVICES - A method includes forming a first gate above a semiconductor substrate, forming a hard mask on the first gate, and forming a contact etch stop layer (CESL) on the hard mask. No hard mask is removed between the step of forming the hard mask and the step of forming the CESL. The method further includes forming an interlayer dielectric (ILD) layer over the CESL, and performing one or more CMP processes to planarize the ILD layer, remove the CESL on the hard mask, and remove at least one portion of the hard mask. | 06-12-2014 |
20140191333 | METHOD OF PROTECTING AN INTERLAYER DIELECTRIC LAYER AND STRUCTURE FORMED THEREBY - This description relates to a method including forming an interlayer dielectric (ILD) layer and a dummy gate structure over a substrate and forming a cavity in a top portion of the ILD layer. The method further includes forming a protective layer to fill the cavity. The method further includes planarizing the protective layer. A top surface of the planarized protective layer is level with a top surface of the dummy gate structure. This description also relates to a semiconductor device including first and second gate structures and an ILD layer formed on a substrate. The semiconductor device further includes a protective layer formed on the ILD layer, the protective layer having a different etch selectivity than the ILD layer, where a top surface of the protective layer is level with the top surfaces of the first and second gate structures. | 07-10-2014 |
20140256124 | IN-SITU METAL GATE RECESS PROCESS FOR SELF-ALIGNED CONTACT APPLICATION - A method of producing a metal gate structure. The method includes forming a gate structure above a semiconductor substrate and performing one or more chemical metal planarization (CMP) processes to planarize the formed gate structure using a CMP tool. An in situ gate etching process is performed in a CMP cleaner of the CMP tool to form a gate recess. A contact etch stop layer (CESL) can then be deposited in the formed gate recess and one or more CMP processes performed to planarize the CESL. | 09-11-2014 |
20150303118 | Wrap-Around Contact - Fin structures are formed on a substrate. An isolation region is between the fin structures. The fin structures comprise epitaxial regions extending above the isolation region. Each of the epitaxial regions has a widest mid-region between an upper-surface and an under-surface. A dual-layer etch stop is formed over the fin structures and comprises a first sub-layer and a second sub-layer. The first sub-layer is along the upper- and under-surfaces and the isolation region. The second sub-layer is over the first sub-layer and along the upper-surfaces, and the second sub-layer merges together proximate the widest mid-regions of the epitaxial regions. Portions of the dual-layer etch stop are removed from the upper- and under-surfaces. A dielectric layer is formed on the upper- and under-surfaces. A metal layer is formed on the dielectric layer on the upper-surfaces. A barrier layer is formed on the metal layer and along the under-surfaces. | 10-22-2015 |
Patent application number | Description | Published |
20110108862 | LIGHT-EMITTING-DIODE ARRAY AND METHOD FOR MANUFACTURING THE SAME - A light-emitting-diode (LED) array is disclosed which comprises a first LED device having a first electrode, a second LED device having a second electrode, wherein the first and the second LED device are formed on the same substrate and separated by a gap, at least one polymer material substantially filling the gap, and an interconnect, formed on top of the at least one polymer material, electrically connecting the first and the second electrode. | 05-12-2011 |
20120193652 | LED ARRAY FORMED BY INTERCONNECTED AND SURROUNDED LED CHIPS - A light emitting diode array includes a first light emitting diode having a first electrode and a second light emitting diode having a second electrode. The first and second light emitting diodes are separated. A first polymer layer is positioned between the light emitting diodes. An interconnect located at least partially on the first polymer layer connects the first electrode to the second electrode. A permanent substrate is coupled to the light emitting diodes. The permanent substrate is coupled to the side of the light emitting diodes with the interconnect. A second polymer layer at least partially encapsulates the side of the light emitting diodes opposite the permanent substrate (the side opposite the interconnect). | 08-02-2012 |
20120193653 | LED ARRAY FORMED BY INTERCONNECTED AND SURROUNDED LED CHIPS - A light emitting diode array includes a first light emitting diode having a first electrode and a second light emitting diode having a second electrode. The first and second light emitting diodes are separated. A first polymer layer is positioned between the light emitting diodes. An interconnect located at least partially on the first polymer layer connects the first electrode to the second electrode. A permanent substrate is coupled to the light emitting diodes. The permanent substrate is coupled to the side of the light emitting diodes opposite the interconnect. A second polymer layer at least partially encapsulates the side of the light emitting diodes with the interconnect. | 08-02-2012 |
20120211783 | LIGHT-EMITTING-DIODE ARRAY WITH MICROSTRUCTURES IN GAP BETWEEN LIGHT-EMITTING-DIODES - A light-emitting-diode (LED) array includes a first LED device having a first electrode and a second LED device having a second electrode. The first LED device and the second LED device are positioned on a common substrate. At least one polymer material is between the first LED device and the second LED device. A plurality of microsctructures are in the at least one polymer material. An interconnect is formed on top of the at least one polymer material to electrically connect the first electrode and the second electrode. | 08-23-2012 |
20120228651 | LIGHT-EMITTING-DIODE ARRAY - A light-emitting-diode (LED) array includes a first LED unit having a first electrode and a second LED unit having a second electrode. The first LED unit and the second LED unit are positioned on a common substrate and are separated by a gap. Two or more polymer materials form a multi-layered structure in the gap. A first polymer material substantially fills a lower portion of the gap and at least one additional polymer material substantially fills a remainder of the gap above the first polymer material. A kinematic viscosity of the first polymer material is less than a kinematic viscosity of the at least one additional polymer material. An interconnect, positioned on top of the at least one additional polymer material, electrically connects the first electrode and the second electrode. | 09-13-2012 |
20130020597 | POSTS IN GLUE LAYER FOR GROUP-III NITRIDE LEDS - A semiconductor light emitting device and a method for making the semiconductor light emitting device are described. The semiconductor light emitting device includes an epitaxial structure having a first type doped layer, a light emitting layer, and a second type doped layer. The epitaxial structure may further include an undoped layer. A substrate is bonded to at least one surface of the epitaxial structure with an adhesive layer. One or more posts are located in the adhesive layer. The posts may have different widths depending on the location of the posts and/or the posts may only be located under certain portions of the epitaxial structure. | 01-24-2013 |
20130023073 | USING NON-ISOLATED EPITAXIAL STRUCTURES IN GLUE BONDING FOR MULTIPLE GROUP-III NITRIDE LEDS ON A SINGLE SUBSTRATE - A method for forming a plurality of semiconductor light emitting devices includes forming an epitaxial layer having a first type doped layer, a light emitting layer, and a second type doped layer on a first temporary substrate. A second temporary substrate is coupled to an upper surface of the epitaxial layer with a first adhesive layer. The first temporary substrate is removed from the epitaxial layer to expose a bottom surface of the epitaxial layer. A permanent semiconductor substrate is coupled to the bottom surface of the epitaxial layer with a second adhesive layer. The second temporary substrate and the first adhesive layer are removed from the upper surface of the epitaxial layer. A plurality of semiconductor light emitting devices are formed from the epitaxial layer on the permanent semiconductor substrate. | 01-24-2013 |
20130023074 | USING ISOLATED EPITAXIAL STRUCTURES IN GLUE BONDING FOR MULTIPLE GROUP-III NITRIDE LEDS ON A SINGLE SUBSTRATE - A method for forming a plurality of semiconductor light emitting devices includes forming an epitaxial layer having a first type doped layer, a light emitting layer, and a second type doped layer on a first temporary substrate. The epitaxial layer is separated into a plurality of epitaxial structures on the first temporary substrate. A second temporary substrate is coupled to the epitaxial layer with a first adhesive layer and the first temporary substrate is removed from the epitaxial layer. A permanent semiconductor substrate is coupled to the epitaxial layer with a second adhesive layer. The second temporary substrate and the first adhesive layer are removed from the epitaxial layer. The permanent semiconductor substrate is separated into a plurality of portions with each portion corresponding to at least one of the plurality of epitaxial structures to form a plurality of semiconductor light emitting devices. | 01-24-2013 |
20130161654 | REFLECTIVE LAYER ON DIELECTRIC LAYER FOR LED ARRAY - A light emitting diode array is described. The array includes a first light emitting diode with a first electrode and a second light emitting diode with a second electrode. The second light emitting diode is separated from the first light emitting diode. A first dielectric layer is positioned between the first light emitting diode and the second light emitting diode. An interconnect is located at least partially on the first dielectric layer that connects the first electrode to the second electrode. A second dielectric layer is formed over the first dielectric layer and the interconnect. A reflective layer is formed over the second dielectric layer. A permanent substrate is coupled to the reflective layer. | 06-27-2013 |
20130161667 | PATTERNED REFLECTIVE LAYER ON DIELECTRIC LAYER FOR LED ARRAY - A light emitting diode array includes a first light emitting diode with a first electrode and a second light emitting diode with a second electrode. A first dielectric layer is positioned between the light emitting diodes. A first portion of the first dielectric layer at least partially covers the first light emitting diode and a second portion of the first dielectric layer at least partially covers the second light emitting diode. An interconnect is located at least partially on the first dielectric layer. The interconnect connects the first electrode to the second electrode. A reflective layer is formed over at least the first and second portions of the first dielectric layer. A permanent substrate is coupled to a side of the light emitting diodes having the reflective layer. | 06-27-2013 |
20130200419 | SEMICONDUCTOR LIGHT EMITTING COMPONENT - A semiconductor light emitting component including an epitaxial structure, a first electrode, a second electrode, a first cutout structure and a second cutout structure is provided. The epitaxial structure includes a first type doped layer, a light emitting portion and a second type doped layer. The first electrode is formed on a surface of the first type doped layer. The second electrode is formed on a surface of the second type doped layer. The first cutout structure is formed in the first type doped layer to expose at least a portion of the first electrode. The second cutout structure is formed in the first type doped layer, the light emitting portion and the second type doped layer so as to expose at least a portion of the second electrode. | 08-08-2013 |
20130277692 | STACKED LED DEVICE WITH DIAGONAL BONDING PADS - A semiconductor light emitting device includes a substrate and a first epitaxial structure over the substrate. The first epitaxial structure includes a first doped layer, a first light emitting layer, and a second doped layer. A first electrode is coupled to the first doped layer. A second electrode is coupled to the second doped layer facing the same direction as the first electrode. A second epitaxial structure includes a third doped layer, a second light emitting layer, and a fourth doped layer. A third electrode is coupled to the third doped layer facing the same direction as the first electrode. A fourth electrode is coupled to the fourth doped layer facing the same direction as the first electrode. An adhesive layer is between the first epitaxial structure and the second epitaxial structure. | 10-24-2013 |
20130285010 | STACKED LED DEVICE WITH POSTS IN ADHESIVE LAYER - A semiconductor light emitting device includes a substrate and a first epitaxial structure over the substrate. The first epitaxial structure includes a first doped layer, a first light emitting layer, and a second doped layer. The first doped layer includes a first dopant type and the second doped layer includes a second dopant type. A second epitaxial structure includes a third doped layer, a second light emitting layer, and a fourth doped layer. An adhesive layer is between the first epitaxial structure and the second epitaxial structure. One or more posts are located in the adhesive layer. | 10-31-2013 |
20130299774 | LIGHT-EMITTING DIODE DEVICE AND A METHOD OF MANUFACTURING THE SAME - A light-emitting diode (LED) device includes at least one LED unit, each including a substrate; an electrical coupling layer deposited above the substrate; a parallel-connected epitaxial structure deposited above the electrical coupling layer; and an intermediate layer deposited between the electrical coupling layer and the parallel-connected epitaxial structure. In another embodiment, the parallel-connected epitaxial structure is deposited above a conductive layer; the electrical coupling layer is deposited above the parallel-connected epitaxial structure; and the intermediate layer is deposited between the parallel-connected epitaxial structure and the electrical coupling layer. | 11-14-2013 |
20140070261 | STACKED LED DEVICE WITH POSTS IN ADHESIVE LAYER - A semiconductor light emitting device includes a substrate and a first epitaxial structure over the substrate. The first epitaxial structure includes a first doped layer, a first light emitting layer, and a second doped layer. The first doped layer includes a first dopant type and the second doped layer includes a second dopant type. A second epitaxial structure includes a third doped layer, a second light emitting layer, and a fourth doped layer. An adhesive layer is between the first epitaxial structure and the second epitaxial structure. One or more posts are located in the adhesive layer. An electrode pattern is located on an upper surface of the second epitaxial structure, wherein the posts are located under electrodes in the electrode pattern. | 03-13-2014 |