Yeh, Kaohsiung City
Chang-Ching Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20130009886 | TOUCH PANEL - An embodiment of this invention provides a touch panel, which comprises a touch screen and a display. The touch screen comprises a patterned, transparent first conductive layer comprising a sensing pattern and a shielding pattern. The touch panel features in that the touch screen employs the sensing pattern as a sensing layer, and the display employs the shielding pattern as an electrostatic protection layer. | 01-10-2013 |
| 20140198060 | TOUCH DISPLAY APPARATUS - A touch display apparatus including a display panel, a touch panel, a transparent conductive layer, and a conductive adhesive layer is provided. The touch panel is disposed on the display panel, and includes a cover lens, a touch device, and a shielding conductive ring. The touch device is disposed on the cover lens and located between the display panel and the cover lens. The shielding conductive ring is disposed on the cover lens and located between the display panel and the cover lens. The shielding conductive ring surrounds the touch device. The transparent conductive layer is disposed on the display panel and located between the display panel and the touch panel. The conductive adhesive layer is disposed between the display panel and the touch panel. The shielding conductive ring is electrically connected with the transparent conductive layer through the conductive adhesive layer. | 07-17-2014 |
Chao-Jung Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20150342710 | METHOD OF CONSTRUCTING TOOTH IMAGES USING DUAL-WAVELENGTH LIGHT - A method of constructing tooth images utilizes a probe to take images of teeth at one place using a first light ray of wavelength less than or equal to 460 nm and a second light ray of wavelength greater than or equal to 600 nm, thereby generating a first image and a second image. After receiving the first image and the second image, an image processing unit superimposes the first image and the second image to produce a composite tooth image. Using the light of wavelength less than or equal to 460 nm has the advantage of reducing reflection disturbance from saliva, thereby increasing the precision in tooth images. | 12-03-2015 |
Chao-Yung Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20150151382 | LASER PROCESSING DEVICE WITH A HIGH SPEED VIBRATION UNIT - A laser processing device has a laser source and a high speed vibration unit. The laser source has a laser-emitting end being capable of emitting a laser beam adapted to process a workpiece. The high speed vibration unit is located on a moving path of the laser beam and is capable of vibrating periodically along a direction parallel to the moving path of the laser beam such that the focusing point of the laser beam moves periodically on the workpiece at high speed. The laser processing device with the fast moving focusing point is able to efficiently process parts of the workpiece at specific depths. Therefore, product quality and production rate are increased. | 06-04-2015 |
Chia-Haw Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20150235879 | DEVICE AND METHOD FOR WAFER TAPING - In accordance with some embodiments, a wafer taping device is provided. The wafer taping device includes a tape delivering along a first direction. The wafer taping device also includes a wafer mount unit disposed below the tape. The wafer mount unit has an upper surface for supporting a wafer and having a notch for allowing a cut mark of the wafer to align with it. The notch is staggered with a second direction in the upper surface, and the second direction is substantially perpendicular to the first direction. In addition, the wafer taping device includes a laminating roller disposed above the wafer mount unit and having a long axis elongated in the second direction. The laminating roller is configured to reciprocate along the first direction for pressing the tape to the wafer. | 08-20-2015 |
Chien-Liang Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090028023 | OPTICAL DISC IDENTIFICATION APPARATUS AND METHOD OF IDENTIFYING OPTICAL DISC - An optical disc identification apparatus is disclosed. The optical disc identification apparatus includes an optic pickup unit and a control unit. The optic pickup unit has a plurality of laser sources. The optic pickup unit emits any of lasers to the optical disc and detects the reflected laser from the optical disc to transduce the reflected laser to a detection signal. The control unit controls the optic pickup unit to activate any of the laser sources and moves an object lens of the optic pickup unit. When the object lens moves, the control unit obtains a sectional width value of an S-curve of a focus FE signal according to the detection signal. The control unit repeats above steps to obtain the sectional width values of the S-curves of all the laser sources and identifies the optical disc according to all the sectional width values. | 01-29-2009 |
| 20090323480 | OPTICAL STORAGE SYSTEM AND SPHERICAL ABERRATION COMPENSATION APPARATUS AND METHOD THEREOF - An optical storage system and a spherical aberration (SA) compensation apparatus and method thereof are provided. The SA compensation apparatus includes a microprocessor and a digital-signal-processor (DSP). The microprocessor regulates a compensation value of an SA compensation driver in the optical-pickup-head (OPH) several times after the microprocessor has determined the type of an optical storage medium and before the OPH has not focused on the optical storage medium. The DSP processes a plurality of electrical signals converted through the OPH whenever the microprocessor has regulated the compensation value of the SA compensation driver, so as to obtain width values of a plurality of focus-error (FE) signals. Accordingly, the microprocessor makes the SA compensation driver to drive an SA compensation unit according to the width values of the FE signals, so as to compensate an SA of the light point generated by the OPH and focused on the optical storage medium. | 12-31-2009 |
| 20110058464 | METHOD AND DEVICE FOR IDENTIFYING OPTICAL DISC - An optical disc identifying device includes an optical pickup head, a digital signal processor and a radio frequency amplifier. The optical pickup head has a plurality of laser diodes and a lens. During a start-up procedure, a non-blue laser diode of the optical pickup head is turned on to irradiate a loaded optical disc, thereby generating an electronic signal. The digital signal processor outputs a driving signal, thereby controlling a motor driver to move the lens in a focusing direction. The radio frequency amplifier receives the electronic signal during the movement of the lens, thereby generating a first signal. The digital signal processor includes a detecting unit for comparing the first signal with a slicing signal to generate a pulse signal, and determining whether the optical disc is a blue-ray disc or a non-blue-ray disc according to a pulse number of the pulse signal. | 03-10-2011 |
| 20110158614 | MOTOR ROTATION SPEED CONTROL DEVICE AND METHOD THEREOF - A motor rotational speed control device for controlling a direct current (DC) brush motor is provided, which includes a motor driver, a detection unit and a central processing unit (CPU). The motor driver is coupled to a first control terminal and a second control terminal of the DC brush motor. The detection unit detects a back electromotive force (EMF) of the DC brush motor through the first control terminal and the second control terminal when the motor driver is set to a disable state, and accordingly generates back EMF information. The CPU determines whether the direct current brush motor has stopped rotating according to the back EMF information, and determines whether to generate a brake control signal according to a determination result. The motor driver reduces a rotation speed of the DC brush motor according to the brake control signal when the motor driver is set to an enable state. | 06-30-2011 |
| 20120075971 | METHOD FOR DETERMINING TYPE OF OPTICAL DISK AND OPTICAL STORAGE DEVICE - A method for determining a type of an optical disk includes following steps. A laser beam of a first type is focused on a disk to generate a first optical reflection signal. A first spherical aberration estimate is generated according to the degree of dispersion and strength of the first optical reflection signal. A laser beam of a second type is focused on the disk to generate a second optical reflection signal. A second spherical aberration estimate is generated according to the degree of dispersion and strength of the second optical reflection signal. The type of the disk is determined based on the first spherical aberration estimate and the second spherical aberration estimate. | 03-29-2012 |
Chien-Nan Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20140103824 | LAMP - A lamp includes a lamp tube, a carrier, a light bar circuit board, a driver circuit board, a plurality of first luminous elements and a parallel-connected type luminous unit. The carrier is accommodated in the lamp tube. The light bar circuit board is disposed on the carrier. The driver circuit board is disposed on the carrier and adjoins the light bar circuit board. The first luminous elements are disposed on the light bar circuit board. The parallel-connected type luminous unit is disposed on the driver circuit board, and includes a plurality of luminous element groups connected in parallel. | 04-17-2014 |
Chih-Hsin Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20140327352 | SLIDE ASSEMBLY WITH DECELERATION DEVICE - A slide assembly includes a first rail, a second rail, a stop member and a friction member. The first rail includes two sidewalls with a connection wall connected therebetween. The second rail is slidably located between the two sidewalls of the first rail. The stop member is fixed to the connection wall and has a stop plate which is perpendicular to the connection wall. The friction member is fixed to the second rail and has an extension portion. The extension portion has a guide face. When the second rail is moved relative to the first rail after the friction member touches the stop plate and overlaps the stop member by the guide face, the friction member is slidably and flexibly in contact with the stop plate. | 11-06-2014 |
| 20150136722 | SLIDE RAIL ASSEMBLY FOR RACK SYSTEM - A slide rail assembly for a rack system is installed to a chassis. The chassis includes a first chassis and a second chassis. The slide rail assembly includes an outer rail and an inner rail. The inner rail is movably connected to the outer rail. The first chassis of the chassis is installed to the inner rail, and the second chassis of the chassis is movably connected to the inner rail. The second chassis is movable relative to the first chassis to adjust the total length of the chassis. | 05-21-2015 |
Chin-Cheng Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20150082651 | APPARATUS OF MEASURING WORKPIECE - The apparatus of measuring a workpiece according to the present disclosure includes a base, a measuring member, an upper arm member, a lower arm member, a first pin and a second pin, wherein the upper arm member includes an upper rotation frame and the lower arm member includes a lower rotation frame. When the first pin is moved to disconnect the upper rotation frame from the lower rotation frame, the upper rotation frame is rotatable. When the second pin is moved to lock the lower rotation frame to the measuring member, the lower rotation frame is free of rotation. When the first pin is moved to connect the upper rotation frame and the lower rotation frame with each other and when the second pin is moved to unlock the lower rotation frame from the measuring member, the lower rotation frame is rotatable with the upper rotation frame. | 03-26-2015 |
Chin Zeng Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20140138734 | MODULE STRUCTURE - Disclosed is a module structure including a front sheet, a back sheet, and an optoelectronic device disposed between the front sheet and the back sheet. A first packaging layer is disposed between the optoelectronic device and the front sheet. The back sheet is a layered structure of a hydrogenated styrene elastomer resin layer and a polyolefin layer, wherein the hydrogenated styrene elastomer resin layer is disposed between the optoelectronic device and the polyolefin layer. | 05-22-2014 |
| 20140140012 | MODULE STRUCTURE - Disclosed is a module structure including a front sheet, a back sheet, and an optotronic device disposed between the front sheet and the back sheet. A first encapsulate layer is disposed between the optotronic device and the front sheet. A second encapsulate layer is disposed between the optotronic device and the back sheet. The back sheet is a layered structure of a hydrogenated styrene elastomer resin layer and a polyolefin layer, wherein the hydrogenated styrene elastomer resin layer is disposed between the second encapsulate layer and the polyolefin layer. | 05-22-2014 |
| 20150187976 | Composition of an Encapsulation Film for a Solar Cell Module - A composition of an encapsulation film for a solar cell module comprises 80˜99 weight percent of transparent resin, 0.5˜10 weight percent of granular polymer particles and 0.1˜5 weight percent of additives, wherein light refraction is controlled by a diffusion mechanism of the granular polymer particles, so that the probability of light incidence on the solar cell is increased and thus the photoelectric conversion efficiency of the solar cell is improved. | 07-02-2015 |
Chiung-Wei Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20140331912 | APPARATUS USING AN ELECTRO-CATALYTIC COATING TO REDUCE SHIP'S FRICTION AND PREVENT BIOFOULING - An apparatus for friction reduction and biofouling prevention is invented, which consists of an anodic electro-catalytic layer and a cathodic electro-catalytic layer installed on the submerged surface of a carrier. There is an insulating filling between the anodic layer and the cathodic layer. The layered coatings are applied with the use of electric arc spraying technique. A first DC power supply unit is connected to the anodic layer and the cathodic layer. The anodic layer, the cathodic layer, the DC power supply unit, and water together form the conducting path for water electro-catalysis. Hydrogen and oxygen gases are produced to form a thin gas film on the submerged surface to reduce friction and prevent biofouling on the carrier. Alternatively, the apparatus produces hydroxyl radicals to kill marine microorganisms and reduce the risk of biofouling and biocorrosion. | 11-13-2014 |
Chun-Pin Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20140042229 | METHOD OF READING MULTIPLE TWO DIMENSIONAL BARCODES - A method of reading multiple two dimensional barcodes includes the steps of obtaining an image including a plurality of positioning patterns and the two dimensional barcodes, defining a reading area within the image according the positioning patterns, dividing the reading area into a plurality of reading blocks, which contain the two dimensional barcodes, respectively, and reading the two dimensional barcodes in the reading blocks individually. | 02-13-2014 |
Feng-Chih Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090073131 | METHOD FOR DETERMINING MULTIPLE TOUCH INPUTS ON A RESISTIVE TOUCH SCREEN AND A MULTIPLE TOUCH CONTROLLER - The present invention provides a method for determining multiple touch inputs on a resistive touch screen, the method comprises determining a touching sequence between a first object and a second object when the first object and the second object touch the resistive touch screen respectively; calculating coordinate of a first point and coordinate of a midpoint according to voltage drop in the resistive touch screen meanwhile the first object keeps touching the resistive touch screen; and calculating coordinate of a second point according to coordinate of the first point and coordinate of the midpoint. | 03-19-2009 |
Jen-Hao Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20130161689 | INSULATED GATE BIPOLAR TRANSISTOR STRUCTURE HAVING LOW SUBSTRATE LEAKAGE - A high voltage laterally diffused metal-oxide-semiconductor (HV LDMOS) device, particularly an insulated gate bipolar junction transistor (IGBT), and a method of making it are provided in this disclosure. The device includes a semiconductor substrate having at least one highly doped buried portion, a first doped well grown over the substrate, a gate structure formed on the first well, a source and a drain formed on either side of the gate structure, and a second doped well having a U-shaped cross section formed in the first well. A portion of the drain is formed over the first well outside of the second well. | 06-27-2013 |
| 20130207187 | INSULATED GATE BIPOLAR TRANSISTOR STRUCTURE HAVING LOW SUBSTRATE LEAKAGE - A high voltage metal-oxide-semiconductor laterally diffused device (HV LDMOS), particularly an insulated gate bipolar junction transistor (IGBT), and a method of making it are provided in this disclosure. The device includes a semiconductor substrate, a gate structure formed on the substrate, a source and a drain formed in the substrate on either side of the gate structure, a first doped well formed in the substrate, and a second doped well formed in the first well. The gate, source, second doped well, a portion of the first well, and a portion of the drain structure are surrounded by a deep trench isolation feature and an implanted oxygen layer in the silicon substrate. | 08-15-2013 |
| 20130313617 | Embedded JFETs for High Voltage Applications - A device includes a buried well region and a first HVW region of the first conductivity, and an insulation region over the first HVW region. A drain region of the first conductivity type is disposed on a first side of the insulation region and in a top surface region of the first HVW region. A first well region and a second well region of a second conductivity type opposite the first conductivity type are on the second side of the insulation region. A second HVW region of the first conductivity type is disposed between the first and the second well regions, wherein the second HVW region is connected to the buried well region. A source region of the first conductivity type is in a top surface region of the second HVW region, wherein the source region, the drain region, and the buried well region form a JFET. | 11-28-2013 |
| 20140021560 | HIGH VOLTAGE DEVICE WITH A PARALLEL RESISTOR - Provided is a high voltage semiconductor device. The high voltage semiconductor device includes a transistor having a gate, a source, and a drain. The source and the drain are formed in a doped substrate and are separated by a drift region of the substrate. The gate is formed over the drift region and between the source and the drain. The transistor is configured to handle high voltage conditions that are at least a few hundred volts. The high voltage semiconductor device includes a dielectric structure formed between the source and the drain of the transistor. The dielectric structure protrudes into and out of the substrate. Different parts of the dielectric structure have uneven thicknesses. The high voltage semiconductor device includes a resistor formed over the dielectric structure. The resistor has a plurality of winding segments that are substantially evenly spaced apart. | 01-23-2014 |
| 20140035035 | INSULATED GATE BIPOLAR TRANSISTOR STRUCTURE HAVING LOW SUBSTRATE LEAKAGE - A high voltage metal-oxide-semiconductor laterally diffused device (HV LDMOS), particularly an insulated gate bipolar junction transistor (IGBT), and a method of making it are provided in this disclosure. The device includes a semiconductor substrate, a gate structure formed on the substrate, a source and a drain formed in the substrate on either side of the gate structure, a first doped well formed in the substrate, and a second doped well formed in the first well. The gate, source, second doped well, a portion of the first well, and a portion of the drain structure are surrounded by a deep trench isolation feature and an implanted oxygen layer in the silicon substrate. | 02-06-2014 |
| 20140139282 | Embedded JFETs for High Voltage Applications - A device includes a buried well region and a first HVW region of the first conductivity, and an insulation region over the first HVW region. A drain region of the first conductivity type is disposed on a first side of the insulation region and in a top surface region of the first HVW region. A first well region and a second well region of a second conductivity type opposite the first conductivity type are on the second side of the insulation region. A second HVW region of the first conductivity type is disposed between the first and the second well regions, wherein the second HVW region is connected to the buried well region. A source region of the first conductivity type is in a top surface region of the second HVW region, wherein the source region, the drain region, and the buried well region form a JFET. | 05-22-2014 |
| 20140231884 | BOOTSTRAP MOS FOR HIGH VOLTAGE APPLICATIONS - A device includes a p-well region, and a first High-Voltage N-type Well (HVNW) region and a second HVNW region contacting opposite edges of the p-well region. A P-type Buried Layer (PBL) has opposite edges in contact with the first HVNW region and the second HVNW region. An n-type buried well region is underlying the PBL. The p-well region and the n-type buried well region are in contact with a top surface and a bottom surface, respectively, of the PBL. The device further includes a n-well region in a top portion of the p-well region, an n-type source region in the n-well region, a gate stack overlapping a portion of the p-well region and a portion of the second HVNW region, and a channel region under the gate stack. The channel region interconnects the n-well region and the second HVNW region. | 08-21-2014 |
| 20140239450 | GUARD STRUCTURE FOR SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING GUARD LAYOUT PATTERN FOR SEMICONDUCTOR LAYOUT PATTERN - A guard structure for a semiconductor structure is provided. The guard structure includes a first guard ring, a second guard ring and a third guard ring. The first guard ring has a first conductivity type. The second guard ring has a second conductivity type, and surrounds the first guard ring. The third guard ring has the first conductivity type, and surrounds the second guard ring, wherein the first, the second and the third guard rings are grounded. A method of forming a guard layout pattern for a semiconductor layout pattern is also provided. | 08-28-2014 |
| 20150072496 | METHOD OF MAKING AN INSULATED GATE BIPOLAR TRANSISTOR STRUCTURE - A method for fabricating a high voltage semiconductor transistor includes growing a first well region over a substrate having a first conductivity type, the first well region having a second type of conductivity. First, second and third portions of a second well region having the first type of conductivity are doped into the first well region. A first insulating layer is grown in and over the first well portion within the second well region. A second insulating layer is grown on the substrate over the third portion of the second well region. An anti-punch through region is doped into the first well region. A gate structure is formed on the substrate. A source region is formed in the first portion of the second well region on an opposite side of the gate structure from the first insulating layer. A drain region is formed in the first well region. | 03-12-2015 |
| 20160056303 | Bootstrap MOS for High Voltage Applications - A device includes a p-well region, and a first High-Voltage N-type Well (HVNW) region and a second HVNW region contacting opposite edges of the p-well region. A P-type Buried Layer (PBL) has opposite edges in contact with the first HVNW region and the second HVNW region. An n-type buried well region is underlying the PBL. The p-well region and the n-type buried well region are in contact with a top surface and a bottom surface, respectively, of the PBL. The device further includes a n-well region in a top portion of the p-well region, an n-type source region in the n-well region, a gate stack overlapping a portion of the p-well region and a portion of the second HVNW region, and a channel region under the gate stack. The channel region interconnects the n-well region and the second HVNW region. | 02-25-2016 |
Jiann-Yih Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090312406 | COUMARIN COMPOUNDS AND THEIR USE FOR TREATING VIRAL INFECTION - A method for treating an infection with a virus. The method includes administering to a subject in need thereof an effective amount of one or more coumarin compounds of formula (I): | 12-17-2009 |
Jwu-Lai Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090209560 | ANTI-INFLAMMATION ACTIVITY OF NEWLY SYNTHESIZED XANTHINE DERIVATIVES KMUP-1 AND KMUP-3 - An anti-inflammation substrate for decreasing the proinflammation induced by the cytokines and inhibiting the lung function degeneration is provided. The anti-inflammation substrate includes one selected from the group consisting of a 7-[2-[4-(2-chlorobenzene)piperazinyl]ethyl]-1,3-dimethylxanthine, a 7-[2-[4-(4-nitrobenzene)piperazinyl]ethyl]-1,3-dimethylxanthine, a respective pharmaceutical acceptable salt thereof, and a combination thereof. | 08-20-2009 |
| 20120184570 | Theophylline Derivative Inhibits Osteoporosis - The theophylline derivative disclosed in the present invention is characterized by having the pharmaceutical functions of osteoporosis. The theophylline derivative protects against bone resorption and inflammatory mediator infiltration. | 07-19-2012 |
Kun-Ming Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110068305 | Polymerizable composition and its uses - The present invention provides a polymerizable composition, comprising, based on the total weight of the polymerizable composition: | 03-24-2011 |
Kuo-An Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20130153285 | MAGNETIC FIELD SHIELDING RAISED FLOOR PANEL - A magnetic field shielding raised floor panel having a plurality of grain-oriented electrical steel (GOES) sections. The orientation of each GOES section is parallel to a top surface of the section. The plurality of GOES sections can include sidewall and lip portions. The plurality of GOES sections can be perforated to permit air flow through the GOES section. Openings in adjacent perforated GOES sections do not substantially overlap. | 06-20-2013 |
Lan-Kai Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100229394 | METHOD FOR FABRICATING WICK MICROSTRUCTURES IN HEAT PIPES - The invention provides a method for fabricating wick microstructures in heat pipes, comprising the following steps: providing a flat plate and a mold with several molding holes; filling a dry powder material in the several molding holes and putting the mold to cover the flat plate so as to form an object to be sintered; sintering the object; and removing the mold to form a flat plate with wick microstructures. The wick microstructures are arranged on the flat plate in a form of microgrooves, microcylinders or any combination of them. The flat plate with wick microstructures is further processed to form a heat pipe with a characteristic shape and having two kinds of wick microstructures such that the heat transferred by the heat pipe is increased and the occurrence of dry out of the heat pipe is delayed. | 09-16-2010 |
Leaf Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20130161689 | INSULATED GATE BIPOLAR TRANSISTOR STRUCTURE HAVING LOW SUBSTRATE LEAKAGE - A high voltage laterally diffused metal-oxide-semiconductor (HV LDMOS) device, particularly an insulated gate bipolar junction transistor (IGBT), and a method of making it are provided in this disclosure. The device includes a semiconductor substrate having at least one highly doped buried portion, a first doped well grown over the substrate, a gate structure formed on the first well, a source and a drain formed on either side of the gate structure, and a second doped well having a U-shaped cross section formed in the first well. A portion of the drain is formed over the first well outside of the second well. | 06-27-2013 |
Li-Ya Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110164212 | DISPLAY PANEL USING LASER CUTTING TECHNOLOGY AND THE MOTHER SUBSTRATE THEREOF - A display panel using laser cutting technology and a mother substrate thereof are provided. The display panel comprises two base plates opposite to each other, a sealant and a buffering metal layer. The sealant is disposed between the two base plates. The buffering metal layer formed on the inside surface of at least one of the two base plates is disposed along the sealant. At least a portion of the buffering metal layer is positioned outside the sealant. There is a first distance between the rim of the buffering metal layer and the edge of the base plate. | 07-07-2011 |
Mei-Chao Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090160517 | FLIP-FLOP - An apparatus comprises a first stage, a second stage, and a switch circuit. The first stage and the second stage are coupled between a first reference voltage and a second reference voltage. The first stage has a first input end for receiving an input signal and a first output end for outputting a first output signal. The second stage has a second input end for receiving the first output signal from the first output end of the first stage and a second output end for outputting a second output signal. The switch circuit is coupled between the second stage and at least one of the first reference voltage and the second reference voltage for receiving a power control signal and for turning on or turning off according to the power control signal such that the current leakage of the second stage is reduced. | 06-25-2009 |
| 20110299578 | DATA TRANSMITTING AND RECEIVING METHOD AND DEVICE FOR COMMUNICATION AND SYSTEM THEREOF - A data transmitting and receiving device and method are used for saving powers and maintaining the connection quality, stability and continuous link. The method includes the step of gradually adjusting the de-emphasis of the signal transmitted from the data transmitting and receiving device according to the setting value thereof. The method also includes the steps of transmitting training sequence signal with an amplitude and the default de-emphasis by the data transmitting and receiving device to the remote device, receiving the training sequence signal from the remote device, thereby the channel attenuation is estimated using the method, and a better de-emphasis is set up. Then, the data transmitting and receiving device gradually increases the amplitude of the training sequence signal and re-transmits it until the remote device receives the training sequence signal transmitted therefrom. | 12-08-2011 |
Nan-Hui Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100154681 | METHOD FOR MANUFACTURING BIOMEDICAL BONE FILLER WITH CONCRETE CHARACTERISTIC - A method for manufacturing a biomedical bone filler includes the steps of: mixing different size of granule and slag of hemihydrate calcium sulfate with particles of hemihydrate calcium sulfate at a predetermined particle ratio and powders/water ratio; and hardening the composite material by controlling relative humidity and temperature during the hydrated hardening process so as to increase the hardness of the bone filler. | 06-24-2010 |
Nan-Ting Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090187394 | HDL RE-SIMULATION FROM CHECKPOINTS - A computer-based simulation process executes a checkpoint operation while simulating behavior of an electronic circuit by forking an active checkpoint process having the same state as the original simulation process. While simulation time for the simulation process continues to increase after executing the checkpoint operation, simulation time for the checkpoint process remains unchanged so that the checkpoint process remains in the state of the simulation at the simulation time it executed the checkpoint operation (the “checkpoint time”). When the checkpoint process subsequently receives a request to resume simulating the circuit, it forks a new simulation process that mimics the original simulation process as of checkpoint time, and the new simulation process then begins to advance its simulation time, thereby enabling it to re-simulate behavior of the electronic circuit previously simulated by the original simulation process starting from the checkpoint time. | 07-23-2009 |
Pi-Chien Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20150380840 | MULTI-CABLE CONNECTOR - A multi-cable connector includes a main body, a plurality of cable assemblies, and a fixing unit. The cable assemblies are inserted into the main body. Each cable assembly has a connecting head and a cable. The fixing unit is installed on the main body. The fixing unit has a plurality of notches for providing the cables to respectively couple there-through. The fixing unit abuts against the connecting heads for holding the connecting heads between the main body and the fixing unit. | 12-31-2015 |
Sheng-Jen Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120244199 | Skin Nourishing Ball - A skin nourishing ball is disclosed. The skin nourishing ball has as a transparent ball body that includes a casing made of fish-scale collagen and a fish embryo extract particle enclosed in the casing. The fish embryo extract is taken from a fertilized fish embryo and therefore highly stable against deterioration. In addition, the fish embryo extract is effective in reducing fine lines on the skin, improving skin elasticity, and enhancing the spontaneous moisture-retaining ability of skin. Due to the granular configuration of the skin nourishing ball, it is possible not only to take a specific quantity of such balls for use, but also to control the quantity with ease, thereby preventing the user from applying an excessive or insufficient quantity of the skin nourishing balls to the skin. | 09-27-2012 |
Shiao-Chian Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20130207265 | STRUCTURE AND METHOD OF MAKING THE SAME - A structure includes a substrate, a first supporting member over the substrate, a second supporting member over the substrate, and a layer of material over the substrate and covering the first supporting member and the second supporting member. The first supporting member has a first width, and the second supporting member has a second width. The first supporting member and the second supporting member are separated by a gap region. The first width is at least 10 times the second width, and a gap width of the gap region ranges from 5 to 30 times the second width. | 08-15-2013 |
| 20130320451 | SEMICONDUCTOR DEVICE HAVING NON-ORTHOGONAL ELEMENT - The present disclosure provides a device includes a first gate structure segment and a collinear second gate structure segment, as well as a third gate structure segment and a collinear fourth gate structure segment. An interconnection extends from the first gate structure segment to the fourth gate structure segment. The interconnection is disposed above the first gate structure segment and the fourth gate structure segment. The interconnection may be formed on or co-planar with a contact layer of the semiconductor device. | 12-05-2013 |
| 20150037976 | METHOD OF MAKING A STRUCTURE - A method of making a structure includes forming a first supporting member over a substrate, the first supporting member comprising a first material and having a first width defined along a reference plane. The method further includes forming a second supporting member over the substrate, the second supporting member having a second width defined along the reference plane, and the first supporting member and the second supporting member being separated by a gap region. The first width is at least 10 times the second width, and a gap width of the gap region being from 5 to 30 times the second width. | 02-05-2015 |
Sung-Wei Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20150203940 | BRASS ALLOY AND METHOD FOR MANUFACTURING THE SAME - A brass alloy, with a total weight percentage thereof counted as 100 wt %, includes the following elements: 60 wt % to 65 wt % of copper, 0.1 wt % to 0.35 wt % of bismuth, 0.15 wt % to 0.5 wt % of antimony, a balance of zinc, and an inevitable impurity. | 07-23-2015 |
Tai-Hao Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20150050897 | TRANSCEIVER WITH WAKE UP DETECTION - A transceiver with wake up detection includes a primary control unit, a transmission unit and a receiving unit, the transmission unit comprises a first logic set, a second logic set, a third logic set, a first loop, and a second loop. The first loop outputs a first differential signal, and the second loop outputs a second differential signal. The receiving unit comprises a wake up detection circuit having a first comparator, a second comparator and a fourth logic set. When the first comparator and the second comparator receive a first predetermined level of the first differential signal and a second predetermined level of the second differential signal, the fourth logic set outputs an idle state signal and a data signal to the primary control unit to make an operation mode of the transceiver switched from a low power mode to a normal mode. | 02-19-2015 |
Ting-Chu Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20160056300 | THIN FILM TRANSISTOR AND FABRICATING METHOD THEREOF - A thin film transistor and a fabricating method thereof is provided. The thin film transistor includes a gate, a gate insulation layer, a semiconductor layer, a conductive pattern, a first electrode and a second electrode. The gate is disposed on a substrate. The gate insulation layer is disposed on the substrate to cover the gate. | 02-25-2016 |
Ti-Shun Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120225248 | ARTIFICIAL LEATHER HAVING COMPOSITE FIBER AND METHOD FOR MAKING THE SAME - The present invention relates to an artificial leather having composite fibers and a method for making the same. The artificial leather includes a substrate and a flexible film. The substrate includes a plurality of composite fibers. Each composite fiber includes a first composition and a second composition. The first composition is a thermoplastic non-elastomer, and the second composition is a thermoplastic elastomer. The second composition accounts for 5% to 70% of the total weight of the composite fiber. The second composition at the intersecting points between the composite fibers is molten to form a flexible bonding point. | 09-06-2012 |
Tseng-Fu Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20150088347 | DRIVING MODE SWITCHING DEVICE FOR ELECTRIC GEAR BOX - A driving mode switching device for an electric gear box includes a body having a room and a clutch member is located in the room. A first active gear and a second active gear are located in the room, the first and second active gears are co-axially connected to each other. The second active gear is engaged with a passive gear which is co-axially connected with a transmission gear. A motor unit has an output shaft located in the room. The output shaft has a toothed portion engaged with the first active gear. The motor unit drives the first and second active gears. The passive gear drives the transmission gear. The clutch member shifts the passive gear axially to disengage the passive gear from the second active gear. The body is connected to and provides power to a bicycle, a motorcycle, or a tri-wheel vehicle. | 03-26-2015 |
| 20150100393 | TOLL CHARGING DEVICE - A toll charging device includes a body having a toll unit and the toll unit is connected with a detection unit which generates a corresponding detection signal when detecting the value of a coin/bill. A control unit is connected with a counting unit and the detection unit. The control unit receives the detection signal and sets a pre-set period of time to the counting unit. At least one power output port is connected with the control unit and outputs electric power according to the time counted by the counting unit. The at least one power output port is stopped when the pre-set period of time is ended. The toll charging device charges electric/electronic devices according to the coin/bill inserted into the toll unit. The toll charging device outputs direct current and alternating current. | 04-09-2015 |
Tsung-Pao Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20130196461 | MANUFACTURING METHOD OF A LIGHT-EMITTING DEVICE - A method for manufacturing a light-emitting device includes steps of: providing a light-emitting wafer including an upper surface and a lower surface opposite to the upper surface; setting a plurality of scribing streets on the upper surface of the light-emitting wafer; irradiating a laser beam to form a plurality of cutting regions along the scribing streets, wherein each of the plurality of cutting regions has a sharp end, or the plurality of cutting regions forms a specific pattern in a cross-sectional view; and forming a plurality of light-emitting devices by connecting the plurality of cutting regions and extending the plurality of cutting regions from the respective sharp ends thereof to the lower surface of the light-emitting wafer. | 08-01-2013 |
Yao-Tsung Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110098219 | System for Curing Hepatic Cancer with Leptin - The present invention cures hepatic cancer by MPA with the help of leptin. A therapeutic drug of MPA combined with leptin is applied to a liver cancer patient. Or, MPA can be directly applied to a patient having a high leptin expression. Or, if a patient has a low leptin expression, MPA is applied to the patient after leptin expression is increased. Hence, expression of leptin can be taken as a predictive factor and a prognostic factor of treatment effect on curing the patient with MPA. | 04-28-2011 |
Ying-Jyh Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110063227 | PHASE-TAGGED CAPACITANCE SENSING CIRCUIT AND ELECTRONIC DEVICE USING THE SAME - An electronic device includes a touch panel, a driving circuit, and a sensing circuit. The driving circuit generates a driving signal, and superposes phase information on the driving signal. The touch panel includes multiple crossing conductors, for providing a sensing signal in response to a contact of an object on one of the sensing conductors and to a driving signal applied on the sensing element. The sensing circuit includes a signal extractor and a tag detector. The signal extractor generates a demodulation signal based on the period of the driving signal, width of the phase information, and for demodulating the sensing signal by using the demodulation signal to determine a sensing value. The tag detector enables the signal extractor as soon as a magnitude of the sensing signal is over a predetermined threshold. The signal demodulates the sensing signal by using a demodulation signal whose period is the same as the driving signal to determine the sensing value. The present electronic device can determine a touch position by processing of analog signal using the demodulation signal without phase compensation. | 03-17-2011 |
| 20130015906 | Touch Panel DeviceAANM Yeh; Ying-JyhAACI Kaohsiung CityAACO TWAAGP Yeh; Ying-Jyh Kaohsiung City TW - A touch panel device includes a touch panel and a controller. The touch panel includes a first region and a second region. The first region includes a plurality of first driving conductors extended along a first direction, and a plurality of first sensing conductors extended along a second direction perpendicular to the first direction. The second region includes a plurality of second driving conductors extended along the first direction, and a plurality of second sensing conductors extended along the second direction. The controller is used for outputting a plurality of driving signals in an ordered sequence of the second direction to drive the plurality of first driving conductors and the plurality of second driving conductors, and for receiving a plurality of sensing signals from the plurality of first sensing conductors and the plurality of second sensing conductors in an ordered sequence of the first direction. | 01-17-2013 |
| 20130016051 | Touch Panel Device Having a Divided ITO layer for Reducing Loading - A touch panel device includes a touch panel and two or more controllers. The touch panel includes four regions. Each region includes a plurality of driving conductors extended along a first direction, and a plurality of sensing conductors extended along a second direction perpendicular to the first direction. Each controller is in charge of one of the region. Since the length of each driving conductor and each sensing conductors is one half of that of the conventional driving conductor and sensing conductor, each controller controls one fourth of the area of the touch panel, and is responsible for one fourth of the capacitance of the touch panel. The touch panel device can be well controlled by the controller without using a single controller with higher detecting sensibility and cost. | 01-17-2013 |
Yi-Te Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110018819 | Touch Panel Interface System Used on Touch Panel, Touch device, and Method thereof - For solving the defect that a hardware clock of a serial peripheral interface bus has to cooperate with slower software-simulated clocks used by a microprocessor while applying serial peripheral interface buses on a large-scale touch panel, a programmable logic device is used as a bridge of communicating information between the micro processor and sensors. Therefore, the microprocessor no longer has to take execution time to simulate serial peripheral interface buses by software, and is able to program hardware clocks of each of the serial peripheral interface buses according to speed requirements of different sensors, so that sensing signals of a plurality of sensors may be integrated on a touch device having the large-scale touch panel, and a processing speed of the touch device in processing the sensing signals may be optimized as a result. | 01-27-2011 |
Yu-Ling Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20160062197 | PIXEL STRUCTURE - A pixel structure is provided. The pixel structure includes a scan line, a data line, an active device, a pixel electrode, and a common electrode. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The pixel electrode includes multiple first layer pixel electrode patterns and multiple second layer pixel electrode patterns. The common electrode includes a plurality of first layer common electrode patterns and a plurality of second layer common electrode patterns. A fringe electric field is between each first layer pixel electrode pattern and corresponding portion of second layer common electrode patterns, and between each first layer common electrode pattern and corresponding portion of second layer pixel electrode patterns. A horizontal electric field is between each second layer pixel electrode pattern and the adjacent portion of second layer common electrode patterns. | 03-03-2016 |
Yu-Lung Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120181657 | Forming Metal-Insulator-Metal Capacitors Over a Top Metal Layer - A plurality of metal layers includes a top metal layer. An Ultra-Thick Metal (UTM) layer is disposed over the top metal layer, wherein no additional metal layer is located between the UTM layer and the top metal layer. A Metal-Insulator-Metal (MIM) capacitor is disposed under the UTM layer and over the top metal layer. | 07-19-2012 |
| 20140038384 | Forming Metal-Insulator-Metal Capacitors Over a Top Metal Layer - A plurality of metal layers includes a top metal layer. An Ultra-Thick Metal (UTM) layer is disposed over the top metal layer, wherein no additional metal layer is located between the UTM layer and the top metal layer. A Metal-Insulator-Metal (MIM) capacitor is disposed under the UTM layer and over the top metal layer. | 02-06-2014 |
| 20150187827 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device includes an epitaxial layer including a first surface and a silicon layer disposed on the first surface and including a second surface opposite to the first surface, wherein the silicon layer includes a plurality of pillars on the second surface, a portion of the plurality of pillars on a predetermined portion of the second surface are in substantially same dimension, each of the plurality of pillars on the predetermined portion of the second surface stands substantially orthogonal to the second surface, the plurality of pillars are configured for absorbing an electromagnetic radiation of a predetermined wavelength projected from the epitaxial layer and generating an electrical energy in response to the absorption of the electromagnetic radiation. | 07-02-2015 |
| 20150206915 | IMAGE-SENSOR DEVICE AND METHOD OF MANUFACTURING THE SAME - An image-sensor device includes a first semiconductor substrate. The image-sensor device further includes a second semiconductor substrate under the first semiconductor substrate. The first semiconductor substrate has a first dopant concentration less than a second dopant concentration of the second semiconductor substrate. A ratio of a first resistance of the first semiconductor substrate to a second resistance of the second semiconductor substrate is larger than or equal to about 100. The image-sensor device also includes a diffusion layer positioned between the first semiconductor substrate and the second semiconductor substrate. A ratio of a first thickness of the diffusion layer to a second thickness of the first semiconductor substrate ranges from about 0.1 to about 1. | 07-23-2015 |
| 20150279885 | CMOS IMAGE SENSOR STRUCTURE - A semiconductor device is operated for sensing incident light and includes a substrate, a device layer, a semiconductor layer and a color filter layer. The device layer is disposed on the substrate and includes light-sensing regions. The semiconductor layer overlies the device layer and has a first surface and a second surface opposite to the first surface. The first surface is adjacent to the device layer. The semiconductor layer includes microstructures on the second surface. The color filter layer is disposed on the second surface of the semiconductor layer. | 10-01-2015 |
| 20150287761 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A semiconductor device includes a substrate including a front side, a back side opposite to the front side, and a high absorption structure disposed over the back side of the substrate and configured to absorb an electromagnetic radiation in a predetermined wavelength; and a dielectric layer including a high dielectric constant (high k) dielectric material, wherein the dielectric layer is disposed on the high absorption structure. | 10-08-2015 |
| 20160005860 | INTEGRATED FABRICATION OF SEMICONDUCTOR DEVICES - In a method for manufacturing a semiconductor device, a substrate including a gate structure is provided. A source region and a drain region are formed at opposing sides of the gate structure and an implant region for a resistor device is formed in the substrate. Pocket implant regions are formed in the source region and the drain region. A dielectric layer is formed to cover the gate structure and the substrate. A portion of dopants in the pocket implant regions interact with portions of dopants in the source region and the drain region to form lightly doped drain regions above the pocket implant regions. A resistor region of the resistor device is defined on the implant region. A portion of the dielectric layer is removed to form a spacer on a sidewall of the gate structure and a resistor protection dielectric layer on a portion of the implant region. | 01-07-2016 |
| 20160071899 | METHOD FOR FORMING IMAGE-SENSOR DEVICE - A method for forming an image-sensor device is provided. The method includes providing a first semiconductor substrate having a first surface and a second surface opposite to the first surface. The method includes forming a device layer over the first surface of the first semiconductor substrate. The method includes bonding the first semiconductor substrate to a second semiconductor substrate after the formation of the device layer. The second surface faces the second semiconductor substrate. The method includes forming a diffusion layer between the first semiconductor substrate and the second semiconductor substrate. The diffusion layer has a dopant concentration gradient that increases in a direction from the first semiconductor substrate toward the second semiconductor substrate. | 03-10-2016 |
Yung-I Yeh, Kaohsiung City TW
| Patent application number | Description | Published |
|---|---|---|
| 20130292808 | SEMICONDUCTOR PACKAGE INTEGRATED WITH CONFORMAL SHIELD AND ANTENNA - A semiconductor package includes a substrate, a semiconductor die, a package body, an electromagnetic interference shield, a dielectric structure and an antenna element. The substrate comprises a grounding segment and a feeding point. The semiconductor die is disposed on the substrate. The package body encapsulates the semiconductor die. The electromagnetic interference shield is formed on the package body. The dielectric structure encapsulates the electromagnetic interference shield. The antenna element is formed on the dielectric structure and electrically connecting the grounding segment of the substrate and the feeding point. | 11-07-2013 |
| 20140239464 | SEMICONDUCTOR PACKAGES WITH THERMAL-ENHANCED CONFORMAL SHIELDING AND RELATED METHODS - The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding. | 08-28-2014 |