Patent application number | Description | Published |
20080207226 | POSITIONING SYSTEM, POSITIONING METHOD, AND POSITIONING PROGRAM - An object of the present invention is to implement accurate positioning of a mobile communication terminal even in an environment in which delay waves are included in radio waves arriving at the mobile communication terminal from radio wave sources. A positioning server | 08-28-2008 |
20080252528 | POSITIONING SYSTEM, POSITIONING IC CHIP, POSITIONING METHOD AND POSITIONING PROGRAM - The present invention easily evaluates the positioning accuracy by using fewer signal sources. The receiver is a positioning system for estimating the position of the receiver itself which is constituted by: a distance calculation section which calculates information indicating the respective distances between a plurality of GPS satellites and the receiver on the basis of signals which are transmitted by the plurality of GPS satellites and received by the receiver; a position calculation section which calculates the position of the receiver from information indicating the positions of the respective GPS satellites and information indicating the respective distances thus calculated; a distance difference calculation section which calculates, for each of the GPS satellites, the differences between the respective distances from the calculated position of the receiver to the respective GPS satellites, and the respective distances calculated by the distance calculation section; and a position accuracy evaluation section which evaluates an accuracy of the calculated position of the receiver on the basis of variation, between the GPS satellites, of the calculated differences, for each of the GPS satellites. | 10-16-2008 |
20090015471 | POSITIONING SYSTEM, IC CHIP FOR POSITIONING, POSITIONING METHOD, AND POSITIONING PROGRAM - A positioning system accurately estimates transmission times of signals from a signal transmitter and measures a position of a receiver on the basis of the transmission times. The receiver | 01-15-2009 |
20100007552 | POSITIONING SYSTEM, POSITIONING METHOD, AND POSITIONING PROGRAM - An object of the present invention is to obtain a positioning result according to a condition of a receiver in a shorter period of time. A positioning server | 01-14-2010 |
20100317366 | INDOOR/OUTDOOR DECISION APPARATUS AND INDOOR/OUTDOOR DECISION METHOD - An appropriate indoor/outdoor decision is made for a mobile communication terminal in accordance with a purpose of selection of a positioning method or the like. A positioning server | 12-16-2010 |
20100323628 | BUILDING INFLUENCE ESTIMATION APPARATUS AND BUILDING INFLUENCE ESTIMATION METHOD - Appropriate and easy estimation is achieved for influence of a building on a mobile communication terminal. A building influence estimation apparatus | 12-23-2010 |
20110210904 | APPARATUS HAVING MUSHROOM STRUCTURES - An apparatus having multiple mushroom structures is disclosed. Each of the multiple mushroom structures including: a ground plate; a first patch provided parallel to the ground plate with a separation of a distance to the ground plate; and a second patch provided parallel to the ground plate with a separation of another distance to the ground plate, which another distance being different from the distance from the first patch to the ground plate, wherein the second patch is a passive element which is capacitatively coupled with at least the first patch. | 09-01-2011 |
20110210905 | APPARATUS HAVING MUSHROOM STRUCTURES - An apparatus having multiple mushroom structures is disclosed. Each of the multiple mushroom structures includes: a ground plate; a patch provided parallel to the ground plate with a separation of a distance to the ground plate, wherein a distance between a ground plate and a patch in a certain mushroom structure is different from a distance between a ground plate and a patch in a different mushroom structure. | 09-01-2011 |
20110210906 | APPARATUS HAVING MUSHROOM STRUCTURES - An apparatus having multiple mushroom structures is disclosed. Each of the multiple mushroom structures includes: a ground plate; a first patch provided parallel to the ground plate with a separation of a distance to the ground plate; and a second patch provided parallel to the ground plate with a separation of another distance to the ground plate, which another distance being different from the distance from the first patch to the ground plate, wherein the second patch is a passive element which is capacitatively coupled with at least the first patch. | 09-01-2011 |
20120057619 | RELAY APPARATUS AND RELAY METHOD - A relay apparatus is disclosed for relaying a signal from a transmitter to a receiver in a MIMO (Multiple Input Multiple Output) based communication system, comprising: a power difference determination unit configured to determine a difference of reception levels between a direct wave and a relayed wave based on positional relationship among the transmitter, the relay apparatus and the receiver, the direct wave traveling from the transmitter to the receiver without the relay apparatus, the relayed wave traveling from the transmitter to the receiver via the relay apparatus; a gain determination unit configured to determine an amplification gain of the relay apparatus to make the difference smaller; and a transmitting unit configured to amplify the signal from the transmitter at the determined amplification gain and transmit the amplified signal to the receiver. | 03-08-2012 |
20120302177 | PROPAGATION PATH ESTIMATION METHOD AND PROGRAM AND APPARATUS USING THE SAME - A propagation path estimation method using an imaging method according to the invention includes a step of, in a case where a reflectarray which causes reflection and scattering in a different direction (θ−η)° from a specular reflection direction θ° exists on a propagation path from a transmission point to a reception point RX of the radio wave, calculating a virtual reception point VRX by rotating the reception point RX about a rotation center point O, and estimating the propagation path by using the virtual reception point VRX. | 11-29-2012 |
20120303328 | PROPAGATION PATH ESTIMATION METHOD AND PROGRAM AND APPARATUS USING THE SAME - A propagation path estimation method using an imaging method according to the invention includes a step of, in a case where a reflect array | 11-29-2012 |
Patent application number | Description | Published |
20090231017 | Counter circuit - Reduction in power consumption of a counter circuit for continuous operation is demanded. Therefore, provided is a counter circuit including: a first counter of m bits for counting and storing a value of a predetermined bit width according to an input clock; a clock transmission control circuit for controlling whether to transmit the input clock based on a value output according to a counting result of the first counter; and a second counter of n bits for counting and storing another value of the predetermined bit width according to the input clock transmitted from the clock transmission control circuit. | 09-17-2009 |
20100202813 | IMAGE FORMING MECHANISM AND IMAGE FORMING DEVICE - There is provided an image forming mechanism including: an image carrier containing a lubricant in a photosensitive layer that is formed on a surface of the image carrier, and on which an electrostatic latent image is formed; a developing section developing the electrostatic latent image into a visible image by a developer that contains the lubricant; and a cleaning member formed with a first layer that contacts the photosensitive layer, and a second layer that is formed of a material having a lower modulus of repulsion elasticity than the first layer and that is layered with the first layer and that does not contact the surface of the image carrier. | 08-12-2010 |
20100237900 | Semiconductor integrated circuit including a power controllable region - Provided is a semiconductor integrated circuit capable of testing power control operation in the semiconductor integrated circuit including a power controllable region. Power control switches have switch series each constituted by a plurality of switch cells. A power controllable region includes output nodes in the switch series. The output nodes output power control signals that have passed through final stages of the respective switch series of the power control switches to the outside of the power controllable region. A chip on which the semiconductor integrated circuit is mounted has output terminals that output outputs of the output nodes to the outside of the chip. In the case of inserting a scan path test, observation flip-flops that load the outputs of the output nodes to data terminals, and load scan data to scan-in terminals are disposed in correspondence with the respective output nodes. Those observation flip-flops are connected to constitute a scan path chain. | 09-23-2010 |
20100296622 | Counter circuit - A counter circuit adding a first value indicated by a plurality of bits and a second value in response to a clock signal, a first part of the plurality of bits being lower order than a second part of the plurality of bits, the counter circuit including a first counter configured to add the first part of the plurality of bits and the second value in response to the clock signal to output a third value regarding a result of adding the first and the second values, a second counter configured to add the second part of the plurality of bits and a fourth value in response to the clock signal, and a clock transmission control circuit coupled to the first and second counters to receive the clock signal and the third value, and to control whether or not to supply the clock signal to the second counter in accordance with the received third value. | 11-25-2010 |
20110156950 | Positioning System and Positioning Method - It is an object of the present invention to perform positioning at favorable positioning precision and in a favorable positioning time, according to whether a receiver is indoors or outdoors. A positioning server | 06-30-2011 |
20110156951 | Positioning System and Positioning Method - It is an object of the present invention to obtain a positioning result corresponding to the state of a receiver in less time. A positioning server | 06-30-2011 |
20110156952 | Positioning System and Positioning Method - It is an object of the present invention to perform positioning at the proper positioning time and positioning precision in response to a requirement with respect to positioning. A positioning server | 06-30-2011 |
20110189960 | Estimating Whether A Wireless Terminal Is Indoors Using Pattern Classification - A method and apparatus for estimating whether or not a wireless terminal is indoors are disclosed. The illustrative embodiment employs a pattern classifier that is trained on a plurality of input/output mappings, where each mapping corresponds to a respective location, the output of the mapping is a Boolean value that indicates whether the location is indoors, and the input of the mapping is based on empirical and predicted signal data for the location. In accordance with the illustrative embodiment, a computer-executable program is generated based on the trained pattern classifier. The computer-executable program estimates whether or not a wireless terminal is indoors based on empirical data reported by the terminal, and on a location estimate for the terminal that might be crude or inaccurate (e.g., based on Cell Identifier [Cell-ID], GPS, etc.). | 08-04-2011 |
20110200163 | Counter Circuit - A system includes a memory and a counter circuit associated with the memory and configured to receive a clock signal and a plurality of input bits, and configured to output a plurality of output bits to the memory. The counter circuit includes a first counter configured to receive a part of the plurality of input bits and to output a part of the plurality of output bits and a first signal, a control circuit configured to receive the clock signal and the first signal, and to output a second signal, and a second counter configured to receive another part of the plurality of input bits and the second signal, and to output another part of the plurality of output bits. | 08-18-2011 |
20110234267 | Semiconductor device and method for controlling flip-flop - A semiconductor device according to one aspect of the present invention includes: a flip-flop; a clock control circuit that controls a clock signal supplied to the flip-flop; and a controller that supplies a data retention signal to the flip-flop and controls the clock control circuit. When the flip-flop is driven by a negative edge of the clock signal and retains data when the clock signal is at a high level, the controller controls the clock control circuit so as to supply a high-level clock signal to the flip-flop after the input clock signal is fixed and before the flip-flop retains data. This prevents the occurrence of unintended latching of data when the flip-flop having a retention function retains data. | 09-29-2011 |
20110316582 | Semiconductor integrated circuit including a power controllable region - A semiconductor chip includes a first power supply line and a second power supply line. A first switch is coupled between the first power supply line and the second power supply line, and a second switch is coupled between the first power supply line and the second power supply line. A circuit is coupled to the second power supply line. A first control signal line is coupled to the first switch, and a second control signal line coupled to the second switch. A logic gate is coupled to the first and the second control signal lines and a terminal is coupled to the logic gate to output a signal to an outside of the semiconductor chip. | 12-29-2011 |
20120163839 | IMAGE FORMING APPARATUS AND CONSUMABLE SUPPLY MANAGEMENT SYSTEM - An image forming apparatus includes an image forming section that forms an image, a plurality of detectors that detect an amount of variation of indicators respectively determining an amount consumed of the consumable supply, a determination section that determines whether or not the amount of variation has reached any one of first lifespan values, an interruption section that interrupts an image forming operation based on the first lifespan values, and an extension setting section that inhibits the interruption of the image forming operation and sets an extension mode of extending a period of execution of the image forming operation, wherein the determination section determines whether or not an amount of variation of one indicator has reached an extended lifespan value when the extension mode is set, and wherein the interruption section interrupts the image forming operation based on extended lifespan value when the extension mode is set. | 06-28-2012 |
20130002328 | SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING FLIP-FLOP - A semiconductor integrated circuit includes a first retention flip-flop configured in a first type in which a retention flip-flop is able to retain data based on one of a low-level clock signal and a high-level clock signal, and unable to retain data based on another one of the low-level clock signal and high-level clock signal, and a second retention flip-flop configured in a second type in which a retention flip-flop is able to retain data based on the low-level clock signal and also able to retain data based on the high-level clock signal. | 01-03-2013 |
20130011145 | IMAGE FORMING APPARATUS, IMAGE FORMING METHOD, AND COMPUTER READABLE MEDIUM - An image forming apparatus includes an image carrier unit, a determining section, an acquiring section, and a removal capability increasing section. The image carrier unit includes an image carrier and a cleaning member, and has a lubricant in the area of the cleaning member that contacts the image carrier when the image carrier unit is in an unused condition. The determining section determines whether or not the image carrier unit is unused. The acquiring section acquires the elapsed time since manufacture of the image carrier unit. The removal capability increasing section increases the removal capability for removing the lubricant from the surface of the image carrier by the cleaning member, in a case where it is determined that the image carrier unit is unused and the acquired elapsed time is equal to or more than a predetermined time, in comparison to other cases. | 01-10-2013 |
20130017478 | IMAGE-FORMING APPARATUS, ELECTROPHOTOGRAPHIC PHOTORECEPTOR, AND PROCESS CARTRIDGEAANM Oda; YasuhiroAACI KanagawaAACO JPAAGP Oda; Yasuhiro Kanagawa JP - An image-forming apparatus includes an electrophotographic photoreceptor including an outermost layer having a crosslinked structure formed by dehydration condensation of a charge transport monomer containing a hydroxyl group and a developing unit that develops an electrostatic latent image on a surface of the electrophotographic photoreceptor with a developer containing a toner manufactured by dispersing particles for forming the toner in a solvent containing water and aggregating and heating the particles to form a toner image. The apparatus satisfies at least one of the following conditions:
| 01-17-2013 |
20130162345 | SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING A POWER CONTROLLABLE REGION - A semiconductor integrated circuit capable of testing power control operation in the semiconductor integrated circuit includes a power controllable region. Power control switches have switch series each constituted by a plurality of switch cells. A power controllable region includes output nodes in the switch series. The output nodes output power control signals that have passed through final stages of the respective switch series of the power control switches to outside the power controllable region. A chip on which the semiconductor integrated circuit is mounted has output terminals that output outputs of the output nodes to outside of the chip. When inserting a scan path test, observation flip-flops that load the outputs of the output nodes to data terminals, and load scan data to scan-in terminals are disposed in correspondence with the respective output nodes. Those observation flip-flops are connected to constitute a scan path chain. | 06-27-2013 |
20130251413 | IMAGE FORMING APPARATUS - An image forming apparatus includes a rotatable photoconductor and a developing device that uses a developer that exhibits magnetism, the developing device including a housing having an opening for development at a position facing the photoconductor, and plural developing rollers that are exposed through the opening in the housing, that rotate without contacting a surface of the photoconductor, and that are arranged without contacting each other in a direction in which the surface of the photoconductor rotates, wherein a minimum distance between an inner surface portion extending to the opening of the housing of the developing device and one of the developing rollers arranged close to the inner surface portion and a minimum distance between the housing and the surface of the photoconductor are each equal to or larger than a minimum distance between the developing rollers. | 09-26-2013 |
20130275932 | TIMING ANALYSIS PROGRAM, TIMING ANALYSIS APPARATUS, AND TIMING ANALYSIS METHOD - A timing analysis program for performing analysis condition generation processing which generates a first analysis condition in which the variation width of a first delay value of a first circuit cell is shifted on the basis of a first variation coefficient and a second analysis condition in which the variation width of a second delay value of a second circuit cell is shifted on the basis of a second variation coefficient. | 10-17-2013 |
20140161474 | IMAGE FORMING APPARATUS - An image forming apparatus includes an image output unit that forms an image with developer, a gathering unit that gathers developer not used by the image output unit as waste developer, plural collection containers that store and collect the waste developer, a transport device that transports the waste developer toward one of the collection containers and includes a discharge portion which is connected to the one of the collection containers, a moving device that moves the collection containers together to respective predetermined arrangement positions including a collection position for connection to the discharge portion and an attachment/detachment position, and a full-state detector that detects that the collection container at the collection position is in an almost full state. A selected one of the collection containers is preferentially moved to the collection position when the other collection container detected by the full-state detector is detached. | 06-12-2014 |
Patent application number | Description | Published |
20130229296 | MULTI-BEAM REFLECTARRAY - A multi-beam reflectarray includes two or more element arrays including plural elements aligned along a predetermined direction. The multi-beam reflectarray is such that, in each of a first element group and a second element group included in at least one of the element arrays, a difference between phases of radio waves reflected by corresponding two elements is in proportion to a first product of a distance between the two elements and a value of a trigonometric function with respect to an angle of reflection by the two elements, and a distance between neighboring elements in the first element group is equal to a product of a rational number and a distance between neighboring elements in the second element group. | 09-05-2013 |
20150015455 | REFLECTARRAY AND DESIGN METHOD - A reflectarray reflects an incident wave in a desired direction. The reflectarray includes a substrate including a surface which is perpendicular to a predetermined axis, and elements disposed on the substrate. A specific element among the elements reflects the incident wave with a specific reflection phase among a plurality of reflection phases. Each of the elements has an element structure including, at least, a patch and a ground plate. Element spacing of first neighboring elements is different from element spacing of second neighboring elements, and a length of a gap between patches of the first neighboring elements is equal to a length of a gap between patches of the second neighboring elements. | 01-15-2015 |
20150022414 | REFLECTARRAY AND DESIGN METHOD - A method of designing a reflectarray including a substrate having a surface perpendicular to a predetermined axis, wherein elements are disposed on the substrate. The method obtains a reflection phase of the elements as a function of a design parameter such as element spacing, when a radio wave enters the arranged elements, and stores a relationship between the reflection phase and the design parameter in a memory. Here, the design parameter is equally set for the elements. The method repeatedly determines, for each of the elements, the design parameter of a specific element in accordance with the relationship. The function of the design parameter has a range of almost 360 degrees with respect to a range of the design parameter. The reflection phase is the continuous function of the element spacing such that two resonant points occur at which the reflection phase becomes zero. | 01-22-2015 |
20150061966 | REFLECTARRAY AND DESIGN METHOD - A reflectarray reflects an incident wave in a desired direction. The reflectarray includes a substrate including a surface which is perpendicular to a predetermined axis; and at least first and second element groups, wherein the first and second element groups are disposed on the substrate, and include elements that reflect a radio wave. The first element group and the second element group reflect the radio wave with corresponding reflection phases which are different from each other. The radio wave enters while forming an angle other than 0 degrees with respect to the predetermined axis. The elements included in the first element group reflect the radio wave with a first reflection phase, and the elements included in the second element group reflect the radio wave with a second reflection phase, wherein the second reflection phase is different from the first reflection phase. | 03-05-2015 |
20150070246 | REFLECTARRAY - A reflectarray reflects an incident wave in a desired direction, and the reflectarray includes a plurality of elements arranged in a first direction and in a second direction perpendicular to the first direction. The elements reflect the incident wave. A phase of a reflected wave by one element among the plurality of elements differs from a phase of the reflected wave by an element adjacent to the one element in the first direction by a predetermined value, and the phase of the reflected wave by the one element is equal to a phase of the reflected wave by an element adjacent to the one element in the second direction. Gap sizes between patches of a predetermined plural number of elements arranged in the first direction vary from a smallest value to a largest value. Here, an oblique TM incidence is utilized at a spurious resonance frequency. | 03-12-2015 |