Patent application number | Description | Published |
20090128216 | SYSTEM AND METHOD FOR TIME-TO-VOLTAGE CONVERSION WITH LOCK-OUT LOGIC - An event time stamping system comprising a current source, an integrator comprising an input and an output, and configured to output a voltage proportional to the length of time the current source is coupled to the input, and one or more switches configured to couple the current source to the input of the integrator upon receipt of an event signal and configured to de-couple the current source from the input of the integrator upon receipt of a control trigger. The system further comprises a lock-out signal generator configured to generate a lock-out signal, and a controller coupled to the one or more switches, wherein the controller is configured to generate the control trigger based on the lock-out signal to ensure a minimum integration time. | 05-21-2009 |
20090129537 | DATA ACQUISITION SYSTEM FOR PHOTON COUNTING AND ENERGY DISCRIMINATING DETECTORS - A data acquisition system including a readout Application Specific Integrated Circuit (ASIC) having a plurality of channels, each channel having a time discriminating circuit and an energy discriminating circuit, wherein the ASIC is configured to receive a plurality of signals from a semiconductor radiation detector. The data acquisition system also includes a digital-to-analog converter (DAC) electrically coupled to the ASIC and configured to provide a reference signal to the ASIC used in the generation of digital outputs from the ASIC, and a controller electrically coupled to the ASIC and to the DAC, the controller configured to instruct the DAC to provide the reference signal to the ASIC. | 05-21-2009 |
20090132789 | APPARATUS AND METHOD FOR CHANNEL-SPECIFIC CONFIGURATION IN A READOUT ASIC - An application-specific integrated circuit (ASIC) comprising a plurality of channels, each channel having circuitry for time and energy discrimination, a plurality of programmable registers, each programmable register configured to output at least one configuration parameter for the circuitry, and a channel-select register configured to identify a channel of the plurality of channels to be configured. The ASIC further includes a configuration-select register configured to identify the programmable register to be used for channel configuration, and a communications interface configured to transmit instructions received from a controller to one of the channel-select register, the configuration-select register, and the plurality of programmable registers. | 05-21-2009 |
20100019163 | Radiation Detector Power Management For Portable/Handheld Applications - A radiation detector includes at least one multiple channel pixellated detector driven via a plurality of pixellated anode electrodes and at least one planar cathode electrode. Each detector is configured to reduce the number of active pixellated anode electrodes until a rate of events detected via at least one corresponding planar cathode electrode exceeds a preset threshold above a background count rate within a predetermined time period. | 01-28-2010 |
20110253430 | MICRO PIN HYBRID INTERCONNECT ARRAY AND METHOD OF MANUFACTURING SAME - A micro pin hybrid interconnect array includes a crystal anode array and a ceramic substrate. The array and substrate are joined together using an interconnect geometry having a large aspect ratio of height to width. The joint affixing the interconnect to the crystal anode array is devoid of solder. | 10-20-2011 |
20120008828 | TARGET-LINKED RADIATION IMAGING SYSTEM - An imaging detection system includes at least one location detection device configured to determine coordinates of a target, at least one detector configured to detect events from a source associated with the target, and a processor coupled in communication with the at least one location detection device and the at least one detector. The processor is configured to receive the coordinates from the at least one location detection device and the events from the at least one detector, translate the events using the coordinates acquired from the at least one location detection device to compensate for a relative motion between the source and the at least one detector, and output a processed data set having the events translated based on the coordinates. | 01-12-2012 |
20130000963 | MICRO PIN HYBRID INTERCONNECT ARRAY - A micro pin hybrid interconnect array includes a crystal anode array and a ceramic substrate. The array and substrate are joined together using an interconnect geometry having a large aspect ratio of height to width. The joint affixing the interconnect to the crystal anode array is devoid of solder. | 01-03-2013 |
20140177781 | COLLIMATOR GRID AND AN ASSOCIATED METHOD OF FABRICATION - A collimator grid and a method of fabricating the collimator grid are disclosed. The method includes molding a plurality of plates, each plate includes a plurality of grooves in a first surface, a plurality of fin tips in a second surface disposed opposite to the first surface, plurality of ribs on a first pair of peripheral sides, a plurality of first fiducials formed on the plurality of ribs, and a plurality of second fiducials formed on a second pair of peripheral sides. The method includes machining the second surface to form the plurality of fins having predefined dimensions. Further, the method includes stacking the plurality of plates overlapping each other based on the plurality of first fiducials, and machining the plurality of ribs and first fiducials to form the collimator grid. | 06-26-2014 |