Patent application number | Description | Published |
20080313505 | FLASH MEMORY WEAR-LEVELING - A memory system and corresponding method of wear-leveling are provided, the system including a controller, a random access memory in signal communication with the controller, and another memory in signal communication with the controller, the other memory comprising a plurality of groups, each group comprising a plurality of first erase units or blocks and a plurality of second blocks, wherein the controller exchanges a first block from a group with a second block in response to at least one block erase count within the group; and the method including receiving a command having a logical address, converting the logical address into a logical block number, determining a group number for a group that includes the converted logical block number, and checking whether group information comprising block erase counts for the group is loaded into random access memory, and if not, loading the group information into random access memory. | 12-18-2008 |
20100082882 | SEMICONDUCTOR DISK DEVICES AND RELATED METHODS OF RANDOMLY ACCESSING DATA - A computing system includes a host, a data source device, and a controller. The controller is configured to respond to a random access command from the host by setting information in a register that selects what data is to be accessed in the data source device. The controller then successively accesses the data in the data source device using the information that was set in the register. | 04-01-2010 |
20100153632 | NON-VOLATILE MEMORY SYSTEM STORING DATA IN SINGLE-LEVEL CELL OR MULTI-LEVEL CELL ACCORDING TO DATA CHARACTERISTICS - Provided is a system storing data received from an application or file system in a non-volatile memory system of single-level cells and multi-level cells in accordance with one or more data characteristics. The non-volatile memory system includes a non-volatile memory cell array having a plurality of multi-level cells forming a MLC area and a plurality of single-level cells forming a SLC area, and an interface unit analyzing a characteristic of the write data and generating a corresponding data characteristic signal. A flash transition layer receives the data characteristic signal, and determines whether the write data should be stored in the MLC area or the SLC area based on whether or not the write data will be accessed by the file, or whether the address associated with the write data is frequently updated or not. | 06-17-2010 |
20110026326 | MEMORY SYSTEM INCLUDING FLASH MEMORY AND METHOD OF OPERATING THE SAME - A method for operating a memory system including a flash memory device having a plurality of memory blocks includes determining whether a read error generated during a read operation of the flash memory device is caused by read disturbance and replacing a memory block which includes the read error, with a spare memory block if the read error is caused by read disturbance. | 02-03-2011 |
Patent application number | Description | Published |
20090204748 | MULTI-CHANNEL FLASH MEMORY SYSTEM AND ACCESS METHOD - Disclosed is a multi-channel flash memory system formed by flash memories having pages divided into sectors and accessed by corresponding channels. An interface device is configured to access the flash memories via the channels by a unit of at least one sector, wherein the interface device divides an address into a plurality of addresses of sector unit and controls the divided addresses so as to be jumped by a given size. | 08-13-2009 |
20090310408 | Memory system and method of accessing a semiconductor memory device - A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed. | 12-17-2009 |
20100115192 | WEAR LEVELING METHOD FOR NON-VOLATILE MEMORY DEVICE HAVING SINGLE AND MULTI LEVEL MEMORY CELL BLOCKS - A method of executing a wear leveling operation within a non-volatile memory including a single-level memory cell block (SLC) and a multi-level memory cell block (MLC) is disclosed. The method includes calculating an average erase point in relation to a number of programming/erase (P/E) operations applied to a logical block address (LBA), a SLC mode usage point in relation to a number of the P/E operations applied to the SLC, a MLC mode usage point in relation to a number of the P/E operations applied to the MLC, and a wear value in relation to the average erase point, the SLC mode usage point, and the MLC mode usage point; and then if the wear value exceeds a defined threshold value, performing the wear leveling operation. | 05-06-2010 |
20100269000 | METHODS AND APPARATUSES FOR MANAGING BAD MEMORY CELL - A method for managing a bad cell is provided. The method includes reading status data from a page buffer and detecting a location of a bad cell from the status data. The method may further include remapping a bad address for the bad cell to a spare address for a spare cell in the same page. | 10-21-2010 |
20110299335 | Memory system and method of accessing a semiconductor memory device - A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed. | 12-08-2011 |
20110299338 | Memory system and method of accessing a semiconductor memory device - A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed. | 12-08-2011 |
20110302352 | Memory system and method of accessing a semiconductor memory device - A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed. | 12-08-2011 |
20110302468 | Memory system and method of accessing a semiconductor memory device - A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed. | 12-08-2011 |
20110302476 | Memory system and method of accessing a semiconductor memory device - A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed. | 12-08-2011 |
20110307646 | Memory system and method of accessing a semiconductor memory device - A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed. | 12-15-2011 |