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| 20100237419 | Static Random Access Memory (SRAM) Cell and Method for Forming Same - In accordance with an embodiment of the present invention, a static random access memory (SRAM) cell comprises a first pull-down transistor, a first pull-up transistor, a first pass-gate transistor, a second pull-down transistor, a second pull-up transistor, a second pass-gate transistor, a first linear intra-cell connection, and a second linear intra-cell connection. Active areas of the transistors are disposed in a substrate, and longitudinal axes of the active areas of the transistors are all parallel. The first linear intra-cell connection electrically couples the active area of the first pull-down transistor, the active area of the first pull-up transistor, and the active area of the first pass-gate transistor to a gate electrode of the second pull-down transistor and a gate electrode of the second pull-up transistor. The second linear intra-cell connection electrically couples the active area of the second pull-down transistor, the active area of the second pull-up transistor, and the active area of the second pass-gate transistor to a gate electrode of the first pull-down transistor and a gate electrode of the first pull-up transistor. | 09-23-2010 |
| 20110068400 | Methods and Apparatus for SRAM Bit Cell with Low Standby Current, Low Supply Voltage and High Speed - Circuits and methods for providing an SRAM or CAM bit cell. In one embodiment, a bit cell portion with thicker gate oxides in the storage cell transistors, and thinner gate oxides in a read port section having transistors are disclosed. The use of the thick gate oxides in the storage cell transistors provides a stable storage of data and lower standby leakage current. The use of the thinner gate oxides in the read port transistors provides fast read accesses and allows a lower Vcc,min in the read port. The methods used to form the dual gate oxide thickness SRAM cells have process steps compatible with the existing semiconductor manufacturing processes. Embodiments using high k gate dielectrics, dual gate dielectric materials in a single bit cell, and using finFET and planar devices in a bit cell are described. Methods for forming the structures are disclosed. | 03-24-2011 |
| 20110269275 | Static Random Access Memory (SRAM) Cell and Method for Forming Same - An embodiment is a method for forming a static random access memory (SRAM) cell. The method comprises forming transistors on a semiconductor substrate and forming a first linear intra-cell connection and a second linear intra-cell connection. Longitudinal axes of the active areas of the transistors are parallel. A first pull-down transistor and a first pull-up transistor share a first common gate structure, and a second pull-down transistor and a second pull-up transistor share a second common gate structure. The first linear intra-cell connection electrically couples active areas of the first pull-down transistor and the first pull-up transistor to the second common gate structure. The second linear intra-cell connection electrically couples active areas of the second pull-down transistor and the second pull-up transistor to the first common gate structure. | 11-03-2011 |
| 20120108036 | Active Region Patterning in Double Patterning Processes - A method includes forming an SRAM cell including a first and a second pull-up transistor and a first and a second pull-down transistor. The step of forming the SRAM cell includes forming a first and a second active region of the first and the second pull-up transistors using a first lithography mask, and forming a third and a fourth active region of the first and the second pull-down transistors using a second lithography mask. | 05-03-2012 |
| 20130299917 | Static Random Access Memory (SRAM) Cell and Method for Forming Same - An embodiment is a method for forming a static random access memory (SRAM) cell. The method comprises forming transistors on a semiconductor substrate and forming a first linear intra-cell connection and a second linear intra-cell connection. Longitudinal axes of the active areas of the transistors are parallel. A first pull-down transistor and a first pull-up transistor share a first common gate structure, and a second pull-down transistor and a second pull-up transistor share a second common gate structure. The first linear intra-cell connection electrically couples active areas of the first pull-down transistor and the first pull-up transistor to the second common gate structure. The second linear intra-cell connection electrically couples active areas of the second pull-down transistor and the second pull-up transistor to the first common gate structure. | 11-14-2013 |
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| 20100259572 | Driving Apparatus and Driving Method of Backlight Module - A driving apparatus and a driving method of a backlight module are provided. The backlight module includes multiple LEDs. The driving apparatus includes at least one thermal sensor, an optical sensor, and a processor. The thermal sensor is for detecting a working temperature of the LEDs. The optical sensor is for detecting brightness and color of the backlight module after a calibration function is enabled, to obtain difference values of the detected brightness and color with respect to predetermined brightness and color. The processor is for providing at least one initial thermal compensation table, to determine working currents of the LEDs associated with the working temperature. The processor further is for calibrating a content of the initial thermal compensation table corresponding with a current working temperature of the LEDs and storing the calibrated thermal compensation table as the initial thermal compensation table after the calibration function is enabled. | 10-14-2010 |
| 20110063875 | BACKLIGHT MODULE - A backlight module includes at least one light emitting device capable of emitting a light beam, a light guide plate, and a thermal insulation light guide element. The light guide plate has two surfaces opposite to each other and a side surface connecting the two surfaces. The light emitting device is disposed beside the side surface. The light beam enters the light guide plate through the side surface. The thermal insulation light guide element has a light incident surface and a light emitting surface. The light incident surface having at least one first recess is located in a transmission path of the light beam and between the light emitting device and the side surface. The light emitting surface is disposed between the light incident surface and the side surface. The glass transition temperature of the thermal insulation light guide element is higher than that of the light guide plate. | 03-17-2011 |
| 20110286235 | BACKLIGHT MODULE - A backlight module includes a back plate, a light guide plate, a heat insulation layer, a heat dissipation member, and a light source device. The back plate has a first surface, a second surface opposite to the first surface, and an opening passing through the back plate. The light guide plate is disposed on the first surface, the heat insulation layer is disposed on the second surface, and the heat dissipation member is disposed on the heat insulation layer. The light source device is connected to the heat dissipation member and protrudes from the first surface to face the light guide plate through the opening. | 11-24-2011 |
| 20130250611 | LIGHT SOURCE MODULE - A light source module including a light guide plate, at least one light emitting device, a light-controlling pattern element, and an absorbing pattern element is provided. The light guide plate has a light emitting surface, a first surface opposite the light emitting surface, and at least one opening. The opening passes through the first surface and extends from the first surface toward the light emitting surface. The at least one light emitting device is disposed in the opening and arranged along an arranging direction. The light-controlling pattern element is disposed on the light emitting surface and covers the opening and the light emitting device. The opening faces towards the absorbing pattern element. The absorbing pattern element is disposed besides one of the at least one light emitting device and extends toward a side wall of the opening. Moreover, another two light source modules are also provided. | 09-26-2013 |
| 20130286685 | LIGHT SOURCE MODULE - A light source module including a light guide plate, a plurality of light emitting devices, and a plurality of first reflective devices is provided. The light guide plate has a plurality of through holes and a light emitting surface. The through holes pass through the light emitting surface. Each of the through holes has a first side wall and a second side wall opposite the first side wall. At least one of the light emitting devices is disposed in each of the through holes. Each of the light emitting devices is capable emitting a light beam. The light beam enters the light guide plate from the first side wall of the through hole which the light emitting device is disposed in and leaves the light guide plate from the light emitting surface. The first reflective devices are disposed on the second side walls of the through holes. | 10-31-2013 |
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| 20100109098 | GATE STRUCTURE INCLUDING MODIFIED HIGH-K GATE DIELECTRIC AND METAL GATE INTERFACE - A method of fabricating a gate of a semiconductor device is provided. In an embodiment, the method includes forming a gate dielectric layer on a semiconductor substrate. An interface layer is formed on the gate dielectric layer. In an embodiment, the gate dielectric layer includes HfO | 05-06-2010 |
| 20120001262 | METAL CONDUCTOR CHEMICAL MECHANICAL POLISH - The present disclosure provides a method of fabricating a semiconductor device, a semiconductor device fabricated by such a method, and a chemical mechanical polishing (CMP) tool for performing such a method. In one embodiment, a method of fabricating a semiconductor device includes providing an integrated circuit (IC) wafer including a metal conductor in a trench of a dielectric layer over a substrate, and performing a chemical mechanical polishing (CMP) process to planarize the metal conductor and the dielectric layer. The method further includes cleaning the planarized metal conductor and dielectric layer to remove residue from the CMP process, rinsing the cleaned metal conductor and dielectric layer with an alcohol, and drying the rinsed metal conductor and dielectric layer in an inert gas environment. | 01-05-2012 |
| 20120086075 | DEVICE WITH ALUMINUM SURFACE PROTECTION - A semiconductor structure with a metal gate structure includes a first type field-effect transistor having a first gate including: a high k dielectric material on a substrate, a first metal layer on the high k dielectric material layer and having a first work function, and a first aluminum layer on the first metal layer. The first aluminum layer includes an interfacial layer including aluminum, nitrogen and oxygen. The device also includes a second type field-effect transistor having a second gate including: the high k dielectric material on the substrate, a second metal layer on the high k dielectric material layer and having a second work function different from the first work function, and a second aluminum layer on the second metal layer. | 04-12-2012 |
| 20130044004 | Apparatus and Methods for Real-Time Error Detection in CMP Processing - Methods and apparatus for detecting errors in real time in CMP processing. A method includes disposing a semiconductor wafer onto a wafer carrier in a tool for chemical mechanical polishing (“CMP”); positioning the wafer carrier so that a surface of the semiconductor wafer contacts a polishing pad mounted on a rotating platen; dispensing an abrasive slurry onto the rotating polishing pad while maintaining the surface of the semiconductor wafer in contact with the polishing pad to perform a CMP process on the semiconductor wafer; in real time, receiving signals from the CMP tool into a signal analyzer, the signals corresponding to vibration, acoustics, temperature, or pressure; and comparing the received signals from the CMP tool to expected received signals for normal processing by the CMP tool; outputting a result of the comparing. A CMP tool apparatus is disclosed. | 02-21-2013 |
| 20130075623 | MULTI-ION BEAM IMPLANTATION APPARATUS AND METHOD - An multi-ion beam implantation apparatus and method are disclosed. An exemplary apparatus includes an ion beam source that emits at least two ion beams; an ion beam analyzer; and a multi-ion beam angle incidence control system. The ion beam analyzer and the multi-ion beam angle incidence control system are configured to direct the emitted at least two ion beams to a wafer. | 03-28-2013 |
| 20130089958 | Finlike Structures and Methods of Making Same - Semiconductor materials, particularly III-V materials used to form, e.g., a finlike structure can suffer structural damage during chemical mechanical polishing steps. This damage can be reduced or eliminated by oxidizing the damaged surface of the material and then etching away the oxidized material. The etching step can be accomplished simultaneously with a step of etching back a patterned oxide layers, such as a shallow trench isolation layer. | 04-11-2013 |
| 20130140987 | ION IMPLANTATION WITH CHARGE AND DIRECTION CONTROL - The present disclosure provides for various advantageous methods and apparatus of controlling electron emission. One of the broader forms of the present disclosure involves an electron emission element, comprising an electron emitter including an electron emission region disposed between a gate electrode and a cathode electrode. An anode is disposed above the electron emission region, and a voltage set is disposed above the anode. A first voltage applied between the gate electrode and the cathode electrode controls a quantity of electrons generated from the electron emission region. A second voltage applied to the anode extracts generated electrons. A third voltage applied to the voltage set controls a direction of electrons extracted through the anode. | 06-06-2013 |
| 20140024187 | FINLIKE STRUCTURES AND METHODS OF MAKING SAME - Semiconductor materials, particularly III-V materials used to form, e.g., a finlike structure can suffer structural damage during chemical mechanical polishing steps. This damage can be reduced or eliminated by oxidizing the damaged surface of the material and then etching away the oxidized material. The etching step can be accomplished simultaneously with a step of etching back a patterned oxide layers, such as a shallow trench isolation layer. | 01-23-2014 |
| 20140191400 | Semiconductor Devices and Methods of Manufacture Thereof - Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a workpiece including an insulating material layer disposed thereon. The insulating material layer includes a trench formed therein. The method includes forming a barrier layer on the sidewalls of the trench using a surface modification process and a surface treatment process. | 07-10-2014 |
| 20150069913 | ION Implantation with Charge and Direction Control - The present disclosure provides for various advantageous methods and apparatus of controlling electron emission. One of the broader forms of the present disclosure involves an electron emission element, comprising an electron emitter including an electron emission region disposed between a gate electrode and a cathode electrode. An anode is disposed above the electron emission region, and a voltage set is disposed above the anode. A first voltage applied between the gate electrode and the cathode electrode controls a quantity of electrons generated from the electron emission region. A second voltage applied to the anode extracts generated electrons. A third voltage applied to the voltage set controls a direction of electrons extracted through the anode. | 03-12-2015 |
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| 20130152993 | SOLAR CELL AND SOLAR CELL MODULE - The present invention provides a solar cell including a substrate, a first front bus, and a first rear bus. The substrate has a front surface and a rear surface. The first front bus is located on the front surface of the substrate along a first direction for collecting current generated by the substrate, and for providing a first front contact electrode. The first rear bus is located on the rear surface of the substrate along a second direction different from the first direction for collecting current generated by the substrate, and for providing a first rear contact electrode. | 06-20-2013 |
| 20130167908 | PHOTOVOLTAIC MODULE AND FRAME THEREOF - A photovoltaic module and the frame thereof are provided. The frame includes a holding part and an extending part. The holding part is used to hold a photovoltaic panel. The extending part connects to the holding part and includes at least one first wind tunnel structure having an inlet and an outlet, in which the cross-sectional area of the inlet is greater than the cross-sectional area of the outlet. | 07-04-2013 |
| 20130192658 | SOLAR PANEL MODULE - A solar panel module includes a solar panel, a supporting stand and a deflecting device. The supporting stand is structurally connected to the solar panel for supporting the solar panel. The solar panel is disposed inclinedly, and the solar panel has a tilt angle with respect to a horizontal plane. The deflecting device is disposed underneath the solar panel for deflecting wind blowing from lateral directions toward a wind exiting direction, which faces a bottom surface of the solar panel. | 08-01-2013 |
| 20130240016 | HEAT DISSIPATION STRUCTURE - A heat dissipation structure is provided and includes a plurality of heat conduction bases and at least one flexible fin. Each of the heat conduction bases includes a first surface and a second surface. A positioning groove is formed in the first surface of each of the heat conduction bases, and the second surface of each of the heat conduction bases is assembled to a backlight surface of a solar module. The fin is coupled to the positioning grooves and connected between the heat conduction bases. | 09-19-2013 |
| 20130240020 | ULTRAVIOLET LIGHT-ABSORBING SOLAR MODULE AND FABRICATING METHOD THEREOF - An ultraviolet light-absorbing solar module is disclosed. The ultraviolet light transmission of a first sealant disposed between a solar cell and a transparent substrate is greater than the ultraviolet light transmission of a second sealant disposed between the solar cell and a back plate. The ultraviolet light can pass through the first sealant and be utilized by the solar cell. The ultraviolet light can be further absorbed by the second sealant. Therefore the degradation of the back plate caused by being exposed of ultraviolet light can be prevented. A fabricating method of the ultraviolet light-absorbing solar module is also disclosed. | 09-19-2013 |
| 20130312807 | BRIDGING SOLAR CELL AND SOLAR ENERGY SYSTEM - A bridging solar cell includes a substrate, first, second, and third sets of bus bar electrodes, a first welding member, a first insulation film, and a second welding member. The first set of bus bar electrodes is disposed on the front surface of the substrate along a first direction. The second set of bus bar electrodes is disposed on the back surface of the substrate along a second direction and electrically connected to the first set of bus bar electrodes. The first welding member is electrically connected to the second set of bus bar electrodes. The first insulation film is disposed on the back surface. The third set of bus bar electrodes is disposed on the first insulation film along the second direction. The second welding member is disposed on the first insulation film and electrically connected to the third set of bus bar electrodes. | 11-28-2013 |
| 20140007918 | PHOTOVOLTAIC DEVICE - A photovoltaic device provided in the present disclosure includes a superstrate, a lower substrate, a plurality of photovoltaic cells and a package structure. The superstrate is light-transmissive, and arranged in parallel with the substrate. The photovoltaic cells are disposed side-by-side at intervals with each other between the superstrate and the substrate, and a gap zone is defined by two facing lateral surfaces of every two of the neighboring photovoltaic cells. The package structure is sandwiched between the superstrate and the substrate, and encapsulates the photovoltaic cells between the superstrate and the substrate in which a reflection portion is provided in the package structure, and located in the gap zone for reflecting lights from the superstrate back to the photovoltaic cells. | 01-09-2014 |
| 20140007922 | PHOTOVOLTAIC DEVICE - A photovoltaic device comprises a photovoltaic panel and a heat sink module. The heat sink module is fastened on a rear surface of the photovoltaic panel. The heat sink module comprises a plurality of fins arranged at intervals, and one surface of each fin defines a wind-facing surface. | 01-09-2014 |
| 20140048306 | Apparatus for Patterning Ribbon, String Tabbing Method and Solar Cell Module Using the Same - An apparatus for patterning a ribbon includes a holding device, a heating device, and an embossing device. The holding device is utilized for positioning the ribbon on a surface of a solar cell. The first solder layer contacts the solar cell. The heating device is utilized for melting the ribbon for string tabbing on the solar cell. The embossing device is utilized for contacting the melted ribbon to form a pattern on the ribbon. A surface energy between the ribbon and the solar cell is greater than a surface energy between the ribbon and the embossing device. | 02-20-2014 |
| 20140053890 | PHOTOVOLTAIC APPARATUS - A photovoltaic apparatus includes N solar cell modules. The solar cell module includes a first sub-loop, a second sub-loop, and at least one junction box. Each of the first sub-loop and second sub-loop has a first end and a second end. The junction box is electrically connected to the first ends and the second ends and connected to another junction box in another adjacent solar cell module. N is a natural number. | 02-27-2014 |
| 20140332057 | SOLAR MODULE - A solar module is disclosed. The solar module includes a back sheet, a transparent substrate, a plurality of solar cells disposed between the back sheet and the transparent substrate, and an encapsulant for fastening the solar cells therebetween. The back sheet includes a light-receiving surface facing the solar cells, and a back surface opposite to the light-receiving surface. The reflectivity of the light-receiving surface is greater than 90%, and the reflectivity of the back surface is less than 10%. Therefore, the back sheet can have high reflectivity and high thermal radiation rate. | 11-13-2014 |
| 20150068577 | SOLAR PANEL - A solar panel includes a substrate, plural solar cells, wires, and plural bypass diodes. The substrate includes a bottom area, a middle area, and a top area vertically arranged from bottom to top. The middle area includes a first zone, a second zone and a third zone horizontally arranged from left to right. The solar cells are disposed on the substrate in columns and in rows. The bottom area includes at least two rows of the solar cells. The top area includes at least two rows of the solar cells. The wires serially connect the solar cells. The bypass diodes are disposed on the substrate, in which each of the first zone, the second zone, the third zone, the bottom area and the top area is disposed with at least one of the bypass diodes. | 03-12-2015 |
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| 20100079397 | Detecting Method for Touch Panel - This invention provides a detecting method for a touch panel, comprising providing a sensing matrix having a plurality of sensing units, detecting sensing data generated from the sensing unit and defining the sensing unit as a touch point or a non-touch point based on the sensing data and group at least a portion of the touch points to form a touch point group. In the same touch point group, projection of a touch point overlaps a projection of at least one touch point of the touch point group in one of a row direction and a column direction while adjacent to a projection in the other direction of at least one touch point of the touch point group. Afterward, extreme positions of the touch point group in the row direction and the column direction is retrieved. Lastly, the detecting method includes determining a touch center position based on the extreme positions in the row direction and the column direction. | 04-01-2010 |
| 20100134442 | Detecting Method for Photo-Sensor Touch Panel and Touch-Sensitive Electronic Apparatus using the same - An exemplary detecting method for a photo-sensor touch panel and a touch-sensitive electronic apparatus using the same are provided. In aforementioned method, an image frame is obtained by scanning the photo-sensor touch panel. Then, a distribution area of data points in the image frame each having a brightness between a predetermined brightness and a first threshold brightness is defined as a first sensing area, and a distribution area of data points in the image frame each having a brightness between the predetermined brightness and a second threshold brightness is defined as a second sensing area. Afterward, it is determined that whether a real touch probably/really occurred according to a relative distance between one of first data points and corresponding one of second data points. The first data points located in the first sensing area, and the second data points located in the second sensing area. | 06-03-2010 |
| 20110298759 | Method of Reducing Noises on a Touch Panel - During test of a display, a synchronous reference signal is determined, and an appearing moment of a minimal-noise signal is determined based on a start moment of the synchronous reference signal. Therefore, during other tests or usage by a user on the display, noise from data lines due to data coupling may be avoided, and detection and determination of touch commands on a touch panel of the display may be isolated from being disturbed by the noise. | 12-08-2011 |
| 20120154322 | METHOD FOR DETERMINING SCANNING TIMES OF TOUCH DRIVING PULSE IN A TOUCH PANEL - A method for determining scanning times of touch driving pulse in a touch panel includes steps of: judging a current gate line scan period is in which one of a data updating time period and a blanking time period; if the current gate line scan period is in the data updating time period, setting a scanning times of touch driving pulse in the current gate line scan period to be a first value; and if the current gate line scan period is in the blanking time period, setting the scanning times of touch driving pulse in the current gate line scan period to be a second value. The first value is different from the second value, and a time for touch driving pulse scanning is non-overlapped with another time for providing display data to data lines of the touch panel in each scan line scan period. | 06-21-2012 |
| 20120242595 | METHOD FOR DETERMINING TOUCH POINT - An exemplary method for determining a touch point includes the following steps of: performing a first operation to determine whether a detected result of a first touch detection point exceeds a first threshold; performing a second operation to determine whether all detected results of multiple second touch detection points are no more than the detection result of the first touch detection point, the second touch detection points neighboring with the first touch detection point; performing a third operation to determine whether a sum of detected results of multiple third touch detection points exceeds a second threshold, the third touch detection points neighboring with the first touch detection point; and determining the first touch detection point as the touch point is being touched if the determine results of the first through third operations are all true. | 09-27-2012 |
| 20120319962 | METHOD FOR CONTROLLING OPERATIONS OF A TOUCH PANEL - A method for controlling operations of a touch panel includes synchronizing timing of a plurality of gate lines and timing of a plurality of touch sensors; determining whether polarities of common voltages of a display layer are consistent when driving signals are outputted to a first gate line and a second gate line, the second gate line following the first gate line; and if the polarities are consistent, outputting at least one driving pulse to a touch sensor of the plurality of touch sensors after image data corresponding to the second gate line is transmitted to the display layer. | 12-20-2012 |
| 20130153753 | LIGHT SENSING APPARATUS AND ADJUSTMENT METHOD THEREOF - A light sensing apparatus includes a light sensing module, a signal conversion module and a processing module. The light sensing module is configured to output a first and second sense signals according to a light intensity emitting thereon. The signal conversion module is electrically coupled to the light sensing module and configured to receive the first and second sense signals and output a sense value according to a relative difference between the first and second sense signals, The comparison module is electrically coupled to the signal conversion module and configured to adjust a light sensing characteristic of the light sensing module according to the sense value so as to adjust a light sensing characteristic of the light sensing module. An adjustment method for a light sensing apparatus is also provided. | 06-20-2013 |
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| 20130021328 | LAYOUT METHOD OF SUB-PIXEL RENDERINGS - A layout method of sub-pixel renderings includes the following steps: providing an RGB pixel rendering, wherein each pixel of the RGB pixel rendering includes a plurality of sub-pixels, and the plurality of sub-pixels have different colors from each other; and when displaying a stereo image, dividing the RGB pixel rendering into a first sub-pixel rendering corresponding to a left-eye image and a second sub-pixel rendering corresponding to a right-eye image; wherein at least one of each row and each column of the first sub-pixel rendering includes R, G, and B sub-pixels, and at least one of each row and each column of the second sub-pixel rendering includes R, G, and B sub-pixels. | 01-24-2013 |
| 20130070006 | METHOD OF USING A PIXEL TO DISPLAY AN IMAGE - A first sub-pixel, a second sub-pixel and a third sub-pixel of a pixel are utilized to display a first white image, then a first brightness of the first sub-pixel and a first brightness of the second sub-pixel are measured. The first sub-pixel, the second sub-pixel and a fourth sub-pixel of the pixel are utilized to display a second white image, then a second brightness of the first sub-pixel and a second brightness of the second sub-pixel are measured. How image data should be displayed is determined according to whether the first brightness of the first sub-pixel is greater than the second brightness of the first sub-pixel, whether the first brightness of the second sub-pixel is greater than the second brightness of the second sub-pixel, and whether a chromaticity coordinate of the image data is within a chromaticity range capable of being displayed by the first, second and third sub-pixels. | 03-21-2013 |
| 20140307430 | TRANSPARENT DISPLAY DEVICE AND TRANSPARENT DISPLAY PANEL - A transparent display device includes at least a first transparent display panel and a second transparent display panel, each of which has transparent regions and display regions. The arrangements of the transparent regions and display regions of the first transparent display panel and the second transparent display panel are opposite to each other. The transparent display device can apply a high transparency display mode or a lower transparency display mode by arranging the relative position of the first and second transparent display panels. In the lower transparency display mode, the first and second transparent display panels are at least partial overlapped with each other so as to display clear image with high definition. | 10-16-2014 |
| 20140313244 | METHOD OF DISPLAYING IMAGE OF DISPLAY PANEL - A display panel includes a plurality of pixels. Each of the pixels includes four sub-pixels. After the display panel receives luminance values of four sub-pixels of a pixel, the display panel compares a sub-pixel of the pixel with same color sub-pixels of neighboring pixels. If a luminance value of the same color sub-pixel of neighboring pixel is greater than the luminance value of the sub-pixel by a predetermined threshold, the luminance value of the sub-pixel of the pixel is reduced. | 10-23-2014 |
| 20140362127 | DISPLAY DEVICE, PIXEL ARRAY, AND COLOR COMPENSATING METHOD - A pixel array includes a first pixel and a second pixel. The pixels are disposed adjacent to each other and jointly include six sub-pixels. The sub-pixels include one red sub-pixel, two green sub-pixels, one blue sub-pixel, and two fourth color sub-pixels. The pixel area configuration of the first pixel is the same as the pixel area configuration of the second pixel, and the order of the sub-pixel areas disposed therein is, sequentially, a first sub-pixel area, a second sub-pixel area and a third sub-pixel area. The red sub-pixel is disposed in the first sub-pixel area of the first pixel, and the blue sub-pixel is disposed in to the first sub-pixel area of the second pixel. Furthermore, a display device and a color compensating method are also disclosed herein. | 12-11-2014 |
| 20150049124 | DISPLAY DEVICE - A display device includes a color transformer and an image controller. The color transformer receives and transforms a three-color image into a four-color image. The four-color image includes a red image, a green image, a blue image, and a white image. The image controller calculates decrement offsets of the red image, the green image, and the blue image, and a compensation value of the white image. The image controller calculates gray level values of the red image, the green image, and the blue image when a value of the white image is zero. The image controller respectively calculates a red image control signal, a green image control signal, and a blue image control signal based on the gray level values and the decrement offsets, and the image controller calculates a white image control signal based on the gray level values and the compensation value of the white image. | 02-19-2015 |
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| 20100252930 | Method for Improving Performance of Etch Stop Layer - A method of forming an interconnect structure includes providing a dielectric layer; forming a metal line in the dielectric layer; and forming a composite etch stop layer (ESL), which includes forming a lower ESL over the metal line and the dielectric layer; and forming an upper ESL over the lower ESL. The upper ESL and the lower ESL have different compositions. The step of forming the lower ESL and the step of forming the upper ESL are in-situ performed. | 10-07-2010 |
| 20120056328 | Die Edge Contacts for Semiconductor Devices - A semiconductor device utilizing die edge contacts is provided. An integrated circuit die has a post-passivation layer with a trench filled with a conductive material extending from a contact to a die edge, thereby forming a die edge contact. Optionally, a through substrate via may be positioned along the die edge such that the conductive material in the trench is electrically coupled to the through-substrate via, thereby forming a larger die edge contact. The integrated circuit die may be placed in a multi-die package wherein the multi-die package includes walls having a major surface perpendicular to a major surface of the integrated circuit die. The die edge contacts are electrically coupled to contacts on the walls of the multi-die package. The multi-die package may include edge contacts for connecting to another substrate, such as a printed circuit board, a packaging substrate, a high-density interconnect, or the like. | 03-08-2012 |
| 20120256324 | Method for Improving Performance of Etch Stop Layer - A method of forming an interconnect structure includes providing a dielectric layer; forming a metal line in the dielectric layer; and forming a composite etch stop layer (ESL), which includes forming a lower ESL over the metal line and the dielectric layer; and forming an upper ESL over the lower ESL. The upper ESL and the lower ESL have different compositions. The step of forming the lower ESL and the step of forming the upper ESL are in-situ performed. | 10-11-2012 |
| 20130249039 | Metal Shield Structures in Backside Illumination Image Sensor Chips and Methods for Forming the Same - A device includes a semiconductor substrate having a front side and a backside. An active image sensor pixel array is disposed on the front side of the semiconductor substrate. A metal shield is disposed on the backside of, and overlying, the semiconductor substrate. The metal shield has an edge facing the active image sensor pixel array. The metal shield has a middle width, and a top width greater than the middle width. | 09-26-2013 |
| 20130328215 | Die Edge Contacts for Semiconductor Devices - A semiconductor device utilizing die edge contacts is provided. An integrated circuit die has a post-passivation layer with a trench filled with a conductive material extending from a contact to a die edge, thereby forming a die edge contact. Optionally, a through substrate via may be positioned along the die edge such that the conductive material in the trench is electrically coupled to the through-substrate via, thereby forming a larger die edge contact. The integrated circuit die may be placed in a multi-die package wherein the multi-die package includes walls having a major surface perpendicular to a major surface of the integrated circuit die. The die edge contacts are electrically coupled to contacts on the walls of the multi-die package. The multi-die package may include edge contacts for connecting to another substrate, such as a printed circuit board, a packaging substrate, a high-density interconnect, or the like. | 12-12-2013 |
| 20140213152 | Wafer Edge Trimming Tool Using Abrasive Tape - A wafer edge trimming tool includes an abrasive tape and a holding module configured to hold the abrasive tape against portions of an edge of a rotating wafer during a wafer edge trimming process. | 07-31-2014 |
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| 20110242495 | LIGHT SOURCE MODULE AND PROJECTION APPARATUS - A light source module and a projection apparatus are provided. The light source module includes a first light-emitting device, a wavelength conversion device, a second light-emitting device and a light combination device. The first light-emitting device emits an exciting beam. The wavelength conversion device is disposed on a transmission path of the exciting beam, and converts the exciting beam into a first color beam. The wavelength conversion device is suitable for moving, so that the exciting beam illuminates into different positions of the wavelength conversion device at different time. The second light-emitting device emits a second color beam. Colors of the first color beam and the second color beam are different. The light combination device is disposed on transmission paths of the first color beam and the second color beam, and combines the first color beam and the second color beam. | 10-06-2011 |
| 20110242791 | LIGHT SOURCE MODULE AND WAVELENGTH CONVERSION MODULE - A light source module and a wavelength conversion module are provided. The light source module includes a first light emitting device, a reflection unit, a wavelength conversion unit, a second light emitting device and a light combination unit. The first light emitting device emits an exciting beam. The reflection unit is disposed on a transmission path of the exciting beam. The wavelength conversion unit is disposed on the reflection unit and located on the transmission path of the exciting beam. The exciting beam is obliquely incident into the wavelength conversion unit along an optical axis of the first light emitting device, and the wavelength conversion unit converts the exciting beam into a first color beam. The second light emitting device emits a second color beam. The light combination unit is disposed on transmission paths of the first color beam and the second color beam. | 10-06-2011 |
| 20110261326 | ILLUMINATION MODULE, PROJECTION APPARATUS, AND LIGHT SOURCE CONTROL METHOD - An illumination module including a light emitting element, a wavelength conversion unit, a control unit, and a determining unit is provided. The light emitting element is capable of emitting an excitation light beam. The wavelength conversion unit is disposed on a transmission path of the excitation light beam for converting the excitation light beam into a color light beam. The control unit is connected to the wavelength conversion unit and capable of driving the wavelength conversion unit to rotate and to shift relative to the excitation light beam. The determining unit is electrically connected to the control unit. When the determining unit determines that a shifting condition is satisfied, the determining unit instructs the control unit to shift the wavelength conversion unit relative to the excitation light beam, so as to change the irradiation position of the excitation light beam on the wavelength conversion unit. | 10-27-2011 |
| 20120099082 | ILLUMINATION APPARATUS AND PROJECTION APPARATUS - An illumination apparatus including a first light emitting device, a first phosphor layer, a second light emitting device and a second phosphor layer and a beam combining element is provided. The first light emitting device is capable of providing a first light beam and the first phosphor layer is disposed on the transmission path of the first light beam. The second light emitting device is disposed opposite to the first light emitting device and for providing a second light beam, wherein the second phosphor layer is disposed on the transmission path of the second light beam. The beam combining element is disposed between the first phosphor layer and the second phosphor layer. In addition, the invention also provides a projection apparatus. | 04-26-2012 |
| 20120206900 | LIGHT SOURCE MODULE AND PROJECTION APPARATUS - A light source module includes a light-emitting device emitting an excitation light beam, a reflective component including a reflective surface with a first focal point and a second focal point, a wavelength conversion device including a plurality of excited regions and disposed nearby the first focal point and on the transmission path of the excitation light beam, and an optical component. By rotating the wavelength conversion device, the excitation light beam irradiates the different excited regions at different time, so that the excitation light beam is converted into different wavelength light beams at different time, and the different wavelength light beams respectively correspond to the excited regions and are reflected by the reflective surface and converged at the second focal point. The optical component is disposed nearby the second focal point so the different wavelength light beams pass through the second focal point and are transmitted to the optical component. | 08-16-2012 |
| 20130100417 | ILLUMINATION SYSTEM AND PROJECTION APPARATUS - An illumination system includes a coherent light source, a phosphor switching module, a beam combining unit and a diffusion switching module. The coherent light source emits a coherent light beam. The phosphor switching module includes a light passing section and a first phosphor reflecting section. The light passing section and first phosphor reflecting section are switched into a transmission path of the coherent light beam by turns. The first phosphor reflecting section converts and reflects the coherent light beam into a first color beam. The beam combining unit combines the coherent light beam passing through the light passing section and the first color light beam. The diffusion switching module includes a light diffusion section and a first light permeable section to be switched into the transmission paths of the coherent light beam and the first color light beam by turns. A projection apparatus is also disclosed. | 04-25-2013 |
| 20130278902 | LIGHT SOURCE MODULE AND PROJECTION APPARATUS - A light source module and a projection apparatus are provided. The light source module includes a light-emitting element, an optical path switching element, a wavelength conversion element, a first reflection element, and a first beam splitter element. The optical path switching element switches a first color beam between a first optical path and a second optical path. When the first color beam is switched to the first optical path, the first color beam is propagated to the wavelength conversion element to excite a first and second wavelength conversion layers on the wavelength conversion element to produce a second color beam and a third color beam. When the first color beam is switched to the second optical path, the first color beam is propagated to the first reflection element. | 10-24-2013 |
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| 20080308873 | Semiconductor device with discontinuous CESL structure - A semiconductor device using a CESL (contact etch stop layer) to induce strain in, for example, a CMOS transistor channel, and a method for fabricating such a device. A stress-producing CESL, tensile in an n-channel device and compressive in a p-channel device, is formed over the device gate structure as a discontinuous layer. This may be done, for example, by depositing an appropriate CESL, then forming an ILD layer, and simultaneously reducing the ILD layer and the CESL to a desired level. The discontinuity preferably exposes the gate electrode, or the metal contact region formed on it, if present. The upper boundary of the CESL may be further reduced, however, to position it below the upper boundary of the gate electrode. | 12-18-2008 |
| 20100038692 | Integrating the Formation of I/O and Core MOS Devices with MOS Capacitors and Resistors - An integrated circuit structure includes a semiconductor substrate, and a first and a second MOS device. The first MOS device includes a first gate dielectric over the semiconductor substrate, wherein the first gate dielectric is planar; and a first gate electrode over the first gate dielectric. The second MOS device includes a second gate dielectric over the semiconductor substrate; and a second gate electrode over the second gate dielectric. The second gate electrode has a height greater than a height of the first gate electrode. The second gate dielectric includes a planar portion underlying the second gate electrode, and sidewall portions extending on sidewalls of the second gate electrode. | 02-18-2010 |
| 20130034946 | Integrating the Formation of I/O and Core MOS Devices with MOS Capacitors and Resistors - An integrated circuit structure includes a semiconductor substrate, and a first and a second MOS device. The first MOS device includes a first gate dielectric over the semiconductor substrate, wherein the first gate dielectric is planar; and a first gate electrode over the first gate dielectric. The second MOS device includes a second gate dielectric over the semiconductor substrate; and a second gate electrode over the second gate dielectric. The second gate electrode has a height greater than a height of the first gate electrode. The second gate dielectric includes a planar portion underlying the second gate electrode, and sidewall portions extending on sidewalls of the second gate electrode. | 02-07-2013 |
| 20140117857 | ILLUMINATION SYSTEM - An illumination system for a projection apparatus includes a light source module, an integrating rod and an optical detecting module. The light source module is capable of emitting an illuminating light beam. The integrating rod has a light entrance surface facing toward the light source module. The optical detecting module includes a light guiding device and an optical detecting device. The light guiding device has a first end surface and a second end surface. The first end surface is farther away from the light entrance surface of the integrating rod than the second end surface. The optical detecting device is disposed adjacent to the first end surface of the light guiding device and electrically connected to the light source module. The light source module is capable of adjusting intensity of the illuminating light beam according to randomly emitted light detected by the optical detecting device. | 05-01-2014 |
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| 20110142192 | SHIFT REGISTER CIRCUIT - A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal. | 06-16-2011 |
| 20110216877 | SHIFT REGISTER CIRCUIT - A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal. | 09-08-2011 |
| 20110228891 | SHIFT REGISTER - An exemplary shift register includes a plurality of transistors. The transistors are subjected to the control of a start pulse signal, a first clock signal and a second clock signal to generate a gate driving signal. The first clock signal and the second clock signal are phase-inverted with respect to each other. A logic low level of the first clock signal and another logic low level of the second clock signal are different from each other. Moreover, the transistors are negative threshold voltage transistors. A potential at the gate of the each of the transistors is lower than another potential at the source/drain of the transistor at the situation of the transistor being switched-off state. | 09-22-2011 |
| 20110255652 | SHIFT REGISTER - An exemplary shift register includes a control circuit and an output circuit. The control circuit is electrically coupled to receive a start pulse signal, a first clock pulse signal and a power supply voltage and for generating an enable signal according to the start pulse signal and the first clock pulse signal. A logic low level of the first clock pulse signal is lower than a level of the power supply voltage. The output circuit is subjected to the control of the enable signal and for generating a gate driving signal according to a second clock pulse signal. The second clock pulse signal and the first clock pulse signal are phase-inverted with respect to each other, and a logic low level of the second clock pulse signal is higher than the level of the power supply voltage. | 10-20-2011 |
| 20120008731 | BI-DIRECTIONAL SHIFT REGISTER - A shift register of an LCD device includes a plurality of shift register units coupled in series. Each shift register unit includes an input circuit and a pull-down circuit having symmetric structures which enable the LCD device to function in a forward-scan mode and a reverse-scan mode. | 01-12-2012 |
| 20120032941 | Liquid crystal display device with low power consumption and method for driving the same - A liquid crystal display device includes a timing controller and a charge-sharing circuit. The timing controller is configured to provide a plurality of input clock signals having duty cycle smaller than ⅓. The charge-sharing circuit is configured to allow charge-sharing to occur between a specific input clock signal and two other input clock signals respectively during the signal rising period and signal falling period of the specific input clock signal, thereby providing a plurality of output clock signals for driving a shift register. | 02-09-2012 |
| 20120075275 | DISPLAY DEVICE WITH BI-DIRECTIONAL SHIFT REGISTERS - A display device having bi-directional shift registers is disclosed. The display device includes a display panel, a first dummy shift register set, a second dummy shift register set, a third dummy shift register sets, a fourth dummy shift register sets, a first valid shift register set coupled between the first dummy shift register set and the second dummy shift register set, a second valid shift register set coupled between the third dummy shift register set and the fourth dummy shift register set, and a first directional circuit coupled to a first valid register in the first valid register set and the third dummy shift register set. | 03-29-2012 |
| 20120086627 | Display Device with Bi-directional Shift Registers - A display device having bi-directional shift registers is disclosed. The display device includes a display panel which has N gate lines, a first set of dummy registers, a second set of dummy registers, a plurality of valid shift registers coupled between the two sets of dummy registers, and a first start pulse signal generator coupled to the first valid register for generating the first start pulse signal to the first valid register to enable the first gate line. The first valid register is coupled to the first set of dummy registers. The Nth valid register is coupled to the second set of dummy registers. | 04-12-2012 |
| 20120120035 | LCD PANEL - A LCD panel with an improved pixel array configuration is provided. The LCD panel uses a column inversion driving method to drive the data lines so as to achieve a stable common voltage. Moreover, by cross-connecting the layout traces of the wiring zone in a specified manner, the gate pulses outputted from every two gate lines neighboring the sub-pixel are not overlapped with each other, so that the frame can be normally displayed. | 05-17-2012 |
| 20120140871 | SHIFT REGISTER CIRCUIT - A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit, a pull-up unit, a pull-down unit, a control unit and an auxiliary pull-down unit. The input unit is put in use for outputting a driving control voltage according to at least one first input signal. The pull-up unit pulls up a corresponding gate signal according to the driving control voltage and a system clock. The pull-down unit pulls down the corresponding gate signal to a first power voltage according to a control signal. The control unit is utilized for generating the control signal according to the corresponding gate signal. The auxiliary pull-down unit pulls down the driving control voltage to a second power voltage according to a second input signal. | 06-07-2012 |
| 20120140873 | SHIFT REGISTER - An exemplary shift register includes a control circuit and an output transistor. The control circuit has a start pulse signal input terminal, a first clock pulse signal input terminal and a power supply voltage input terminal and includes a first control transistor and a second control transistor. The output transistor is electrically coupled to the first control transistor and includes a gate driving signal output terminal and a second clock pulse signal input terminal. Moreover, the first control transistor, the second control transistor and the output transistor all are negative threshold voltage transistors. | 06-07-2012 |
| 20120153996 | GATE DRIVING CIRCUIT ON ARRAY APPLIED TO CHARGE SHARING PIXEL - The disclosure provides a gate driving circuit on array applied to a display panel with charge sharing pixel structure. In particular, the gate driving circuit is adapted to receive multi-phase clock signal and includes a plurality of shift registers. Each shift register includes a driving circuit including a first driving transistor and a second driving transistor, a pull-down unit and at least one pull-up unit, so that is capable of generating mutually non-overlapped main gate driving signal and sub gate driving signal. Furthermore, the advantage of the disclosure is to provide a gate driving circuit with simplified circuit structure and circuit layout. | 06-21-2012 |
| 20120155604 | SHIFT REGISTER CIRCUIT - A shift register circuit includes plural shift register stages for providing plural gate signals. The Nth shift register stage of the shift register stages includes an input unit, a pull-up unit and a pull-down unit. The input unit is put in use for outputting an Nth driving control voltage according to an (N−1)th gate signal and an (N−2)th driving control voltage which are generated respectively by the (N−1) th shift register stage and the (N−2) th shift register stage of the shift register stages. The pull-up unit pulls up an Nth gate signal according to the Nth driving control voltage and a system clock. The pull-down unit pulls down the Nth gate signal and the Nth driving control voltage according to an (N+2)th gate signal generated by the (N+2)th shift register stage of the shift register stages. | 06-21-2012 |
| 20120161842 | CLOCK SIGNAL SUPPLYING METHOD AND CIRCUIT FOR SHIFT REGISTERS - A clock signal supplying method for shift registers includes following steps: receiving a clock signal; and transmitting the clock signal to two first stage signal transmission paths simultaneously, the first stage signal transmission paths determined by a first control signal whether to be conducted, and further conducted at different time. | 06-28-2012 |
| 20120169703 | SHIFT REGISTER CIRCUIT - A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a driving unit, an input unit, a driving adjustment unit and a pull-down unit. The driving unit is utilized for outputting a gate signal according to a system clock and a driving control voltage. The input unit is put in use for outputting the driving control voltage according to an input control signal and a first input signal. The driving adjustment unit is employed for adjusting the driving control voltage according to a second input signal and a third input signal. The pull-down unit is used for pulling down the gate signal and the driving control voltage according to a fourth input signal. | 07-05-2012 |
| 20120219105 | SHIFT REGISTER CIRCUIT - A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal. | 08-30-2012 |
| 20120235890 | BI-DIRECTIONAL SHIFT REGISTER - A shift register of an LCD device includes a plurality of shift register units coupled in series. Each shift register unit includes an input circuit and a pull-down circuit having symmetric structures which enable the LCD device to function in a forward-scan mode and a reverse-scan mode. | 09-20-2012 |
| 20120300149 | LIQUID CRYSTAL DISPLAY AND METHOD OF CHARGING/DISCHARGING PIXELS OF A LIQUID CRYSTAL DISPLAY - A liquid crystal display includes a liquid crystal panel, a source driving circuit, a timing controller, and a gate driving circuit. The source driving circuit converts frame data into a plurality of data voltages, and charges/discharges a first data line according to a data voltage of the plurality of data voltages. The gate driving circuit enables a gate line corresponding to the data voltage. The timing controller sequentially enables a plurality of switch enable lines corresponding to the gate line. A plurality of pixel switches are turned on according to the enabled gate line. A data line switch is turned on according to an enabled switch enable line. The data voltage charges/discharges a corresponding pixel through the turned-on data line switch and one of the turned-on pixel switches. | 11-29-2012 |
| 20120320021 | DISPLAY PANEL AND GATE DRIVING CIRCUIT AND DRIVING METHOD FOR GATE DRIVING CIRCUIT - An exemplary gate driving circuit is adapted for driving a display panel including multiple pixels and includes a first gate driving unit string and a second gate driving unit string. The first gate driving unit string includes multiple cascade-connected first gate driving units and receives a start pulse. The first gate driving units are for generating output pulses to drive the pixels. The second gate driving unit string includes multiple cascade-connected second gate driving units and receives the start pulse. The second gate driving units are for generating output pulses to drive the pixels. The output pulse generated from one of the second gate driving units is provided to one of first gate driving units to determine whether to disable the output pulse of the first gate driving unit which receives the output pulse generated from the second gate driving units. | 12-20-2012 |
| 20120328070 | SHIFT REGISTER CIRCUIT - A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal. | 12-27-2012 |
| 20130114783 | SHIFT REGISTER CIRCUIT - A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes a pull-up unit, a pull-up control unit, an input unit, a first pull-down unit, a second pull-down unit, and a pull-down control unit. The pull-up control unit generates a first control signal according to a driving control voltage and a first clock. The pull-up unit pulls up a corresponding gate signal according to the first control signal. The input unit is utilized for inputting the gate signal of a preceding shift register stage to become the driving control voltage according to a second clock having a phase opposite to the first clock. The pull-down control unit generates a second control signal according to the driving control voltage. The first and second pull-down units pull down the corresponding gate signal and the first control signal respectively according to the second control signal. | 05-09-2013 |
| 20140105351 | SHIFT REGISTER - A shift register includes a plurality of shift register circuits, where an Nth shift register circuit of the shift register includes a driving unit, a boost unit, a pull up unit, and a key pull down unit. The driving unit is for providing a gate signal, a first boost control signal, and a first transmission control signal according a first driving signal and a high frequency clock signal. The boost unit is for boosting the voltage of the first driving signal according to a first boost signal. The pull up unit is for providing a second driving signal according to the first transmission control signal and the gate signal, and is for providing a second boost signal according to the first boost control signal and a second boost control signal. The key pull down unit is for pulling down the first driving signal according to a second transmission control signal. | 04-17-2014 |
| 20150084948 | LIQUID CRYSTAL DISPLAY AND METHOD OF CHARGING/DISCHARGING PIXELS OF A LIQUID CRYSTAL DISPLAY - A liquid crystal display includes a liquid crystal panel, a source driving circuit, a timing controller, and a gate driving circuit. The source driving circuit converts frame data into a plurality of data voltages, and charges/discharges a first data line according to a data voltage of the plurality of data voltages. The gate driving circuit enables a gate line corresponding to the data voltage. The timing controller sequentially enables a plurality of switch enable lines corresponding to the gate line. A plurality of pixel switches are turned on according to the enabled gate line. A data line switch is turned on according to an enabled switch enable line. The data voltage charges/discharges a corresponding pixel through the turned-on data line switch and one of the turned-on pixel switches. | 03-26-2015 |
