Patent application number | Description | Published |
20110117565 | SERUM OR PLASMA MICRORNA AS BIOMARKERS FOR NON-SMALL CELL LUNG CANCER - The present invention provides non-small cell lung cancer markers and the use thereof. The non-small cell lung cancer markers in the present invention include at least one of the 26 selected detectable mature microRNAs existing stably in human serum or plasma. The invention also provides a probe combination, kit and biochip for detecting the non-small cell lung cancer markers. The invention further provides a method for detecting microRNAs in the serum of lung cancer patients. By detecting the variations of microRNAs in the serum of lung cancer patients, the disease can be diagnosed in vitro; the progression course of the disease can be predicted; the occurrence of complications, the rate of relapse and the prognosis of the disease can be monitored; the drug efficacy and therapeutic effects can be analyzed. The method in the present invention enables extensive detection spectrum, high sensitivity, low cost, convenient sample taking and preservation. The method can be applied in the general survey of disease, solves problems of the low specificity and sensitivity encountered with previous single markers, and increases significantly the clinical detection rate of diseases, all of which make it an effective means for diagnosing diseases at an early stage. | 05-19-2011 |
20120193917 | PITCH CONTROL SYSTEM AND METHOD FOR WIND TURBINE - The invention discloses a pitch control system for a wind turbine and a method, comprising a main controller, a secondary controller, a motor and a pitch gearbox, wherein the main controller is connected with a plurality of the secondary controllers through a communication bus; each blade corresponds to one controller and at least two motors, and one pitch gearbox is driven by each motor. The main controller is used for calculating a pitch expected value according to wind speed as well as power and rotation speed of a generator; and the motor is driven by the secondary controller according to the pitch expected value, so as to drive the pitch gearbox and hence drive the blades to vary a pitch angle. | 08-02-2012 |
20120256817 | SHIFTING REGISTER AND APPARATUS FOR DRIVING GATE LINES - The present invention discloses a shifting register and an apparatus for driving gate lines, and it relates to Liquid Crystal Display technical field, for reducing the noise of a shifting register during non-working period. The shifting register comprises: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a capacitor and a pull-down module, and the pull-down module is connected among a clock signal port, a first node and a signal output terminal, and further is connected to a low level signal terminal, for maintaining the first node and the signal output terminal to be at low level during the non-working period of the shifting register. The apparatus for driving gate lines comprises a plurality of above shifting registers connected in serial. The present invention is applicable to driving gate lines. | 10-11-2012 |
20130085747 | System, Method and Computer-Readable Storage Device for Providing Cloud-Based Shared Vocabulary/Typing History for Efficient Social Communication - An input method editor (IME) is associated with a local user. Memory stores local data and a processor, coupled to the memory, is configured to receive input from a local, first user, obtain shared data associated with at least a remote, second user from a remote server and generate prediction candidates and conversion candidates based on the input provided by the local, first user and correlation of the input and the obtained shared data. | 04-04-2013 |
20130088265 | GATE DRIVER ON ARRAY, SHIFTING REGESTER AND DISPLAY SCREEN - The embodiment of the present disclosure relates to a technical field of liquid crystal display, and particularly, to a gate driver on array, a shifting register and a display screen. The gate driver on array comprises: a first TFT, a second TFT, a third TFT, a fourth TFT, a capacitor and a pulling-down module, the pulling-down module is connected among a first clock signal input terminal, a second clock signal input terminal, a first node and an output terminal, and is connected with a low voltage signal terminal, for maintaining the first node and the output terminal being in a low level during a non-operation period of the gate driver on array. Thus, the gate driver on array may achieve a bidirectional scan by designing the functions of the input terminal and the reset terminal in the gate driver on array as being implemented symmetrically, without changing a charging-discharging characteristic of nodes, which ensures a reliability and stabilization of the circuit. | 04-11-2013 |
20130113454 | SIGNAL GENERATING CIRCUIT - A signal generating circuit includes: a first signal amplifying circuit arranged to generate a first amplified signal according to a first supply current, a reference signal, and an output signal of the signal generating circuit; a soft-start circuit arranged to generate a control signal according to a soft-start signal; a current controlled circuit arranged to generate the first supply current according to the soft-start signal; and a pass transistor arranged to generate an output signal according to an error amplified signal and the control signal, wherein the error amplified signal is derived from the first amplified signal. | 05-09-2013 |
20130188109 | SUB-PIXEL STRUCTURE OF THIN FILM TRANSISTOR LIQUID CRYSTAL DISPLAY AND LIQUID CRYSTAL DISPLAY - According to embodiments of the present invention, there are provided a sub-pixel structure of a thin film transistor liquid crystal display and a liquid crystal display. The sub-pixel structure comprises: a gate line, a data line, a thin film transistor, a sub-pixel electrode, and a common electrode, which are formed on an array substrate, wherein a liquid crystal electric field in a first domain and a liquid crystal electric field in a second domain, which are located on both sides of the gate line, respectively, are created between the sub-pixel electrode and the common electrode, and the angle between the direction of the liquid crystal electric field in the first domain and the direction of the liquid crystal electric field in the second domain is larger than 0° and smaller than 180°. | 07-25-2013 |
20130346872 | INPUT METHOD EDITOR APPLICATION PLATFORM - An input method editor (IME) provides a distributed platform architecture that enables associating multiple applications with the IME to provide extended functionalities. The presentations of the applications, such as skins, may be different from each other and that of the IME. The applications may be represented in a manifest file that is human-readable and editable. The IME collects multiple parameters relating to a user input into a host application including a query input by the user and a scenario of the host application, and selects one or more applications to provide candidates based on a score or ranking of the applications under the collected multiple parameters. Machine-learning may be used to improve the score or ranking. The candidates may include text candidates, rich candidates, and informative candidates. | 12-26-2013 |
20140055177 | Reset Circuit For Gate Driver On Array, Array Substrate, And Display - A reset circuit for Gate Driver on Array, an array substrate and a display is used for increasing reliability and long-term stability of a GOA circuit and thus improving performance of the GOA circuit. The GOA reset circuit includes a first electronic switch circuit ( | 02-27-2014 |
20140078124 | GATE DRIVING CIRCUIT, ARRAY SUBSTRATE, AND DISPLAY APPARATUS - The present disclosure relates to a field of displaying, and particularly to a gate driving circuit, an array substrate, and a display apparatus capable of ensuring that noise can be pulled down immediately once it occurs, and thus increasing a quality of picture and reliability of the display apparatus. The gate driving circuit includes a plurality of cascaded shift registers, wherein an output terminal of the shift register is further connected to two Thin Film Transistors TFTs, wherein sources of the two TFTs are both connected to the output terminal of the shift register, drains of the two TFTs are both connected to a first level signal line VSS, and gates of the two TFTs are input to different control signals respectively, thus ensuring that at least one TFT is turned on when the shift register outputs a switching-off voltage. | 03-20-2014 |
20140098013 | SHIFT REGISTER, INTEGRATED GATE LINE DRIVING CIRCUIT, ARRAY SUBSTRATE AND DISPLAY - A shift register an integrated gate line driving circuit, an array substrate and a display are disclosed. Two electronic switching modules are added to the existing shift register, wherein one of the two electronic switching modules is arranged among a puling-down node, a low level signal terminal and a pulling-up node, and the other is arranged among the pulling-down node, the low level signal terminal and a signal output terminal; during the non-operating time of the shift register and when the pulling-down node is at a low level, the two electronic switching modules are turned on, and discharge the pulling-up node and the signal output terminal respectively to pull down the noise voltage, thereby effectively reducing the noise interference of the shift register during the non-operating time. | 04-10-2014 |
20140111413 | GATE DRIVING CIRCUIT AND METHOD, AND LIQUID CRYSTAL DISPLAY - The present disclosure provides a gate driving circuit, a gate driving method and a liquid crystal display. Said gate driving circuit includes shift registers at a plurality of stages, wherein the shift register at each stage includes a pull-up driving unit, a pull-up unit, a reset unit, a pull-down unit and a supplementary unit; said pull-up unit is used for making a clock signal at a first clock terminal an output signal of the shift register at the present stage when being turned on; said supplementary unit, connected to said pull-up unit, is used for making a clock signal at a second clock terminal the output signal of the shift register at the present stage when being turned on. With the supplementary unit, the present disclosure can reduce voltage jump of a pixel, achieve the MLG function and enhance the picture quality of the LCD. | 04-24-2014 |
20140123750 | METHOD AND SYSTEM FOR MONITORING POWER TRANSMISSION LINE OF POWER GRID - A system for monitoring a power transmission line of a power grid, including a first comprehensive sensor ( | 05-08-2014 |
20140160032 | Swipe Stroke Input and Continuous Handwriting - Swipe-stroke input and continuous handwriting are provided. A stroke sequence or a portion of a stroke sequence of a Chinese character may be input via selecting one or more stroke buttons via a swipe gesture. Candidate characters may be determined and provided when an indication is received that a stroke sequence input has ended. A candidate may be selected, or a next stroke sequence may be input. As additional input is received, phrase candidates may be predicted and dynamically provided. An end-of-input (EOI) panel may be provided, which when selected, provides an indication of an end of a current handwriting input and allowing a next handwriting input to be entered. By providing a selectable functionality to indicate an end of a current handwriting input, a continuous and more efficient handwriting experience is provided. Past handwriting input may be stored and accessed, allowing a user to edit the past handwriting input. | 06-12-2014 |
20140167079 | ARRAY SUBSTRATE, METHOD FOR FABRICATING THE SAME AND DISPLAY DEVICE - An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate comprises a display region, at least two common electrode blocks are disposed at a periphery of the display region and conducted via a pixel electrode bridge line pattern. | 06-19-2014 |
20140174343 | METHOD FOR MAKING TOPOLOGICAL INSULATOR STRUCTURE - A method for forming a topological insulator structure is provided. A strontium titanate substrate having a surface (111) is used. The surface (111) of the strontium titanate substrate is cleaned by heat-treating the strontium titanate substrate in the molecular beam epitaxy chamber. The strontium titanate substrate is heated and Bi beam, Sb beam, Cr beam, and Te beam are formed in the molecular beam epitaxy chamber in a controlled ratio achieved by controlling flow rates of the Bi beam, Sb beam, Cr beam, and Te beam. The magnetically doped topological insulator quantum well film is formed on the surface (111) of the strontium titanate substrate. The amount of the hole type charge carriers introduced by the doping with Cr is substantially equal to the amount of the electron type charge carriers introduced by the doping with Bi. | 06-26-2014 |
20140175373 | TOPOLOGICAL INSULATOR STRUCTURE - A topological insulator structure includes an insulating substrate and a magnetically doped TI quantum well film located on the insulating substrate. A material of the magnetically doped TI quantum well film is represented by a chemical formula of Cr | 06-26-2014 |
20140175382 | ELECTRICAL DEVICE - An electrical device includes an insulating substrate and a magnetically doped TI quantum well film. The insulating substrate includes a first surface and a second surface. The magnetically doped topological insulator quantum well film is located on the first surface of the insulating substrate. A material of the magnetically doped topological insulator quantum well film is represented by a chemical formula of Cr | 06-26-2014 |
20140178674 | TOPOLOGICAL INSULATOR STRUCTURE - A topological insulator structure includes an insulating substrate and a magnetically doped TI quantum well film located on the insulating substrate. A material of the magnetically doped TI quantum well film is represented by a chemical formula of Cr | 06-26-2014 |
20140179026 | METHOD FOR GENERATING QUANTIZED ANOMALOUS HALL EFFECT - A method for generating quantum anomalous Hall effect is provided. A topological insulator quantum well film in 3QL to 5QL is formed on an insulating substrate. The topological insulator quantum well film is doped with a first element and a second element to form the magnetically doped topological insulator quantum well film. The doping of the first element and the second element respectively introduce hole type charge carriers and electron type charge carriers in the magnetically doped topological insulator quantum well film, to decrease the carrier density of the magnetically doped topological insulator quantum well film to be smaller than or equal to 1×10 | 06-26-2014 |
20140182010 | YIELD TRAITS FOR MAIZE - Methods for introgressing an allele of interest of a locus associated with a yield trait into | 06-26-2014 |
20140192039 | SHIFT REGISTER UNIT, SHIFT REGISTER CIRCUIT, ARRAY SUBSTRATE AND DISPLAY DEVICE - A shift register unit, a shift register circuit, an array substrate and a display device can avoid a phenomenon that light lines and dark lines appear alternately in a horizontal direction in a gray scale state when the display device is lighted up normally, wherein the phenomenon is generated because a clock signal causes an abnormal output of a gate scanning voltage of the shift register unit when a frame start signal comes. The shift register unit comprises a capacitor (C | 07-10-2014 |
20140204319 | DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF - A display device and a manufacturing method are provided. The display device includes a blue light backlight source and a liquid crystal display panel, and the liquid crystal display panel comprises a first substrate, a second substrate. The first substrate or the second substrate includes a color filter layer which includes a black matrix pattern and a red pixel pattern and a green pixel pattern. The red pixel pattern and the green pixel pattern are quantum dot material thin film patterns respectively emitting red light and green light under the excitement of blue light. | 07-24-2014 |
20150011413 | INTERNAL REFERENCE GENES FOR MICRORNAS NORMALIZATION AND USES THEREOF - Disclosed are standardized reference genes for microRNAs and the use thereof. The reference gene is microRNA let-7d, let-7g, let-7i or a combination thereof. The reference genes have extremely high stability and accuracy compared to the currently most commonly used reference genes in microRNA quantitation. | 01-08-2015 |