Patent application number | Description | Published |
20080230928 | Module comprising a semiconductor chip - A module includes a semiconductor chip having at least a first terminal contact surface and a second terminal contact surface. A first bond element made of a material on the basis of Cu is attached to the first terminal contact surface, and a second bond element is attached to the second terminal contact surface. The second bond element is made of a material different from the material of the first bond element or is made of a type of bond element different from the type of the first bond element. | 09-25-2008 |
20080251903 | SEMICONDUCTOR MODULE - A module having a semiconductor chip with a first contact element on a first main surface and a second contact element on a second main surface is disclosed. The semiconductor chip is arranged on a carrier. An insulating layer and a wiring layer cover the second main surface and the carrier. | 10-16-2008 |
20090001535 | Semiconductor Module for a Switched-Mode Power Supply and Method for Its Assembly - Semiconductor module for a Switched-Mode Power Supply comprises at least one semiconductor power switch, a control semiconductor chip and a leadframe comprising a die pad and a plurality of leads disposed on one side of the die pad. The die pad comprises at least two mechanically isolated regions wherein the semiconductor power switch is mounted on a first region of the die pad and the control semiconductor chip is mounted on a second region of the die pad. Plastic housing material electrically isolates the first region and the second region of the die pad and electrically isolates the semiconductor power switch from the control semiconductor chip. | 01-01-2009 |
20090001562 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed. One embodiment provides a module including a first carrier having a first mounting surface and a second mounting surface, a first semiconductor chip mounted onto the first mounting surface of the first carrier and having a first surface facing away from the first carrier, a first connection element connected to the first surface of the first semiconductor chip, a second semiconductor chip having a first surface facing away from the first carrier, a second connection element connected to the first surface of the second semiconductor chip, and a mold material covering the first connection element and the second connection element only partially. | 01-01-2009 |
20090108460 | DEVICE INCLUDING A SEMICONDUCTOR CHIP HAVING A PLURALITY OF ELECTRODES - A device, including a semiconductor chip having a plurality of first electrodes is disclosed. A plurality of second electrodes is arranged on a first surface of the semiconductor chip. A first electrically conductive layer is applied over a first section of the first surface and electrically coupled to the first electrodes arranged within the first section. A second electrically conductive layer is applied over the first electrically conductive layer and electrically coupled to the second electrodes arranged within the first section. | 04-30-2009 |
20090137086 | METHOD FOR MAKING A DEVICE INCLUDING PLACING A SEMICONDUCTOR CHIP ON A SUBSTRATE - A method for making a device is disclosed. One embodiment provides a substrate having a first element protruding from the substrate. A semiconductor chip has a first electrode on a first surface and a second electrode on a second surface opposite to the first surface. The semiconductor chip is placed over the first element of the substrate with the first surface of the semiconductor chip facing the substrate. The second electrode of the semiconductor chip is electrically coupled to the substrate, and the substrate is at least partially removed. | 05-28-2009 |
20090230519 | Semiconductor Device - This application relates to a semiconductor device comprising: a carrier comprising a chip island and at least one first external contact element; only one semiconductor chip, wherein the semiconductor chip comprises a first electrode on a first surface and a second electrode on a second surface opposite to the first surface and wherein the first electrode is attached to the chip island; and a metal structure comprising a plate region attached to the second electrode and a connection region attached to the at least one first external contact element, wherein the plate region extends laterally beyond the edges of at least two sides of the second surface of the semiconductor chip. | 09-17-2009 |
20090230535 | SEMICONDUCTOR MODULE - A semiconductor module. In one embodiment, at least two semiconductor chips are placed on a carrier. The at least two semiconductor chips are then covered with a molding material. An exposed portion of the at least two semiconductor chips is provided. A first layer of conductive material is applied over the exposed portion of the at least two semiconductor chips to electrically connect to a contact pad on the exposed portion of the at least two semiconductor chips. The at least two semiconductor chips are singulated. | 09-17-2009 |
20090261468 | SEMICONDUCTOR MODULE - A semiconductor module. One embodiment provides at least two semiconductor chips placed on a carrier. The at least two semiconductor chips are then covered with a molding material to form a molded body. The molded body is thinned until the at least two semiconductor chips are exposed. Then, the carrier is removed from the at least two semiconductor chips. The at least two semiconductor chips are singulated. | 10-22-2009 |
20100013106 | STACKED SEMICONDUCTOR CHIPS - Stacked semiconductor chips. One embodiment provides a device having a first body. A first power semiconductor chip and first external contact elements is provides. A second body includes a second semiconductor chip and second external contact elements. The second body is placed over the first body. The first external contact elements and the second external contact elements define a first plane. | 01-21-2010 |
20110215460 | STACKED SEMICONDUCTOR CHIPS - Stacked semiconductor chips. One embodiment provides a device having a first body. A first power semiconductor chip and first external contact elements is provides. A second body includes a second semiconductor chip and second external contact elements. The second body is placed over the first body. The first external contact elements and the second external contact elements define a first plane. | 09-08-2011 |
20120276693 | Module Comprising a Semiconductor Chip - A module includes a semiconductor chip having at least a first terminal contact surface and a second terminal contact surface. A first bond element made of a material on the basis of Cu is attached to the first terminal contact surface, and a second bond element is attached to the second terminal contact surface. The second bond element is made of a material different from the material of the first bond element or is made of a type of bond element different from the type of the first bond element. | 11-01-2012 |
20130027113 | Power Semiconductor Chip Having Two Metal Layers on One Face - A semiconductor chip includes a power transistor circuit with a plurality of active transistor cells. A first load electrode and a control electrode are arranged on a first face of the semiconductor chip, wherein the first load electrode includes a first metal layer. A second load electrode is arranged on a second face of the semiconductor chip. A second metal layer is arranged over the first metal layer, wherein the second metal layer is electrically insulated from the power transistor circuit and the second metal layer is arranged over an area of the power transistor circuit that comprises at least one of the plurality of active transistor cells. | 01-31-2013 |
20130062722 | CHIP MODULE AND A METHOD FOR MANUFACTURING A CHIP MODULE - In various embodiments, a chip module may include a first chip; and a leadframe with a first leadframe area and a second leadframe area, wherein the first leadframe area is electrically insulated from the second leadframe area; wherein the first chip is arranged at least partially on the first leadframe area and at least partially on the second leadframe area. | 03-14-2013 |
20130154123 | Semiconductor Device and Fabrication Method - In various embodiments, a semiconductor device may include: a carrier; a semiconductor chip disposed over a first side of the carrier; a layer stack disposed between the carrier and the semiconductor chip or over a second side of the carrier opposite the semiconductor chip, or both, the layer stack including at least a first electrically insulating layer, the first electrically insulating layer having a laminate having a first electrically insulating matrix material and a first mechanically stabilizing material embedded in the first electrically insulating matrix material. | 06-20-2013 |
20130200532 | Semiconductor Device Using Diffusion Soldering - A method includes providing a semiconductor chip having a first main surface and a second main surface. A semiconductor chip is placed on a carrier with the first main surface of the semiconductor chip facing the carrier. A first layer of solder material is provided between the first main surface and the carrier. A contact clip including a first contact area is placed on the semiconductor chip with the first contact area facing the second main surface of the semiconductor chip. A second layer of solder material is provided between the first contact area and the second main surface. Thereafter, heat is applied to the first and second layers of solder material to form diffusion solder bonds between the carrier, the semiconductor chip and the contact clip. | 08-08-2013 |
20140001615 | Package-In-Packages and Methods of Formation Thereof | 01-02-2014 |
20140008702 | Semiconductor Packages Having Multiple Lead Frames and Methods of Formation Thereof - In accordance with an embodiment of the present invention, a semiconductor package includes a first lead frame having a first die paddle, and a second lead frame, which has a second die paddle and a plurality of leads. The second die paddle is disposed over the first die paddle. A semiconductor chip is disposed over the second die paddle. The semiconductor chip has a plurality of contact regions on a first side facing the second lead frame. The plurality of contact regions is coupled to the plurality of leads. | 01-09-2014 |
20140063766 | LATERAL ELEMENT ISOLATION DEVICE - Representative implementations of devices and techniques provide isolation between a carrier and a component mounted to the carrier. A multi-layer device having lateral elements provides electrical isolation at a preset isolation voltage while maintaining a preselected thermal conductivity between the component and the carrier. | 03-06-2014 |
20140084449 | Semiconductor Housing with Rear-Side Structuring - A semiconductor housing includes a fixing mechanism and at least one side having structurings. A method for producing a semiconductor device is provided in which a thermally conductive paste is applied on the at least one side of the semiconductor housing and/or of a heat sink. The semiconductor housing is fixed to the heat sink by means of the fixing mechanism. A pressure is exerted on the thermally conductive paste by means of the fixing mechanism and the thermally conductive paste is diverted by means of diversion channels depending on the pressure exerted. | 03-27-2014 |
20140110829 | Module Comprising a Semiconductor Chip - A module includes a semiconductor chip having at least a first terminal contact surface and a second terminal contact surface. A first bond element made of a material on the basis of Cu is attached to the first terminal contact surface, and a second bond element is attached to the second terminal contact surface. The second bond element is made of a material different from the material of the first bond element or is made of a type of bond element different from the type of the first bond element. | 04-24-2014 |
20140138803 | CHIP ARRANGEMENTS AND METHODS FOR MANUFACTURING A CHIP ARRANGEMENT - A chip arrangement is provided, the chip arrangement including: a carrier; a chip disposed over the carrier, the chip including one or more contact pads, wherein a first contact pad of the one or more contact pads is electrically contacted to the carrier; a first encapsulation material at least partially surrounding the chip; and a second encapsulation material at least partially surrounding the first encapsulation material. | 05-22-2014 |
20140151856 | Chip Module, an Insulation Material and a Method for Fabricating a Chip Module - The chip module includes a carrier, a semiconductor chip arranged on or embedded inside the carrier, and an insulation layer that at least partly covers a face of the carrier. The dielectric constant ∈ | 06-05-2014 |
20140197552 | CHIP ARRANGEMENT, A METHOD FOR MANUFACTURING A CHIP ARRANGEMENT, INTEGRATED CIRCUITS AND A METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT - A chip arrangement is provided, the chip arrangement, including a carrier; at least one chip electrically connected to a carrier top side; an encapsulation material at least partially surrounding the at least one chip and the carrier top side, wherein the encapsulation material is formed on one or more lateral sides of the carrier; and a ceramic material disposed on a carrier bottom side, and on at least one side of the encapsulation material. | 07-17-2014 |
20140217596 | POWER TRANSISTOR ARRANGEMENT AND METHOD FOR MANUFACTURING THE SAME - Various embodiments provide a power transistor arrangement. The power transistor arrangement may include a carrier; a first power transistor having a control electrode and a first power electrode and a second power electrode; and a second power transistor having a control electrode and a first power electrode and a second power electrode. The first power transistor and the second power transistor may be arranged next to each other on the carrier such that the control electrode of the first power transistor and the control electrode of the second power transistor are facing the carrier. | 08-07-2014 |
20140252537 | PACKAGE ARRANGEMENT AND A METHOD OF MANUFACTURING A PACKAGE ARRANGEMENT - In various embodiments, a package arrangement is provided. The package arrangement may include a first package. The package arrangement may further include a through hole package including at least one contact terminal. The first package may include at least one hole in an encapsulant to receive the at least one contact terminal of the through hole package. The received at least one contact terminal may provide a solder contact. | 09-11-2014 |
20140252577 | CHIP CARRIER STRUCTURE, CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME - Various embodiments provide a chip carrier structure. The chip carrier structure may include a structured metallic chip carrier; encapsulating material at least partially filling the structure; wherein the main surfaces of the metallic chip carrier are free from the encapsulating material. | 09-11-2014 |
20140284777 | Multi-Chip Semiconductor Power Device - A semiconductor device includes a first semiconductor power chip mounted over a first carrier and a second semiconductor power chip mounted over a second carrier. The semiconductor device further includes a contact clip mounted over the first semiconductor power chip and on the second semiconductor power chip. A semiconductor logic chip is mounted over the contact clip. | 09-25-2014 |
20140306331 | CHIP AND CHIP ARRANGEMENT - Various embodiments provide a chip. The chip may include a body having two main surfaces and a plurality of side surfaces; a first power electrode extending over at least one main surface and at least one side surface of the body; and a second power electrode extending over at least one main surface and at least one side surface of the body. | 10-16-2014 |
20140312360 | Semiconductor Power Device Having a Heat Sink - A semiconductor device includes an electrically conducting carrier having a mounting surface. The semiconductor device further includes a metal block having a first surface facing the electrically conducting carrier and a second surface facing away from the electrically conducting carrier. A semiconductor power chip is disposed over the second surface of the metal block. | 10-23-2014 |
20150060878 | Semiconductor Packages Having Multiple Lead Frames and Methods of Formation Thereof - In accordance with an embodiment of the present invention, a semiconductor package includes a first lead frame having a first die paddle, and a second lead frame, which has a second die paddle and a plurality of leads. The second die paddle is disposed over the first die paddle. A semiconductor chip is disposed over the second die paddle. The semiconductor chip has a plurality of contact regions on a first side facing the second lead frame. The plurality of contact regions is coupled to the plurality of leads. | 03-05-2015 |