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Wu, Yilan County

Chao-Ming Wu, Yilan County TW

Patent application numberDescriptionPublished
20120147584TOUCH DEVICE - A touch device includes a light guide having a plurality of light guiding blocks, a plurality of light-emitting modules, and a plurality of touch sensing modules. Each light guiding block includes an incident surface, an emissive surface, and a bottom surface. An isolating gap is disposed between any two adjacent light guiding blocks. Each light-emitting module is disposed adjacent to the incident surface of a corresponding light guiding block for emitting light that is guided thereto, and the light is guided out of the emissive surface thereof. Each touch sensing module is disposed on the bottom surface of the corresponding light guiding block. Any one of the plurality of touch sensing modules generates a driving signal to control a corresponding light-emitting module for emitting light when sensing a corresponding light guiding block is touched. Therefore, each light guiding block can emit light independently.06-14-2012

Chen-Yu Wu, Yilan County TW

Patent application numberDescriptionPublished
20110279102CONTROL CIRCUIT OF CHARGE PUMP CIRCUIT - A control circuit of a charge pump circuit is disclosed, which includes a ring oscillator and a load status detection unit. The ring oscillator herein is for producing a clock signal and adjusting the frequency of the clock signal according to a first control signal, and stopping generating the clock signal according to an adjustment signal. The load status detection unit is for producing the first control signal and determining a time point to enable the first control signal according to the voltage drop variation of an output voltage of the charge pump circuit and the adjustment signal, wherein the pulse width of the adjustment signal gets narrower with a smaller drop amplitude of the output voltage value.11-17-2011
20120161734LOW DROP OUT VOLTAGE REGULATO - A low drop out (LDO) voltage regulator having an error amplifier, a power transistor, a first voltage division unit, a compensation control unit and a compensation bias current source is provided. The error amplifier generates a control voltage according to a first reference voltage and a feedback voltage. The power transistor generates an output voltage at a drain of the power transistor according to the control voltage. The first voltage division unit divides the output voltage to generate the feedback voltage. The compensation control unit generates a compensation control signal to the compensation bias current source according to the control voltage, the output voltage and a compensation bias, so as to make the compensation bias current source generate a compensation bias current, in which the compensation bias is inversely proportional to a supply voltage and ambient temperature.06-28-2012

Chien-Te Wu, Yilan County TW

Patent application numberDescriptionPublished
20090094394TRANSMISSION CABLE CAPABLE OF TRANSMITTING E-SATA SIGNALS AND ELECTRICITY - A transmission cable includes a first plug including a housing. A slot is formed inside the housing. The first plug further includes an E-SATA terminal set disposed on a side of the slot for transmitting E-SATA signals, and a power terminal set disposed on the other side of the slot for receiving electricity. The transmission cable further includes an E-SATA signal line electrically connected to the E-SATA terminal set for transmitting the E-SATA signals, a second plug connected to the E-SATA signal line for inserting into a signal receptacle of a E-SATA peripheral device, a power line electrically connected to the power terminal set for transmitting the electricity, and a third plug connected to the power line for inserting into a power receptacle of the E-SATA peripheral device so as to transmit the electricity to the E-SATA peripheral device.04-09-2009

Chih-Yi Wu, Yilan County TW

Patent application numberDescriptionPublished
20150142165UTILIZATION RATE CALCULATION METHOD AND SYSTEM THEREOF, EMBEDDED SYSTEM AND COMPUTER READABLE STORAGE MEDIUM - A utilization rate calculation method is disclosed. The utilization rate calculation method comprises steps as follows: scanning an operation signal of I/O ports via a I/O port capturing module; continuously receiving the operation signal via the I/O port capturing module; determining whether a machine tool is running according to the operation signal and a processing machine operation rule via a utilization rate calculation system; if the machine tool is running, recording a processing time data of the machine tool; generating a utilization rate according to the processing-time data and time data to be processed, wherein the processing-machine operation rule is a record for at least one I/O port stand for running corresponding to the machine tool which is running, and the I/O port stand for running is one of the I/O ports.05-21-2015

Chung-Wen Wu, Yilan County TW

Patent application numberDescriptionPublished
20080260280Image Processing Method and Related Apparatus for a Display Device - An image processing method for a display device, for enhancing image quality, includes receiving video signals, sequentially generating a plurality of image data according to the video signals, and sequentially displaying the plurality of image data on a panel of the display device. Each of the plurality of image data includes a frame data and a low-gray-level frame data respectively corresponding to a frame output duration and a vertical blanking duration in a timing sequence of the video signals.10-23-2008
20100259106SWITCHING CONTROL METHOD CAPABLE OF CONTINUOUSLY PROVIDING POWER AND RELATED APPARATUS AND POWER SUPPLY SYSTEM - A switching control method capable of continuously providing power is utilized for a power supply system having a first power supply unit and a second power supply unit. The switching control method includes generating a first input signal and a second input signal; performing a logical operation process on the first input signal and the second input signal to generate a first control signal; delaying the second input signal for a delay time to generate a second control signal; controlling a coupling relationship between the first power supply unit and a load according to the first control signal; and controlling a coupling relationship between the second power supply unit and the load according to the second control signal.10-14-2010
20120068714Short Detection Circuit, Light-Emitting Diode Chip, Light-Emitting Diode Device and Short Detection Method - A short detection circuit includes a voltage divider circuit, for generating, according to a bottom voltage of one or more light-emitting diode strings, a divided voltage less than the bottom voltage. Additionally, the short detection circuit includes a voltage clamp circuit, coupled to the voltage divider circuit, for clamping the divided voltage, and a comparator, coupled to the voltage divider circuit, for comparing the divided voltage and a reference voltage, to decide whether a short circuit occurs in the one or more light-emitting diode strings according to a result of the comparison.03-22-2012
20120075356INTEGRATED BACKLIGHT DRIVING CHIP AND LED BACKLIGHT DEVICE - An integrated backlight driving chip for driving a light-emitting diode backlight module includes a scaler circuit and a backlight driving circuit. The scaler circuit includes a digital control unit for generating a digital control signal, and a variable reference voltage generation unit for generating a reference voltage. The backlight driving circuit is coupled to the digital control unit, the variable reference voltage generation unit, and the LED backlight module, for generating a backlight driving signal according to the digital control signal and the reference voltage so as to drive the LED backlight module.03-29-2012
20120086359Light-Emitting Diode Driving Device, Light-Emitting Diode Device, and Method for Driving the Same - A light-emitting diode driving device includes a light-emitting diode driving chip, for driving the one or more light-emitting diode strings according to a feedback voltage associated with the one or more light-emitting diode strings, and a voltage limiter, having a terminal coupled to the light-emitting diode driving chip and another terminal coupleable to the one or more light-emitting diode strings, for generating the feedback voltage for provision to the light-emitting diode driving chip according to a bottom voltage of the one or more light-emitting diode strings, and limiting the feedback voltage not to exceed a preset level.04-12-2012
20120206579THREE-DIMENTIONAL VIDEO PROCESSING DEVICE FOR GENERATING BACKLIGHT CONTROL SIGNAL TO REDUCE CROSSTALK, AND RELATED THREE-DIMENTIONAL VIDEO SYSTEM USING BACKLIGHT CONTROL AND CONTROL CIRCUIT - A three-dimensional (3D) video processing device capable of avoiding crosstalk between adjacent frames includes a video processing circuit and a control circuit. The video processing circuit is configured to generate a 3D video signal having a first frame timing. The 3D video signal is used to control a panel to update, to thereby display 3D video frames in accordance with a second frame timing which is a delayed version of the first frame timing. The control circuit is utilized for generating a backlight control signal. A switching timing of the backlight control signal is determined according to the second frame timing.08-16-2012
20120268022IMAGE PROCESSING CIRCUIT AND LIGHT ILLUMINATION MODULE - An image processing circuit and a light illumination module are provided. The light illumination module has an integrated circuit and a plurality of light emitting diode (LED) strings connected in parallel. The integrated circuit could be the image processing circuit. Each of the LED strings has a plurality of LEDs connected in series.10-25-2012
20140198089IMAGE PROCESSING UNIT, IMAGE PROCESSING APPARATUS AND IMAGE DISPLAY SYSTEM - An image processing unit including an always on circuit block and a non-always on circuit block is provided. When operating under a first operation mode, the non-always on circuit block receives a bias voltage from a power supply unit, so as to perform an image processing operation on an image input signal. When operating under a second operation mode, the non-always on circuit block stops receiving the bias voltage from the power supply unit, so as to stop the image processing operation, and at least a microcontroller of the non-always on circuit block is powered down. One of the always on circuit block and the non-always on circuit block controls the power supply unit to stop supplying the bias voltage to the non-always on circuit block according an event trigger signal, such that the non-always on circuit block enters the second operation mode from the first operation mode.07-17-2014
20140354623Light-Emitting Diode Driving Device, Light-Emitting Diode Device, and Method for Driving the Same - A light-emitting diode driving device includes a light-emitting diode driving chip, for driving the one or more light-emitting diode strings according to a feedback voltage associated with the one or more light-emitting diode strings, and a voltage limiter, having a terminal coupled to the light-emitting diode driving chip and another terminal coupleable to the one or more light-emitting diode strings, for generating the feedback voltage for provision to the light-emitting diode driving chip according to a bottom voltage of the one or more light-emitting diode strings, and limiting the feedback voltage not to exceed a preset level; wherein the voltage limiter starts limiting the feedback voltage to substantially the preset level when the bottom voltage rises to the preset level.12-04-2014

Patent applications by Chung-Wen Wu, Yilan County TW

Hsiao-Ting Wu, Yilan County TW

Patent application numberDescriptionPublished
20100102374STORAGE NODE OF STACK CAPACITOR AND FABRICATION METHOD THEREOF - A storage node structure includes a substrate having thereon a conductive block region; an etching stop layer covering the conductive block region; a conductive layer penetrating the etching stop layer and electrically connecting the conductive block region; an annular shaped conductive spacer on sidewall of the conductive layer, wherein the annular shaped conductive spacer is disposed on the etching stop layer and wherein the annular shaped conductive spacer and the conductive layer constitute a storage node pedestal; and an upper node portion stacked on the storage node pedestal.04-29-2010
20150206789METHOD OF MODIFYING POLYSILICON LAYER THROUGH NITROGEN INCORPORATION FOR ISOLATION STRUCTURE - The present disclosure relates to a method of modifying a polysilicon layer, which includes the following steps. A polysilicon layer is provided. Nitrogen is incorporated into the polysilicon layer toward a predetermined depth. The polysilicon layer incorporated with nitrogen is etched, wherein after the nitrogenized polysilicon is removed, the formation of the remaining polysilicon layer is nearly indistinguishable from the formation of the polysilicon layer.07-23-2015

Hsin-Ping Wu, Yilan County TW

Patent application numberDescriptionPublished
20080248410METHOD FOR FORMING COLOR FILTER - A method for forming a color filter is provided. A substrate having a passivasion layer thereon is provided. The passivasion layer has at least one trench therein within a peripheral region of the substrate. A first color filter layer is formed over the passivasion layer to fill the trench by performing a first spin-on coating process with a first spin rate. Thereafter, the first color filter layer is patterned so as to form a plurality of first color filter blocks in a display region of the substrate and expose a portion of the passivasion layer. A second color filter layer is formed over the passivasion layer by performing a second spin-on coating process with a second spin rate, which is larger than the first spin rate. Next, the second color filter layer is patterned to form a plurality of second color filter blocks between the first color filter blocks respectively.10-09-2008

Hsin-Ying Wu, Yilan County TW

Patent application numberDescriptionPublished
20130250408AUTO-STEREOSCOPIC DISPLAY APPARATUS - An auto-stereoscopic display apparatus includes a display panel and a lens film. The display panel includes sub-pixel structures along an X-direction and a Y-direction to form a pixel array. A horizontal width of each sub-pixel structure is L09-26-2013
20150228237DISPLAY PANEL - A display panel including a first pixel array, a second pixel array and a display medium therebetween is provided. The first pixel array includes a plurality of first pixel sets, and the second pixel array includes a plurality of second pixel sets. The second pixel array is disposed overlapping the first pixel array, and the display medium is disposed between the first pixel array and the second pixel array. A display unit set is constituted by each of the first pixel sets, one of the second pixel sets disposed overlapping the each of the first pixel sets and the display medium disposed between the first pixel set and the second pixel set, and the display unit set includes a plurality of display units.08-13-2015

Hsu-Chih Wu, Yilan County TW

Patent application numberDescriptionPublished
20100063823METHOD AND SYSTEM FOR GENERATING DIALOGUE MANAGERS WITH DIVERSIFIED DIALOGUE ACTS - A method to generate dialogue manager (DM) is provided, in which a plurality DMs with the same purpose but having different dialogue acts is automatically generated according to a DM designed by a designer. An automatic aiding tool facilitates the design of a dialogue flow and the adjustment of DM rules, and also helps a system designer to find out potential problems in the original DM. The method adopts the current DM combined with a user simulation technique and further employs a specially designed scoring function, so as to automatically generate a plurality of new DMs. The new DMs achieve the same dialogue purpose as the original DM, but differ from the original DM in system acts and responses during the dialogue process. The dialogue flow of the dialogue system is enhanced, and meanwhile, the design and improvement of the DM are also accelerated.03-11-2010

Kuo-Chang Wu, Yilan County TW

Patent application numberDescriptionPublished
20160007469EMBEDDED COMPONENT SUBSTRATE AND METHOD FOR FABRICATING THE SAME - An embedded component substrate and methods for fabricating the same are provided. The embedded component substrate includes a substrate having at least one cavity, a first surface, and a second surface. The embedded component substrate also includes at least one electronic component formed in the at least one cavity. The embedded component substrate also includes a first wiring layer formed in the space between the at least one electronic component and the at least one cavity. The first wiring layer extends from the first surface of the substrate to a sidewall of the at least one cavity, and directly contacts the at least one electronic component.01-07-2016

Mark Y. Wu, Yilan County TW

Patent application numberDescriptionPublished
20130327702STRUCTURE OF AN ELECTROCHEMICAL SEPARATION MEMBRANE AND MANUFACTURING METHOD FOR FABRICATING THE SAME - A structure of an electrochemical separation membrane and a manufacturing method for fabricating the same are disclosed. The structure of an electrochemical separation membrane includes a base-phased polymer part in form of a continuous phase structure, a fabric-supported part distributed in the base-phased polymer part in striped shape to provide mechanic strength thereto, and inorganic particles distributed uniformly in the base-phased polymer part with 0.1 wt %˜50 wt %, wherein the fabric-supported part is a porous structure with a plurality of micro holes such that the base-phased polymer part filled into the micro holes to obtain better adhesive strength, inorganic particles distributed uniformly in the base-phased polymer part to reduce the shrinking of separation membrane and hence improving the thermal stability under high temperature. A lithium ion battery applying the electrochemical separation membrane of the present invention can reduce resistance, increase charge/discharge capacitance and prolong lifespan.12-12-2013
20130327704ELECTROCHEMICAL SEPARATION MEMBRANE AND THE MANUFACTURING METHOD THEREOF - An electrochemical separation membrane and the manufacturing method thereof are disclosed. The method includes: a polymer solution preparing step to mix a polymer material, solvent and ceramic precursors thoroughly to form a polymer solution, wherein the polymer material and the ceramic precursors are dissolved uniformly in the solvent; a coating step to coat the polymer solution on a porous base material; a hydrolysis step to cause the porous base material coated with the polymer solution to contact an aqueous solution to hydrolyze the ceramic precursor into ceramic particles; and a drying step to remove the water and the solvent from the porous base material and in order to form the electrochemical separation membrane. The electrochemical separation membrane made of this method have better ion conductivity, interface stability and thermal stability based on the ceramic particles.12-12-2013
20140342955Modified Lubricant - A modified lubricant includes lubricant grease and nano-graphite plates dispersed thoroughly in the lubricant grease. The content of the nano-graphite plates is 0.0001 wt % to 10 wt %. Each nano-graphite plate has a length or a width between 1 and 100 μm, a thickness within 10 nm and 100 nm, and N graphene layers stacked together and a surface modifying layer disposed on the top or bottom of the nano-graphite plates, wherein N is 30 to 300. The surface modifying layer has a surface modifying agent which includes at least two functional groups located at two ends of the surface modifying agent, one of the two functional groups is chemically bonded with certain organic functional group remaining on the surface of the nano-graphite plate, and the other of the two functional groups forms the functional surface of the nano-graphite plate.11-20-2014
20150118491HOLLOW GRAPHENE NANOPARTICLE AND METHOD FOR MANUFACTURING THE SAME - Disclosed are a hollow graphene nanoparticle and a method for manufacturing the same. The hollow graphene nanoparticle is made of graphene sheets stacked together, and has a particle size of 10˜500 nm and a specific surface area greater than 500 m04-30-2015
20150158729Method for Manufacturing Nano-Graphene Sheets - A method for manufacturing nano-graphene sheets, includes: intercalating and oxidizing a graphite material to form a graphite oxide by mixing the graphite material with an intercalation agent and oxidant; contacting the graphite oxide with a heat source to thermally flake the graphite oxide to nano-graphite sheets; suspending the nano-graphite sheets in a liquid medium and applying a mechanical shear force larger than 5,000 psi to mechanically flake the nano-graphite sheets for reducing the lateral size and thickness to form a nano-graphene suspension solution; separating the nano-graphene sheets from the nano-graphene suspension solution and drying the nano-graphene sheets; and finally reducing and heat treating the nano-graphene sheets to lower the oxygen content to less than 3 wt % and decrease the crystal defects.06-11-2015
20150221409Graphene Composite Fiber and Method for Manufacturing the Same - Disclosed is a graphene composite fiber and a method for manufacturing the same. The graphene composite fiber includes a polymer material and graphene sheets which are 1˜10% by weight of the graphene composite fiber, each having a modified layer with first organic functional groups and second organic functional groups for forming chemical bonds with the surface of the graphene sheet and the polymer material, respectively. The polymer material is a thermoplastic polymer for enclosing the graphene sheets. The method includes steps of preparing graphene sheets, modifying the surfaces of the graphene sheets, adding melted polymer material, blending, forming composite raw particles through the granulator, and finally spinning to form the graphene composite fibers. The graphene composite fibers of the present invention are manufactured by simple processes and possess excellent mechanical strength, thermal conductivity and electrical conductivity, thereby replacing commonly used fibers.08-06-2015
20150368439Graphene Polymer Composite Material - Disclosed is a graphene polymer composite material, including a matrix resin, a filler and a plurality of nano-scaled graphene sheets. Each nano-scaled graphene sheet has a surface-modified layer formed of a surface modifying agent, which provides hydrophilic and hydrophobic functional groups used to form chemical bonds with the matrix resin and the filler, thereby greatly improving strength of junction cohesion. The filler helps the graphene sheets to contact each other so as so to increase overall electrical conductivity and thermal conductivity. Since the graphene sheets are uniformly dispersed in the matrix resin, the composite material of the present invention possesses excellent mechanical property, anti-oxidation, acid-base resistance, high electrical conductivity and thermal conductivity. Therefore, the composite material is suitable for the industries in need of high performance material.12-24-2015

Patent applications by Mark Y. Wu, Yilan County TW

Ming-Chung Wu, Yilan County TW

Patent application numberDescriptionPublished
20140091812METHOD OF INTEGRATED CIRCUIT SCAN CLOCK DOMAIN ALLOCATION AND MACHINE READABLE MEDIA THEREOF - A method for deciding a scan clock domain allocation of an integrated circuit includes: utilizing a circuit netlist file and a timing constraints file of the integrated circuit to find out the amount of crossing paths between any two function clock domains of a plurality of function clock domains, and generate a clock domain report file; and grouping the plurality of function clock domains and allocating the plurality of function clock domains after being grouped into a plurality of scan clock domains according to the clock domain report file.04-03-2014

Ming-Huei Wu, Yilan County TW

Patent application numberDescriptionPublished
20130120469PIXEL ARRAY - A pixel array includes a first color pixel unit, a second color pixel unit and a third pixel unit, and the first, second and third pixel units respectively include a scan line, a data line, an active device electrically connected to the scan line and the data line and a first pixel electrode electrically connected to the active device. The first pixel electrode has at least one first slit, and a first acute angle is formed between an extending direction of the first slit and an extending direction of the scan line. Any two of the first acute angle of the first color pixel unit, the first acute angle of the second color pixel unit, and the first acute angle of the third color pixel unit are different.05-16-2013
20130293822DISPLAY PANEL - A display panel includes a pair of substrates, a pixel structure, and a display medium layer disposed between the pair of substrates. The pixel structure is disposed on one of the substrates, and includes first and second sub-pixels. The first sub-pixel includes a first pixel electrode, wherein the first pixel electrode has a first spacing in a first main region and has a second spacing in a first minor region, wherein the second spacing is smaller than the first spacing. The second sub-pixel includes a second pixel electrode, wherein the second pixel electrode has a third spacing in a second main region and has a fourth spacing in a second minor region, wherein the fourth spacing is larger than or equal to the third spacing, and wherein the first spacing is larger than the third spacing.11-07-2013
20140306222PIXEL STRUCTURE - A pixel structure includes a first conductive layer, a stacked layer, and a third conductive layer. The first conductive layer includes a first gate, a first scan line connected to the first gate, and a capacitor electrode separated from the first scan line. The stacked layer includes a semiconductor layer and a second conductive layer. The second conductive layer includes a data line, a first source connected to the data line, a second source, a first drain, a second drain, a connecting electrode connected to the second source and electrically connected to the first drain, and a coupling electrode connected to the second drain. The third conductive layer includes a first pixel electrode connected to the first drain, a second pixel electrode electrically connected to the connecting electrode, a first extending portion, and a second extending portion.10-16-2014
20140307210PIXEL STRUCTURE - A pixel structure including a first active device, a second active device, a first pixel electrode, a second pixel electrode, a third pixel electrode, a coupling electrode, and a capacitance electrode is provided. The first pixel electrode connected to the first active device and defines a first to a fourth liquid crystal alignment domain having different alignment directions. The second pixel electrode is connected to the coupling electrode and defines a fifth to an eighth liquid crystal alignment domain having different alignment directions. The third pixel electrode is connected to the second active device and defines a ninth and a tenth liquid crystal alignment domain. The coupling electrode is connected between the first active device and the second active device and extended to pass through the first, the second, and the third pixel electrodes. The capacitance electrode respectively overlaps parts of the first, the second, and the third pixel electrodes.10-16-2014
20140327852PIXEL STRUCTURE AND LIQUID CRYSTAL DISPLAY PANEL HAVING THE SAME - A pixel structure and a liquid crystal display (LCD) panel having the same are provided. The pixel structure includes a data line, a scan line, at least one active device, a pixel electrode, and a metal line. The active device is electrically connected to the data line and the scan line. The pixel electrode is electrically connected to the active device and has an opening at the edge of the pixel electrode adjacent to at least one of the data line and the scan line. The metal line is located below the pixel electrode. Besides, a portion of the metal line extending to the edge of the pixel electrode is exposed by the opening. The shortest distance between an edge of the opening of the pixel electrode and the metal line is greater than or substantially equal to 3 μm.11-06-2014
20150091955PIXEL ARRAY - A pixel array includes a first color pixel unit, a second color pixel unit and a third pixel unit, and the first, second and third pixel units respectively include a scan line, a data line, an active device electrically connected to the scan line and the data line and a first pixel electrode electrically connected to the active device. The first pixel electrode has at least one first slit, and a first acute angle is formed between an extending direction of the first slit and an extending direction of the scan line. Any two of the first acute angle of the first color pixel unit, the first acute angle of the second color pixel unit, and the first acute angle of the third color pixel unit are different.04-02-2015

Patent applications by Ming-Huei Wu, Yilan County TW

Tieh-Chiang Wu, Yilan County TW

Patent application numberDescriptionPublished
20110079823VERTICAL TRANSISTOR AND ARRAY OF VERTICAL TRANSISTOR - A vertical transistor includes a substrate, a gate, a source region, a drain region, a channel region and a gate dielectric layer. A trench is formed in the substrate, and the gate is disposed in the trench. The source region is disposed in the substrate beneath the gate. The drain region is disposed above the gate. The channel region is disposed at two sides of the gate and located between the source region and the drain region. The gate dielectric layer is located between the gate and the channel region.04-07-2011
20130001658CORNER TRANSISTOR AND METHOD OF FABRICATING THE SAME - A method of fabricating a corner transistor is described. An isolation structure is formed in a substrate to define an active region. A treating process is performed to make the substrate in the active region have sharp corners at top edges thereof. The substrate in the active region is covered by a gate dielectric layer. A gate conductor is formed over the gate dielectric layer. A source region and a drain region are formed in the substrate beside the gate conductor.01-03-2013
20130320442TRANSISTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - Provided is a transistor device including at least a vertical transistor structure. The vertical transistor structure includes a substrate, a dielectric layer, a gate, a first doped region, a second doped region, a third doped region, and a fourth doped region. The dielectric layer is disposed in a trench of the substrate. The gate is disposed in the dielectric layer. The gate defines, at both sides thereof, a first channel region and a second channel region in the substrate. The first doped region and the third doped region are disposed in the substrate and located below the first channel region and the second channel region, respectively. The second doped region and the fourth doped region are disposed in the substrate and located above the first channel region and the second channel region, respectively.12-05-2013
20130337629METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device is described. A substrate having first and second areas is provided. A first patterned mask layer having at least one first opening in the first area and at least one second opening in the second area is formed over the substrate, wherein the first opening is smaller than the second opening. A portion of the substrate is removed with the first patterned mask layer as a mask to form first and second trenches respectively in the substrate in the first and second areas, wherein the width and the depth of the first trench are less than those of the second trench. A first dielectric layer is formed at least in the first and second trenches. A conductive structure is formed on the first dielectric layer on at least a portion of the sidewall of each of the first and second trenches.12-19-2013

Ting-Hau Wu, Yilan County TW

Patent application numberDescriptionPublished
20130000409GYROSCOPE SENSORS - A gyroscope sensor includes a gyro disk. A first light source is configured to provide a first light beam. A first light receiver is configured to receive the first light beam for sensing a vibration at a first direction of the gyro disk. A second light source is configured to provide a second light beam substantially parallel with the first light beam. A second light receiver is configured to receive the second light beam for sensing a vibration in a second direction of the gyro disk. The second direction is different from the first direction.01-03-2013

Tsang-Chih Wu, Yilan County TW

Patent application numberDescriptionPublished
20110074726TOUCH PANEL AND TOUCHING POINT DETECTION METHOD THEREOF - A touch panel is disclosed. The touch panel mentioned above includes at least a touching detection column and a touching detection module. The detection column includes N first touching detection units, N is a positive integer. Each of the first touching detection units transfers a first capacitance varying value according to an area cover by a touching point. The touching detection module operates a differential operating on the first capacitance varying values from two of the first touching detection units which is disposed adjoining in sequential for obtaining a capacitance varying order distribution. The touching detection module obtains a number of at least one first touching point and coordinates thereof by calculating the capacitance varying order distribution.03-31-2011

Tsuhsiu Wu, Yilan County TW

Patent application numberDescriptionPublished
20130129287OPTICAL ENGINE ASSEMBLY AND MANUFACTURING METHOD THEREOF - There is provided an optical engine assembly including an active unit and a transmission unit. The active unit includes a first bearing member configured to carry an optoelectronic unit. The transmission unit includes a second bearing member configured to fix a plurality of optical waveguides. The optoelectronic unit is optically coupled to the optical waveguides. The first bearing member and the second bearing member have symmetrical structures. The present disclosure further provides a manufacturing method of an optical engine assembly.05-23-2013

Tsu Hsiu Wu, Yilan County TW

Patent application numberDescriptionPublished
20130129276OPTICAL ENGINE ASSEMBLY AND OPTOELECTRONIC PACKAGE - There is provided an optical engine assembly including a bench, at least one optoelectronic unit, at least one optical waveguide and a mount. At least one support groove and a positioning groove are formed on the bench and connected with each other, and the support groove perpendicularly extends outward from one side of the positioning groove. The optoelectronic unit is disposed at the other side of the positioning groove and aligned with the support groove. One end of the optical waveguide is placed inside the support groove and the other end thereof penetrates through at least one through hole of the mount.05-23-2013

Wei-Ching Wu, Yilan County TW

Patent application numberDescriptionPublished
20090174851LIQUID CRYSTAL DISPLAY PANEL AND MANUFACTURING METHOD THEREOF - An optically self-compensated birefringence liquid crystal display (OCB-LCD) panel including a first substrate, a first splay aligned layer, a second substrate and an OCB liquid crystal layer is provided. A first alignment layer is disposed on a surface of the first substrate. The first splay aligned layer is disposed on a surface of the first alignment layer, and the material of the first splay aligned layer includes a polymer polymerized by a first reactive mesogen (RM) monomer. The second substrate is disposed opposite to the first substrate, and a second alignment layer is disposed on a surface of the second substrate. The OCB liquid crystal layer is interposed between the first substrate and the second substrate.07-09-2009

Wen-Hsiang Wu, Yilan County TW

Patent application numberDescriptionPublished
20120223641LOW PROFILE TRANSFORMER - The instant disclosure relates to a low-profile transformer and methods of providing the transformer. The transformer in accordance with the present invention comprises a core unit having a pair of opposingly arranged base portions, an inserting portion, and at least a primary coil and a secondary coil wound around the inserting portion. The top-facing edge of the lateral portions is chamfered to enable tighter fitment into a receiving housing, such as a light tube. The transformer may also include a frame unit having a rounded flange that conforms to the shape of the wound coil. The instant disclosure further provides a method for providing a low-profile transformer that is particularly suitable for adapting in a tubular light device. The physical features and dimension of the transformer may be determined by methods that utilize the analysis of a characteristic equation in accordance with specific operating requirements.09-06-2012
20140109394LOW PROFILE TRANSFORMER - The instant disclosure relates to a low-profile transformer and methods of providing the transformer. The transformer in accordance with the present invention comprises a core unit having a pair of opposingly arranged base portions, an inserting portion, and at least a primary coil and a secondary coil wound around the inserting portion. The top-facing edge of the lateral portions is chamfered to enable tighter fitment into a receiving housing, such as a light tube. The transformer may also include a frame unit having a rounded flange that conforms to the shape of the wound coil. The instant disclosure further provides a method for providing a low-profile transformer that is particularly suitable for adapting in a tubular light device. The physical features and dimension of the transformer may be determined by methods that utilize the analysis of a characteristic equation in accordance with specific operating requirements.04-24-2014
20140111298LOW PROFILE TRANSFORMER - The instant disclosure relates to a low-profile transformer. The transformer in accordance with the present invention comprises a core unit having a pair of opposingly arranged base portions, an inserting portion, and at least a primary coil and a secondary coil wound around the inserting portion. The top-facing edge of the lateral portions is chamfered to enable tighter fitment into a receiving housing, such as a light tube. The transformer may also include a frame unit having a rounded flange that conforms to the shape of the wound coil. The instant disclosure further introduces a method for providing a low-profile transformer that is particularly suitable for adapting in a tubular light device. The physical features and dimension of the transformer may be determined by methods that utilize the analysis of a characteristic equation in accordance with specific operating requirements.04-24-2014

Wen Hua Wu, Yilan County TW

Patent application numberDescriptionPublished
20100125689ELECTRONIC APPARATUS CAPABLE OF RECEIVING DIFFERENT TYPES OF MEMORY CARDS - The invention provides an electronic apparatus capable of receiving a first-type memory card or a second-type memory card. In one embodiment, the electronic apparatus comprises a socket, a controller circuit, and an interface circuit. The socket is coupled to the first-type memory card through a set of first pins and is coupled to the second-type memory card with a set of second pins. The controller circuit accesses the first-type memory card or the second-type memory card via a plurality of input/output (IO) pins, and determines which of the first-type memory card and the second-type memory card is inserted into the socket according to the voltage of a target IO pin selected from the IO pins. The interface circuit sets the voltage of the target pin to different values according to whether the first-type memory card or the second-type memory card is inserted into the socket.05-20-2010

Wen Sheng Wu, Yilan County TW

Patent application numberDescriptionPublished
20140251421SOLAR CELL AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing solar cell includes providing a semiconductor substrate. A coating layer is then formed on a plurality of sides. Subsequently, an anti-reflective layer is formed on the layer. Finally at least one first electrode and at least one second electrode are formed. The first and second electrodes respectively and electrically connect to the second conductive amorphous substrate and the semiconductor substrate. The potential induced degradation is greatly reduced.09-11-2014
20150096613PHOTOVOLTAIC DEVICE AND METHOD OF MANUFACTURING THE SAME - The invention provides a photovoltaic device and method of manufacturing the same. The photovoltaic device of the invention includes a semiconductor structure assembly and a protection layer. The semiconductor structure assembly has a plurality of side surfaces, and includes a p-n junction, an n-p junction, a p-i-n junction, an n-i-p junction, a tandem junction or a multi-junction. In particular, the protection layer is formed to overlay the sides of the semiconductor structure assembly. Thereby, the protection layer can effectively inhibit the potential-induced degradation effect of the photovoltaic device of the invention.04-09-2015

Ya-Ting Wu, Yilan County TW

Yi-Jia Wu, Yilan County TW

Patent application numberDescriptionPublished
20150051052Flywheel Device of Bicycle - Disclosed is a flywheel device of a bicycle, including a flywheel means, a clutching means and a speed transforming means. The flywheel means is installed in rotation with the frame that is placed between the driving wheel and the driven wheel. The clutching means is engaged or disengaged between the flywheel means and the driving wheel according to an engaging state and a disengaging state thereof, wherein, a rotational energy is transferable between the flywheel means and the driving wheel during in the engaging state. The speed transforming means is connected between the flywheel means and the driving wheel by means of the clutching means to adjust a transmission ratio in relation to the driving wheel and the flywheel means.02-19-2015

Yi-Ju Wu, Yilan County TW

Patent application numberDescriptionPublished
20120275709BUILDING TEXTURE EXTRACTING APPARATUS AND METHOD THEREOF - A building texture extracting apparatus and a method thereof are provided, wherein the building texture extracting apparatus comprises a storage unit and a processor. The storage unit is configured to store an aerial image and a panoramic image of a building. There is a coordinate correlation between the aerial image and the panoramic image. The processor defines an edge segment of a building in the aerial image, calculates an edge function according to the edge segment, projects the edge function onto the panoramic image according to the coordinate correlation to derive an edge curve function, decides an edge curve segment according to the edge curve function, captures an image area under the edge curve segment to be a building texture of the building, and stores the building texture in the storage unit11-01-2012

Yi-Shuen Wu, Yilan County TW

Patent application numberDescriptionPublished
20130197256METHOD FOR THE PREPARATION OF GRAPHENE - A method for the preparation of graphene is provided, which includes: (a) oxidizing a graphite material to form graphite oxide; (b) dispersing graphite oxide into water to form an aqueous suspension of graphite oxide; (c) adding a dispersing agent to the aqueous suspension of graphite oxide; and (d) adding an acidic reducing agent to the aqueous suspension of graphite oxide, wherein graphite oxide is reduced to graphene by the acidic reducing agent, and graphene is further bonded with the dispersing agent to form a graphene dispersion containing a surface-modified graphene. The present invention provides a method for the preparation of graphene using an acidic reducing agent. The obtained graphene can be homogeneously dispersed in water, an acidic solution, a basic solution, or an organic solution.08-01-2013

Yung-Yu Wu, Yilan County TW

Patent application numberDescriptionPublished
20090108859TESTING CIRCUIT BOARD - The invention discloses a testing circuit board for placing a device under test and further testing the device under test according to a plurality of testing signals generated by a tester. The testing circuit board includes a circuit board and a plurality of sets of sockets. The circuit board includes a plurality of connecting holes. The plurality of sets of sockets are located on a plurality of connecting holes and electrically connects to the device under test via a plurality of connecting interfaces for transferring the plurality of testing signals to test the device under test.04-30-2009
20100153800LOGIC TESTER AND METHOD FOR SIMULTANEOUSLY MEASURING DELAY PERIODS OF MULTIPLE TESTED DEVICES - The invention provides a logic tester. In one embodiment, the logic tester is coupled to a plurality of tested devices, and includes a function generator and a pattern comparator. The function generator generates an initial code sequence as an input signal of the tested devices to fix output signals of the tested devices to a first value, and then generates a functional code sequence as the input signal of the tested devices to trigger the output signals of the tested devices to change from the first value to a second value. The pattern comparator converts the output signals of the tested devices to a plurality of bitstreams after the functional code sequence is generated, calculates numbers of bits corresponding to the first value in the bitstreams, estimates delay periods of the tested devices according to the numbers of bits, and outputs the delay periods of the tested devices.06-17-2010

Patent applications by Yung-Yu Wu, Yilan County TW

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