Patent application number | Description | Published |
20100270602 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor memory device and a method for manufacturing the same are disclosed, which reduce parasitic capacitance generated between a storage node contact and a bit line of a high-integration semiconductor device. A method for manufacturing a semiconductor memory device includes forming a buried word line in an active region of a cell region, forming an insulation layer in the cell region and a lower electrode layer of a gate in a peripheral region so that a height of the insulation layer is substantially equal to that of the lower electrode layer, and providing a first conductive layer over the cell region and the peripheral region to form a bit line layer and an upper electrode layer. | 10-28-2010 |
20110147832 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a semiconductor device, the method comprising: forming a mask pattern over a semiconductor substrate including a device isolation film; etching the semiconductor substrate with the mask pattern as a barrier to form a recess having a semi-circular shape; filling a sacrificial material in the semi-circular shaped recess and between the mask pattern; removing the mask pattern; forming a silicon layer in a portion where the mask pattern is removed; removing the sacrificial material to form a gate region; and providing to gate electrode material in the gate region to form a gate pattern thereby enlarging the radius of curvature of the lower portion of the buried gate to improve a DIBL characteristic and enlarging the area of the part connected to a gate junction to improve contact resistance. | 06-23-2011 |
20120132968 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device and a method for manufacturing the same are disclosed. The method for manufacturing a semiconductor device includes forming a device isolation film defining an active region over a semiconductor substrate including a periphery region, forming a gate pattern over the active region, forming a contact plug coupled to each of the gate pattern and the active region, forming a line coupled to the contact plug and a first reservoir capacitor over the same layer as in the line, and forming a second storage capacitor coupled to the first storage capacitor. The semiconductor device sufficiently endures a high bias not only using a line electrode and a dielectric film of a periphery region but also using a MOS-type storage capacitor of an upper electrode, and couples a cylindrical storage capacitor in series to a MOS-type capacitor so that it can be used in a small region. | 05-31-2012 |
20120160750 | MEMBRANE MODULE AND MEMBRANE MODULE ASSEMBLY, AND IMMERSION-TYPE LAYER-SEPA-RATING APPARATUS INCLUDING SAME - Disclosed is a membrane module including: one or more membrane units covering a support and including a membrane having at least one side fused, wherein both sides of each of the membrane units perpendicular to one side of the membrane are molded to be coupled with the first and second frames, respectively. | 06-28-2012 |
20130176250 | MOBILE TERMINAL AND CONTROL METHOD THEREOF - A mobile terminal and a control method of the mobile terminal are disclosed. A mobile terminal and a control method of the mobile terminal of the present invention comprises a first camera; a touchpad; and a controller, if a touch input of a user is obtained through the touchpad, configured to carry out operation based on a gaze direction of the user obtained through the first camera. According to the present invention, operability for the mobile terminal is improved by controlling the mobile terminal based on a touch input through a touchpad and a gaze direction of the user. | 07-11-2013 |
20150115392 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a bit line disposed over a semiconductor substrate, a supporting film being perpendicular to the bit line, a first storage node contact disposed at a lower part of a region disposed between the bit line and the supporting film, and a second storage node contact having a line shape, disposed over the first storage node contact and the bit line, isolated by the supporting film, and patterned in a diagonal direction across the bit line. | 04-30-2015 |
20150380415 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a bit line disposed over a semiconductor substrate, a supporting film being perpendicular to the bit line, a first storage node contact disposed at a lower part of a region disposed between the bit line and the supporting film, and a second storage node contact having a line shape, disposed over the first storage node contact and the bit line, isolated by the supporting film, and patterned in a diagonal direction across the bit line. | 12-31-2015 |
20160042785 | MEMORY DEVICE INCLUDING REFERENCE VOLTAGE GENERATOR - A memory device includes a first memory cell array including memory cells of a single-ended bitline structure, a second memory cell array including memory cells of a single-ended bitline structure, a reference voltage generator configured to output a bitline voltage of a selected one of the first and second memory cell arrays as a sensing voltage according to an array select signal and output a bitline voltage of an unselected memory cell array as a reference voltage, and a differential sense amplifier configured to amplify and output a difference between the sensing voltage and the reference voltage. Logic states of the sensing voltage and the reference voltage are complementary to each other. | 02-11-2016 |