Patent application number | Description | Published |
20090325996 | CAMPTOTHECIN DERIVATIVES AND THEIR USE - New camptothecin derivatives with the following structure of the formula (I), their use and the pharmaceutical compositions containing the same. The compounds of the present invention have good anti-tumor activities and good solubility in water, and can be used in development of medicines. | 12-31-2009 |
20110089479 | SCALABLE FLASH EEPROM MEMORY CELL WITH FLOATING GATE SPACER WRAPPED BY CONTROL GATE AND METHOD OF MANUFACTURE - A polysilicon spacer as a floating gate of a Flash memory device. An advantage of such spacer structure is to reduce a cell size, which is desirable for state-of-the-art Flash memory technology. In a preferred embodiment, the floating gate can be self-aligned to a nearby and/or within a vicinity of the select gate of the cell select transistor. In a preferred embodiment, the present invention preserves a tunnel oxide layer after the removal, using dry etching, a polysilicon spacer structure on the drain side of the select transistor gate. More preferably, the present method provides for a certain amount of tunnel oxide to remain so as to prevent the active silicon area in the drain region of the memory cell from being etched by the dry etching gas. | 04-21-2011 |
20120146123 | SCALABLE FLASH EEPROM MEMORY CELL WITH FLOATING GATE SPACER WRAPPED BY CONTROL GATE AND METHOD OF MANUFACTURE - A flash memory cell includes a substrate having a surface region and a flash memory cell structure on the surface region. The flash memory cell structure includes a gate dielectric layer on the surface region, a select gate on the gate dielectric layer, a cap oxide layer on the select gate, an oxide spacer on a first edge of the select gate, a tunnel oxide layer on a first region and on a second region of the surface region. The second region is an active region. The flash memory cell structure further includes a poly spacer on the first edge of the oxide spacer and a portion of the tunnel oxide layer on the first region, an ONO layer on at least the poly spacer and a control gate layer on the ONO layer. | 06-14-2012 |
20130034060 | METHOD, APPARATUS, AND SYSTEM FOR PROCESSING EMPS IN A CSFB MECHANISM - Embodiments of the present invention provide a method, an apparatus, and a system for processing an eMPS in a CSFB mechanism. The method in the embodiment of the present invention mainly includes: receiving a CSFB access request of a user equipment; determining that the user equipment has a CSFB priority service right according to acquired priority service information of the user equipment; and providing a CSFB access service preferentially for the user equipment with the CSFB priority service right. | 02-07-2013 |
20130115979 | SERVICE IMPLEMENTATION METHOD, APPARATUS, AND SYSTEM - A service implementation method, apparatus, and system are disclosed. The service implementation method includes: receiving, by a serving gateway, a data packet of a terminal device sent by a packet data network gateway; if the data packet is a data packet with a serving priority and the serving gateway has sent a paging trigger message with a serving priority to a mobility management element, skipping, by the serving gateway, sending a paging trigger message to the mobility management element; or if the data packet is a data packet with a serving priority and the serving gateway has sent no paging trigger message with a serving priority to a mobility management element, sending, by the serving gateway, a paging trigger message to the mobility management element; wherein the paging trigger message is used to enable the mobility management element to page the terminal device. | 05-09-2013 |
20140369264 | SERVICE IMPLEMENTATION METHOD, APPARATUS, AND SYSTEM - A service implementation method, apparatus, and system are disclosed. The service implementation method includes: receiving, by a serving gateway, a data packet of a terminal device sent by a packet data network gateway; if the data packet is a data packet with a serving priority and the serving gateway has sent a paging trigger message with a serving priority to a mobility management element, skipping, by the serving gateway, sending a paging trigger message to the mobility management element; or if the data packet is a data packet with a serving priority and the serving gateway has sent no paging trigger message with a serving priority to a mobility management element, sending, by the serving gateway, a paging trigger message to the mobility management element; wherein the paging trigger message is used to enable the mobility management element to page the terminal device. | 12-18-2014 |
20140375342 | A BI-DIRECTIONAL INPUT, BI-DIRECTIONAL OUTPUT, LOSSLESS CURRENT SENSING SCHEME WITH TEMPERATURE COMPENSATION - A sensing circuit for a power PET. A first sensing FET senses current flow from load to ground. A second sensing FET senses current flow from ground to load. The current flows are converted to voltages, then added to generate a sensed output voltage. The specific amplitude of the sensed output voltage indicates the direction of the current flow. Resistive elements used to convert currents to voltages are configured as pairs of resistors having temperature coefficients of opposite polarity in order to compensate for temperature effects in the sensing circuit. | 12-25-2014 |
20150045491 | POLYURETHANE/ACRYLIC HYBRID DISPERSIONS FOR ROOF COATINGS AND THEIR PREPARATION - The present invention provides a process for making polyurethane/acrylic hybrid dispersions useful in high PVC coatings with excellent DPUR and water swelling performance, wherein acid monomers are used in acrylic polymerization. | 02-12-2015 |
20150087300 | METHOD, APPARATUS, AND SYSTEM FOR PROCESSING EMPS IN A CSFB MECHANISM - Embodiments of the present invention provide a method, an apparatus, and a system for processing an eMPS in a CSFB mechanism. The method in the embodiment of the present invention mainly includes: receiving a CSFB access request of a user equipment; determining that the user equipment has a CSFB priority service right according to acquired priority service information of the user equipment; and providing a CSFB access service preferentially for the user equipment with the CSFB priority service right. | 03-26-2015 |
20150117190 | SERVICE PACKET PROCESSING METHOD AND DEVICES - A service packet processing method and a device are disclosed. The method includes: receiving service class information sent by a core network; acquiring indication information of the core network; and processing a service packet of a user equipment according to the service class information and the indication information. According to the present invention, a service packet can be correctly processed, and the stability of an access network can be improved. | 04-30-2015 |
20150350966 | METHOD, APPARATUS, AND SYSTEM FOR PROCESSING EMPS IN A CSFB MECHANISM - Embodiments of the present invention provide a method, an apparatus, and a system for processing an eMPS in a CSFB mechanism. The method in the embodiment of the present invention mainly includes: receiving a CSFB access request of a user equipment; determining that the user equipment has a CSFB priority service right according to acquired priority service information of the user equipment; and providing a CSFB access service preferentially for the user equipment with the CSFB priority service right. | 12-03-2015 |
20150364591 | HEMT DEVICE AND FABRICATION METHOD - A HEMT device, including: a substrate, a nucleating layer, a buffer layer, a channel layer, and a barrier layer, and a source, a gate, and a drain that are formed on the barrier layer, the substrate is provided with a device surface disposed facing the nucleating layer and a substrate back surface away from the device surface, a source back hole and a channel back hole are opened on the substrate back surface, the source back hole penetrates through the substrate, the nucleating layer, the buffer layer, the channel layer, and the barrier layer and extends to the source, the channel back hole penetrates through at least one part of the substrate, the HEMT device is further provided with a thermally and electrically conductive layer, and the thermally and electrically conductive layer is filled in the source back hole and the channel back hole and covers the substrate back surface. | 12-17-2015 |
20160073289 | OVERLOAD CONTROL METHOD, AND DEVICE - The present invention discloses an overload control method, a gateway device, a mobility management entity, and a PGW. The method includes: determining, by a gateway device, first overload indication information, where the first overload indication information is used to indicate an overload control policy; and sending, by the gateway device, the first overload indication information to a mobility management entity, so that the mobility management entity executes the overload control policy according to the first overload indication information. According to the overload control method, the gateway device, the mobility management entity, and the PGW in embodiments of the present invention, adverse impact brought by device overload can be avoided; therefore, the device overload can be effectively controlled. | 03-10-2016 |
Patent application number | Description | Published |
20090004852 | Nanostructures Containing Metal Semiconductor Compounds - A network element ( | 01-01-2009 |
20090014707 | NON-VOLATILE SOLID STATE RESISTIVE SWITCHING DEVICES - Non-crystalline silicon non-volatile resistive switching devices include a metal electrode, a non-crystalline silicon layer and a planar doped silicon electrode. An electrical signal applied to the metal electrode drives metal ions from the metal electrode into the non-crystalline silicon layer to form a conducting filament from the metal electrode to the planar doped silicon electrode to alter a resistance of the non-crystalline silicon layer. Another electrical signal applied to the metal electrode removes at least some of the metal ions forming the conducting filament from the non-crystalline silicon layer to further alter the resistance of the non-crystalline silicon layer. | 01-15-2009 |
20100085798 | SILICON-BASED NANOSCALE RESISTIVE DEVICE WITH ADJUSTABLE RESISTANCE - A non-volatile solid state resistive device that includes a first electrode, a p-type poly-silicon second electrode, and a non-crystalline silicon nanostructure electrically connected between the electrodes. The nanostructure has a resistance that is adjustable in response to a voltage being applied to the nanostructure via the electrodes. The nanostructure can be formed as a nanopillar embedded in an insulating layer located between the electrodes. The first electrode can be a silver or other electrically conductive metal electrode. A third (metal) electrode can be connected to the p-type poly-silicon second electrode at a location adjacent the nanostructure to permit connection of the two metal electrodes to other circuitry. The resistive device can be used as a unit memory cell of a digital non-volatile memory device to store one or more bits of digital data by varying its resistance between two or more values. | 04-08-2010 |
20100102290 | SILICON BASED NANOSCALE CROSSBAR MEMORY - The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second material. The first and the second array are oriented at an angle with each other. The array further includes a plurality of nanostructures of non-crystalline silicon disposed between a nanowire of the first material and a nanowire of the second material at each intersection of the two arrays. The nanostructures form a resistive memory cell together with the nanowires of the first and second materials. | 04-29-2010 |
20110001117 | NANOSCALE WIRE-BASED MEMORY DEVICES - The present invention generally relates to nanotechnology and sub-microelectronic devices that can be used in circuitry, and, in particular, to nanoscale wires and other nanostructures able to encode data. One aspect of the present invention is directed to a device comprising an electrical crossbar array comprising at least two crossed wires at a cross point. In some cases, at least one of the crossed wires is a nanoscale wire, and in certain instances, at least one of the crossed wires is a nanoscale wire comprising a core and at least one shell surrounding the core. For instance, the core may comprise a crystal (e.g., crystalline silicon) and the shell may be at least partially amorphous (e.g., amorphous silicon). In certain embodiments, the cross point may exhibit intrinsic current rectification, or other electrical behaviors, and the cross point can be used as a memory device. For example, in one embodiment, the cross point may exhibit a first conductance at a positive voltage, and the cross point may exhibit a second conductance at a negative voltage. Accordingly, by applying suitable voltages to the cross point, data may be stored at the cross point. Other aspects of the present invention are directed to systems and methods for making or using such devices, kits involving such devices, or the like. | 01-06-2011 |
20110305064 | INTERFACE CONTROL FOR IMPROVED SWITCHING IN RRAM - A memory device has a crossbar array including a first array of first electrodes extending along a first direction. A second array of second electrodes extends along a second direction. A non-crystalline silicon structure provided between the first electrode and the second electrode at an intersection defined by the first array and the second array. The non-crystalline silicon structure has a first layer having a first defect density and a second layer having a second defect density different from the first defect density. Each intersection of the first array and the second array defines a two-terminal memory cell. | 12-15-2011 |
20110317470 | RECTIFICATION ELEMENT AND METHOD FOR RESISTIVE SWITCHING FOR NON VOLATILE MEMORY DEVICE - A method of suppressing propagation of leakage current in an array of switching devices. The method includes providing a dielectric breakdown element integrally and serially connected to a switching element within each of the switching device. A read voltage (for example) is applied to a selected cell. The propagation of leakage current is suppressed by each of the dielectric breakdown element in unselected cells in the array. The read voltage is sufficient to cause breakdown in the selected cells but insufficient to cause breakdown in the serially connected, unselected cells in a specific embodiment. Methods to fabricate of such devices and to program, to erase and to read the device are provided. | 12-29-2011 |
20120001146 | NANOSCALE METAL OXIDE RESISTIVE SWITCHING ELEMENT - A non-volatile memory device structure. The non-volatile memory device structure comprises a first electrode formed from a first metal material, a resistive switching element overlying the first electrode. The resistive switching element comprises a metal oxide material characterized by one or more oxygen deficient sites. The device includes a second electrode overlying the resistive switching layer, the second electrode being formed from a second metal material. The second electrode is made from a noble metal. The one or more oxygen deficient sites are caused to migrate from one of the first electrode or the second electrode towards the other electrode upon a voltage applied to the first electrode or the second electrode. The device can have a continuous change in resistance upon applying a continuous voltage ramp, suitable for an analog device. Alternatively, the device can have a sharp change in resistance upon applying the continuous voltage ramp, suitable for a digital device. | 01-05-2012 |
20120007035 | Intrinsic Programming Current Control for a RRAM - A resistive switching device. The device includes a substrate and a first dielectric material overlying a surface region of the substrate. The device includes a first electrode overlying the first dielectric material and an optional buffer layer overlying the first electrode. The device includes a second electrode structure. The second electrode includes at least a silver material. In a specific embodiment, a switching material overlies the optional buffer layer and disposed between the first electrode and the second electrode. The switching material comprises an amorphous silicon material in a specific embodiment. The amorphous silicon material is characterized by a plurality of defect sites and a defect density. The defect density is configured to intrinsically control programming current for the device. | 01-12-2012 |
20120008366 | RESTIVE MEMORY USING SiGe MATERIAL - A resistive memory device includes a first electrode; a second electrode having a polycrystalline semiconductor layer that includes silicon; a non-crystalline silicon structure provided between the first electrode and the second electrode. The first electrode, second electrode and non-crystalline silicon structure define a two-terminal resistive memory cell. | 01-12-2012 |
20120043519 | DEVICE SWITCHING USING LAYERED DEVICE STRUCTURE - A resistive switching device. The device includes a first electrode comprising a first metal material overlying the first dielectric material and a switching material comprising an amorphous silicon material. The device includes a second electrode comprising at least a second metal material. In a specific embodiment, the device includes a buffer material disposed between the first electrode and the switching material. The buffer material provides a blocking region between the switching material and the first electrode so that the blocking region is substantially free from metal particles from the second metal material when a first voltage is applied to the second electrode. | 02-23-2012 |
20120166169 | MODELING TECHNIQUE FOR RESISTIVE RANDOM ACCESS MEMORY (RRAM) CELLS - Accurate simulation of two-terminal resistive random access memory (RRAM) behavior is accomplished by solving equations including state variables for filament length growth, filament width growth, and temperature. Such simulations are often run in a SPICE environment. Highly accurate models simulate the dynamic nature of filament propagation and multiple resistive states by using a sub-circuit to represent an RRAM cell. In the sub-circuit, voltages on floating nodes control current output while the voltage dropped across the sub-circuit controls growth and temperature characteristics. Properly executed, such a sub-circuit can accurately model filament growth at all phases of conductance including dynamic switching and a plurality of resistive states. | 06-28-2012 |
20120305879 | SWITCHING DEVICE HAVING A NON-LINEAR ELEMENT - A switching device includes a substrate; a first electrode formed over the substrate; a second electrode formed over the first electrode; a switching medium disposed between the first and second electrode; and a nonlinear element disposed between the first and second electrodes and electrically coupled in series to the first electrode and the switching medium. The nonlinear element is configured to change from a first resistance state to a second resistance state on application of a voltage greater than a threshold. | 12-06-2012 |
20130134379 | RESISTIVE MEMORY USING SIGE MATERIAL - A resistive memory device includes a first electrode; a second electrode having a polycrystalline semiconductor layer that includes silicon; a non-crystalline silicon structure provided between the first electrode and the second electrode. The first electrode, second electrode and non-crystalline silicon structure define a two-terminal resistive memory cell. | 05-30-2013 |
20130295744 | INTERFACE CONTROL FOR IMPROVED SWITCHING IN RRAM - A memory device has a crossbar array including a first array of first electrodes extending along a first direction. A second array of second electrodes extends along a second direction. A non-crystalline silicon structure provided between the first electrode and the second electrode at an intersection defined by the first array and the second array. The non-crystalline silicon structure has a first layer having a first defect density and a second layer having a second defect density different from the first defect density. Each intersection of the first array and the second array defines a two-terminal memory cell. | 11-07-2013 |
20130308369 | SWITCHING DEVICE HAVING A NON-LINEAR ELEMENT - Method for a memory including a first, second, third and fourth cells include applying a read, program, or erase voltage, the first and second cells coupled to a first top interconnect, the third and fourth cells coupled to a second top interconnect, the first and third cells coupled to a first bottom interconnect, the second and fourth cells are to a second bottom interconnect, each cell includes a switching material overlying a non-linear element (NLE), the resistive switching material is associated with a first conductive threshold voltage, the NLE is associated with a lower, second conductive threshold voltage, comprising applying the read voltage between the first top and the first bottom electrode to switch the NLE of the first cell to conductive, while the NLEs of the second, third, and the fourth cells remain non-conductive, and detecting a read current across the first cell in response to the read voltage. | 11-21-2013 |
20130328007 | NON-VOLATILE SOLID STATE RESISTIVE SWITCHING DEVICES - Non-crystalline silicon non-volatile resistive switching devices include a metal electrode, a non-crystalline silicon layer and a planar doped silicon electrode. An electrical signal applied to the metal electrode drives metal ions from the metal electrode into the non-crystalline silicon layer to form a conducting filament from the metal electrode to the planar doped silicon electrode to alter a resistance of the non-crystalline silicon layer. Another electrical signal applied to the metal electrode removes at least some of the metal ions forming the conducting filament from the non-crystalline silicon layer to further alter the resistance of the non-crystalline silicon layer. | 12-12-2013 |
20140034898 | SWITCHING DEVICE HAVING A NON-LINEAR ELEMENT - A switching device includes a substrate; a first electrode formed over the substrate; a second electrode formed over the first electrode; a switching medium disposed between the first and second electrode; and a nonlinear element disposed between the first and second electrodes and electrically coupled in series to the first electrode and the switching medium. The nonlinear element is configured to change from a first resistance state to a second resistance state on application of a voltage greater than a threshold. | 02-06-2014 |
20140036605 | RESISTIVE SWITCHING FOR NON VOLATILE MEMORY DEVICE USING AN INTEGRATED BREAKDOWN ELEMENT - A method of suppressing propagation of leakage current in an array of switching devices. The method includes providing a dielectric breakdown element integrally and serially connected to a switching element within each of the switching device. A read voltage (for example) is applied to a selected cell. The propagation of leakage current is suppressed by each of the dielectric breakdown element in unselected cells in the array. The read voltage is sufficient to cause breakdown in the selected cells but insufficient to cause breakdown in the serially connected, unselected cells in a specific embodiment. Methods to fabricate of such devices and to program, to erase and to read the device are provided. | 02-06-2014 |
20140054539 | METHOD AND STRUCTURE OF MONOLITHICALLY INTEGRATED IC AND RESISTIVE MEMORY USING IC FOUNDRY-COMPATIBLE PROCESSES - The present invention relates to integrating a resistive o y device on top of an IC substrate monolithically using IC-foundry compatible processes. A method for forming an integrated circuit includes receiving a semiconductor substrate having a CMOS IC device formed on a surface region, forming a dielectric layer overlying the CMOS IC device, forming first electrodes over the dielectric layer in a first direction, forming second electrodes over the first electrodes in along a second direction different from the first direction, and forming a two-terminal resistive memory cell at each intersection of the first electrodes and the second electrodes using foundry-compatible processes, including: forming a resistive switching material having a controllable resistance, disposing an interface material including p-doped polycrystalline silicon germanium—containing material between the resistive switching material and the first electrodes, and disposing an active metal material between the resistive switching material and the second electrodes. | 02-27-2014 |
20140153317 | SILICON-BASED NANOSCALE RESISTIVE DEVICE WITH ADJUSTABLE RESISTANCE - A non-volatile solid state resistive device that includes a first electrode, a p-type poly-silicon second electrode, and a non-crystalline silicon nanostructure electrically connected between the electrodes. The nanostructure has a resistance that is adjustable in response to a voltage being applied to the nanostructure via the electrodes. The nanostructure can be formed as a nanopillar embedded in an insulating layer located between the electrodes. The first electrode can be a silver or other electrically conductive metal electrode. A third (metal) electrode can be connected to the p-type poly-silicon second electrode at a location adjacent the nanostructure to permit connection of the two metal electrodes to other circuitry. The resistive device can be used as a unit memory cell of a digital non-volatile memory device to store one or more bits of digital data by varying its resistance between two or more values. | 06-05-2014 |
20140233301 | RESISTIVE SWITCHING FOR NON VOLATILE MEMORY DEVICE USING AN INTEGRATED BREAKDOWN ELEMENT - A method of suppressing propagation of leakage current in an array of switching devices. The method includes providing a dielectric breakdown element integrally and serially connected to a switching element within each of the switching device. A read voltage (for example) is applied to a selected cell. The propagation of leakage current is suppressed by each of the dielectric breakdown element in unselected cells in the array. The read voltage is sufficient to cause breakdown in the selected cells but insufficient to cause breakdown in the serially connected, unselected cells in a specific embodiment. Methods to fabricate of such devices and to program, to erase and to read the device are provided. | 08-21-2014 |
20150021538 | DEVICE SWITCHING USING LAYERED DEVICE STRUCTURE - A resistive switching device. The device includes a first electrode comprising a first metal material overlying the first dielectric material and a switching material comprising an amorphous silicon material. The device includes a second electrode comprising at least a second metal material. In a specific embodiment, the device includes a buffer material disposed between the first electrode and the switching material. The buffer material provides a blocking region between the switching material and the first electrode so that the blocking region is substantially free from metal particles from the second metal material when a first voltage is applied to the second electrode. | 01-22-2015 |
20150102281 | SWITCHING DEVICE HAVING A NON-LINEAR ELEMENT - A switching device includes a substrate; a first electrode formed over the substrate; a second electrode formed over the first electrode; a switching medium disposed between the first and second electrode; and a nonlinear element disposed between the first and second electrodes and electrically coupled in series to the first electrode and the switching medium. The nonlinear element is configured to change from a first resistance state to a second resistance state on application of a voltage greater than a threshold. | 04-16-2015 |
20150138873 | SILICON BASED NANOSCALE CROSSBAR MEMORY - The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second material. The first and the second array are oriented at an angle with each other. The array further includes a plurality of nanostructures of non-crystalline silicon disposed between a nanowire of the first material and a nanowire of the second material at each intersection of the two arrays. The nanostructures form a resistive memory cell together with the nanowires of the first and second materials. | 05-21-2015 |
20150155395 | SCHOTTKY DIODE AND METHOD OF FABRICATING THE SAME - Provided is a Schottky diode. The Schottky diode includes: a substrate; a core on the substrate; a metallic layer on the core; and a shell surrounding the core between the metallic layer and the substrate and adjusting a Fermi energy level of the core to form a Schottky junction between the core and the metallic layer. | 06-04-2015 |
20150221929 | High Performance Lithium Battery Electrodes By Self-Assembly Processing - Disclosed are methods and processes for producing electrochemical devices having well-organized nanostructures or microstructures. In one aspect, the present invention discloses a simple, cheap, and fast nanotechnology-based manufacturing process for fabricating high performance electrodes. The present processing technique is highly versatile and can be applied to diverse materials systems for anode and cathode electrodes. | 08-06-2015 |
20150228334 | MEMORY ARRAY ARCHITECTURE WITH TWO-TERMINAL MEMORY CELLS - A non-volatile memory device includes a word line extending along a first direction; a bit line extending along a second direction; a memory unit having a read transistor coupled to the bit line, at least one two-terminal memory cell, and a select transistor, the two-terminal memory cell having a first end coupled to the word line and a second end coupled to a gate of the read transistor. The second end of the two-terminal memory cell is coupled to a common node shared by a drain of the select transistor and the gate of the read transistor. | 08-13-2015 |
20150357567 | RESISTIVE SWITCHING FOR NON VOLATILE MEMORY DEVICE USING AN INTEGRATED BREAKDOWN ELEMENT - A method of suppressing propagation of leakage current in an array of switching devices. The method includes providing a dielectric breakdown element integrally and serially connected to a switching element within each of the switching device. A read voltage (for example) is applied to a selected cell. The propagation of leakage current is suppressed by each of the dielectric breakdown element in unselected cells in the array. The read voltage is sufficient to cause breakdown in the selected cells but insufficient to cause breakdown in the serially connected, unselected cells in a specific embodiment. Methods to fabricate of such devices and to program, to erase and to read the device are provided. | 12-10-2015 |
20160005964 | SILICON BASED NANOSCALE CROSSBAR MEMORY - The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second material. The first and the second array are oriented at an angle with each other. The array further includes a plurality of nanostructures of non-crystalline silicon disposed between a nanowire of the first material and a nanowire of the second material at each intersection of the two arrays. The nanostructures form a resistive memory cell together with the nanowires of the first and second materials. | 01-07-2016 |
Patent application number | Description | Published |
20090263485 | Targeted hollow gold nanostructures and methods of use - Provided are novel nanostructures comprising hollow nanospheres and nanotubes for use as chemical sensors and molecular specific photothermal coupling agents. The nanostructures can be used in laser-induced phototherapy for treatment of cancer and other disorders. The nanostructures can also be used as a sensor that detects molecules. The nanostructures are of particular use in the fields of clinical diagnosis, clinical therapy, clinical treatment, and clinical evaluation of various diseases and disorders, manufacture of compositions for use in the treatment of various diseases and disorders, for use in molecular biology, structural biology, cell biology, molecular switches, molecular circuits, and molecular computational devices, and the manufacture thereof. The hollow gold nanospheres have a unique combination of spherical shape, small size, and strong, tunable, and narrow surface plasmon resonance absorption covering the entire visible to near IR region. | 10-22-2009 |
20120142111 | NANOMATERIAL-CONTAINING SIGNALING COMPOSITIONS FOR ASSAY OF FLOWING LIQUID STREAMS AND GEOLOGICAL FORMATIONS AND METHODS FOR USE THEREOF - Compositions containing a transporter component and a signaling component and a method for using said compositions for analyzing porous media and flowing liquid streams, specifically for measuring pressure, temperature, relative abundance of water, pH, redox potential and electrolyte concentration. Analytes may include petroleum or other hydrophobic media, sulfur-containing compounds. The transporter component includes an amphiphilic nanomatenal and a plurality of solubilizing groups covalently bonded to the transporter component. The signaling component includes a plurality of reporter molecules associated with the transporter component. Said reporter molecules may be releasable from the transporter component upon exposure to at least one analyte. The reporter molecules may be non-covalently associated with the transporter component, or the reporter molecules are covalently bonded to the transporter component. Furthermore, said compositions and methods may be used to actively enhance oil recovery and for remediation of pollutants. | 06-07-2012 |
20140367091 | WELLBORE FLUIDS INCORPORATING MAGNETIC CARBON NANORIBBONS AND MAGNETIC FUNCTIONALIZED CARBON NANORIBBONS AND METHODS OF USING THE SAME - A wellbore fluid may include an oleaginous continuous phase, one or more magnetic carbon nanoribbons, and at least one weighting agent. A method of performing wellbore operations may include circulating a wellbore fluid comprising a magnetic carbon nanoribbon composition and a base fluid through a wellbore. A method for electrical logging of a subterranean well may include placing into the subterranean well a logging medium, wherein the logging medium comprises a non-aqueous fluid and one or more magnetic carbon nanoribbons, wherein the one or more magnetic carbon nanoribbons are present in a concentration so as to permit the electrical logging of the subterranean well; and acquiring an electrical log of the subterranean well. | 12-18-2014 |
20150050741 | TRANSPORTERS OF OIL SENSORS FOR DOWNHOLE HYDROCARBON DETECTION - Various embodiments of the present disclosure pertain to nanocomposites for detecting hydrocarbons in a geological structure. In some embodiments, the nanocomposites include: a core particle; a polymer associated with the core particle; a sulfur-based moiety associated with the polymer; and a releasable probe molecule associated with the core particle, where the releasable probe molecule is releasable from the core particle upon exposure to hydrocarbons. Additional embodiments of the present disclosure pertain to methods of detecting hydrocarbons in a geological structure by utilizing the nanocomposites of the present disclosure. | 02-19-2015 |
20150057417 | SOLVENT-BASED METHODS FOR PRODUCTION OF GRAPHENE NANORIBBONS - The present invention provides methods of preparing functionalized graphene nanoribbons. Such methods include: (1) exposing a plurality of carbon nanotubes (CNTs) to an alkali metal source in the presence of an aprotic solvent to open them; and (2) exposing the opened CNTs to an electrophile to form functionalized graphene nanoribbons (GNRs). The methods may also include a step of exposing the opened CNTs to a protic solvent to quench any reactive species on them. Additional methods include preparing unfunctionalized GNRs by: (1) exposing a plurality of CNTs to an alkali metal source in the presence of an aprotic solvent to open them; and (2) exposing the opened CNTs to a protic solvent to form unfunctionalized GNRs. | 02-26-2015 |
20150108391 | SYNTHESIS OF MAGNETIC CARBON NANORIBBONS AND MAGNETIC FUNCTIONALIZED CARBON NANORIBBONS - Various embodiments of the present disclosure pertain to methods of making magnetic carbon nanoribbons. Such methods generally include: (1) forming carbon nanoribbons by splitting carbon nanomaterials; and (2) associating graphene nanoribbons with magnetic materials, precursors of magnetic materials, or combinations thereof. Further embodiments of the present disclosure also include a step of reducing the precursors of magnetic materials to magnetic materials. In various embodiments, the associating occurs before, during or after the splitting of the carbon nanomaterials. In some embodiments, the methods of the present disclosure further comprise a step of (3) functionalizing the carbon nanoribbons with functionalizing agents. In more specific embodiments, the functionalizing occurs in situ during the splitting of carbon nanomaterials. In further embodiments, the carbon nanoribbons are edge-functionalized. Additional embodiments of the present disclosure pertain to magnetic carbon nanoribbon compositions that were formed in accordance with the methods of the present disclosure. | 04-23-2015 |
20150153472 | Detecting Hydrocarbons in a Geological Structure - Magnetic nanoparticles are utilized for magnetically detecting hydrocarbons in a geological structure. The magnetic nanoparticles generally include a core particle and a temperature responsive polymer associated with the core particle. The temperature responsive polymer may include polyacrylamides, polyethylene glycols, or combinations thereof. The temperature responsive polymer facilitates an agglomeration of the nanoparticles in a fluid at an organic/aqueous interface of the fluid, an organic phase of the fluid, or combinations thereof. The agglomeration may occur at a specific temperature or temperature range. | 06-04-2015 |
Patent application number | Description | Published |
20090075654 | Common Communication Terminal Architecture and Method - A common communication terminal system and method of converging mobile cellular communications, wireless access systems, wireless local area network and wireline communications into one Open Wireless Architecture (OWA) platform supporting cost-effective and spectrum-efficient broadband services across wireless and wired communication environment in one single terminal device with one unified telephone number for office, home and mobile communications. | 03-19-2009 |
20110176528 | OPEN WIRELESS ARCHITECTURE (OWA) MOBILE CLOUD INFRASTRUCTURE AND METHOD - A future mobile terminal converging multiple wireless transmission technologies by utilizing a cost-effective and spectrum-efficient mobile cloud solution by introducing the Virtual Mobile Server (VMS) and Virtual Register and Call Switch (VR/CS) systems and methods based on the innovative open wireless architecture (OWA) technology platform. | 07-21-2011 |
20120002639 | OPEN WIRELESS ARCHITECTURE (OWA) UNIFIED AIRBORNE AND TERRESTRIAL COMMUNICATIONS ARCHITECTURE - This invention relates to an Open Wireless Architecture (OWA) unified airborne and terrestrial communications architecture providing optimal high-speed connections with open radio transmission technologies (RTTs) between aircrafts and ground cells, and between different aircrafts in Ad-Hoc or Mesh network group, to construct the multi-dimensional unified information delivery platform across the airborne networks and the terrestrial networks wherein the same OWA mobile device or OWA mobile computer can be used seamlessly and continuously both in the aircrafts and on the ground. | 01-05-2012 |
20120224694 | CLASSIFIED RELATION NETWORKING OPTIMIZATION PLATFORM IN OPEN WIRELESS ARCHITECTURE (OWA) MOBILE CLOUD TERMINAL DEVICE - A fully user-centric mobile relation networking management of business networking, personal networking and social networking for mobile terminal device with networking services adaptively and intelligently optimized by converged wireless connections based on open wireless architecture (OWA) mobile cloud infrastructure with QoW (Quality of Wireless connection) control through OWA Operating System (OS) to enable highly secured relation networking for mobile business and personal networking users. | 09-06-2012 |
20120250669 | OPEN WIRELESS ARCHITECTURE (OWA) MOBILE CLOUD INFRASTRUCTURE AND METHOD - A future mobile terminal converging multiple wireless transmission technologies by utilizing a cost-effective and spectrum-efficient mobile cloud solution by introducing the Virtual Mobile Server (VMS) and Virtual Register and Call Switch (VR/CS) systems and methods based on the innovative open wireless architecture (OWA) technology platform. | 10-04-2012 |
20120287819 | MOBILE CLOUD ARCHITECTURE BASED ON OPEN WIRELESS ARCHITECTURE (OWA) PLATFORM - A simplified future mobile terminal system converging multiple wireless transmission technologies by utilizing a cost-effective and spectrum-efficient mobile cloud solution based on the innovative virtual mobile server system of the open wireless architecture (OWA) platform. | 11-15-2012 |
20120296963 | OPEN WIRELESS ARCHITECTURE (OWA) MOBILE CLOUD INFRASTRUCTURE AND METHOD - A future mobile terminal converging multiple wireless transmission technologies by utilizing a cost-effective and spectrum-efficient mobile cloud solution by introducing Virtual Mobile Server (VMS) and Virtual Register and Call Switch (VR/CS) systems and methods based on the innovative open wireless architecture (OWA) technology platform, and the mobile terminal extended to other mobile cloud clients including computer terminal and television terminal fully synchronized through the VMS. | 11-22-2012 |
20130135029 | ARCHITECTURE OF FUTURE OPEN WIRELESS ARCHITECTURE (OWA) RADIO SYSTEM - This invention relates to an open wireless architecture (OWA) radio frequency (RF) transceiver architecture including RF front-end system. Specifically, the invention relates to an OWA RF front-end utilizing non-broadband RF hardware to support wide range frequency bands and broad transmission bandwidth for future wireless communications. | 05-30-2013 |
20140029571 | OPEN WIRELESS ARCHITECTURE (OWA) UNIFIED AIRBORNE AND TERRESTRIAL COMMUNICATIONS ARCHITECTURE - This invention relates to an Open Wireless Architecture (OWA) unified airborne and terrestrial communications architecture providing optimal high-speed connections with open radio transmission technologies (RTTs) between aircrafts and ground cells, and between different aircrafts in Ad-Hoc or Mesh network group, to construct the multi-dimensional unified information delivery platform across the airborne networks and the terrestrial networks wherein the same OWA mobile device or OWA mobile computer can be used seamlessly and continuously both in the aircrafts and on the ground. | 01-30-2014 |
20150229713 | OPEN WIRELESS ARCHITECTURE (OWA) MOBILE CLOUD INFRASTRUCTURE AND METHOD - An advanced mobile terminal converging multiple wireless transmission technologies by utilizing a cost-effective and spectrum-efficient mobile cloud solution by introducing Virtual Mobile Server (VMS) and Virtual Register and Call Switch (VR/CS) systems and methods based on the innovative open wireless architecture (OWA) technology platform, and the mobile terminal shared with other mobile cloud clients including computer terminal and television terminal fully synchronized through the VMS for the integrated smart home and smart office platform for the enterprise mobility solutions between home and enterprise. | 08-13-2015 |
20150235329 | CLASSIFIED RELATION NETWORKING OPTIMIZATION PLATFORM IN OPEN WIRELESS ARCHITECTURE (OWA) MOBILE CLOUD TERMINAL DEVICE - A fully user-centric mobile relation networking management of business networking, personal networking and social networking for mobile terminal device with networking services adaptively and intelligently optimized by converged wireless connections based on open wireless architecture (OWA) mobile cloud infrastructure with QoW (Quality of Wireless connection) control through OWA Operating System (OS) to enable highly secured relation networking for mobile business and personal networking users. | 08-20-2015 |
20150264544 | CLASSIFIED RELATION NETWORKING OPTIMIZATION PLATFORM IN OPEN WIRELESS ARCHITECTURE (OWA) MOBILE CLOUD TERMINAL DEVICE - A fully user-centric mobile relation networking management of business social networking, personal social networking and general social networking for mobile terminal device with networking services adaptively and intelligently optimized by converged wireless connections based on open wireless architecture (OWA) mobile cloud infrastructure with QoW (Quality of Wireless connection) control through OWA Operating System (OS) to enable highly secured relation networking for mobile business and personal networking users by innovative social friendship scoring method. | 09-17-2015 |
Patent application number | Description | Published |
20130333161 | HINGE ADJUSTER - A hinge adjuster includes a first frame, at least one locking piece, at least one spring component, at least one second frame and a pair of cover. The first frame defines at least one locking hole including a first accommodating hole and a second accommodating hole. The locking piece is slidably placed in the first accommodating hole for engaging with the first accommodating hole or the engaging notch alternatively. At least one groove for engaging with the locking piece is configured on a pivoted portion of the second frame, which includes a flat portion, a dentiform portion, and an end portion. And the locking piece is protruded from the locking hole and contacting with the flat portion, the dentiform portion or the end portion selectively. The hinge adjuster has strong supporting capability and can achieve a cyclic adjustment of angles, and the operation is simple and convenient. | 12-19-2013 |
20150196122 | BACKREST TRANSLATION MECHANISM - A backrest translation mechanism includes a holder mounted on a sofa seat, a swing locating member, a backrest mount, a slider, and a positioning pin. The swing locating member has a first end pivoted on the holder, several locking slots with downward openings arranged at regular intervals along its length direction. The locking slots are adapted for engaging with and unidirectionally locked up the positioning pin, one side of each locking slots is provided with an inclined surface inclined towards an opposite direction of the first end. The slider is slidably set on the swing locating member and has a retaining slot and a limiting slot. The positioning pin is accepted by the retaining slot and the locking slot jointly, and the positioning pin is restricted to be out of the locking slot by the retaining slot. The mechanism has multiple using positions for adjusting the translation of the backrest. | 07-16-2015 |
20160040464 | HINGE - A hinge includes a first frame, a second frame, a bolt, a gear, an adjusting nut, a spring component, a shield, and an engaging component, the first frame has two first clamping portions for clamping the gear, the second frame has two second clamping portions for clamping the two first clamping portions, the adjusting nut is screwed on the bolt and provides clamping force, an accommodating cavity is opened in the second frame, the engaging component is configured therein and engages with the gear, the engaging component disengages from the gear when a first sidewall thereof presses against a sidewall of the accommodating cavity, the gear is prevented from rotating when a second sidewall of the engaging component presses against another sidewall of the accommodating cavity, the spring component is configured between the second frame and the engaging component, and the shield shields the gear. | 02-11-2016 |
20160088945 | ELECTRIC SUPPORT SYSTEM FOR HEADREST - An electric support system for headrest includes first sliders connected with and slid on each other, first and second fasteners, and first to fourth connecting rods; the first and second sliders are respectively fixed to the first fastener and the first connecting rod, an upper end of the first connecting rod and one end of the second connecting rod are respectively connected to the second fastener, one end of the third connecting rod is connected to the first connecting rod, the other end of the third connecting rod is pivotally connected to one end of the fourth connecting rod, the other end of the fourth connecting rod is pivotally connected to the first slider, the other end of the second connecting rod is pivotally connected to the third connecting rod between the two ends thereof, and a linear drive device having an output shaft for driving the first connecting rod. | 03-31-2016 |
Patent application number | Description | Published |
20140115504 | METHOD AND APPARATUS FOR CONFIGURING PARAMETERS UNDER BS ARCHITECTURE - A method and an apparatus for configuring parameters under Browser and Server (BS) architecture are provided. The method includes: receiving a selection input which selects a source object of a first frame, in a browser window where the first frame and a second frame are displayed; generating an avatar effect entity in the second frame based on the selection input, wherein the avatar effect entity carries information of the source object; and establishing an association between a target object and the information of the source object carried by the avatar effect entity, when the avatar effect entity is moved to a position corresponding to the target object in the second frame. Based on the solution, the parameters may be configured during the cross-frame dragging under the BS architecture, thereby simplifying the user's operation steps. The operations are intuitive and natural, thereby meeting the user mental model. | 04-24-2014 |
20150098325 | CONGESTION STATE REPORTING METHOD AND ACCESS NETWORK DEVICE - A congestion state reporting method and an access network device are provided by the present invention. The method comprises: obtaining, by an access network device, an identifier of a gateway device corresponding to bearers, and reporting to the gateway device congestion state information of a cell covered by the access network device via part of bearers from the bearers corresponding to the identifier. The method mentioned above can avoid the problem in the prior art that the congestion state is further aggravated, so that the gateway device can process the problem of cell congestion more rapidly, and can reduce the processing complexity of the gateway device in the prior art. | 04-09-2015 |
20150156661 | CONGESTION PROCESSING METHOD, APPARATUS, AND CORE NETWORK - The present invention provides a congestion processing method, apparatus, and system. The method comprises: in a process of a UE performing handover from a source cell, in a congestion status, of a source access network element to a target cell, in a normal status, of a target access network element, receiving second indication information sent by a second access network element, wherein the second indication information is used for indicating a status of a second cell; sending notification information to a network side according to the indication message, wherein the notification information is used for notifying the network side to restore a status of the UE from a congestion and controlled status to a normal status. In the present invention, determining how to notify the network side and notifying the network side timely to restore the status of the UE to the normal status are realized. | 06-04-2015 |
20160044508 | METHOD FOR PROVIDING APPLICATION SERVICE - A method for providing application service is provided. The method discloses that a user is authenticated according to a received application service acquisition request from a user mobile phone, and when the user authentication is passed, the application service acquisition request is sent to an application server, so that the application server provides an application service to the user mobile phone according to the application service acquisition request. The application server does not need to authenticate the user mobile phone by performing an authentication operation on the user mobile phone through a wireless application protocol gateway, thus being capable of reducing the workload of the application server. | 02-11-2016 |