Patent application number | Description | Published |
20080299775 | GAPFILL EXTENSION OF HDP-CVD INTEGRATED PROCESS MODULATION SIO2 PROCESS - Methods are disclosed for depositing a silicon oxide film on a substrate disposed in a substrate processing chamber. The substrate has a gap formed between adjacent raised surfaces. A silicon-containing gas, an oxygen-containing gas, and a fluent gas are flowed into the substrate processing chamber. A high-density plasma is formed from the silicon-containing gas, the oxygen-containing gas, and the fluent gas. A first portion of the silicon oxide film is deposited using the high-density plasma at a deposition rate between 900 and 6000 Å/min and with a deposition/sputter ratio greater than 30. The deposition/sputter ratio is defined as a ratio of a net deposition rate and a blanket sputtering rate to the blanket sputtering rate. Thereafter, a portion of the deposited first portion of the silicon oxide film is etched. A second portion of the silicon oxide film is deposited over the etched portion of the silicon oxide film. | 12-04-2008 |
20090068853 | IMPURITY CONTROL IN HDP-CVD DEP/ETCH/DEP PROCESSES - Methods are disclosed of depositing a silicon oxide film on a substrate disposed in a substrate processing chamber. The substrate has a gap formed between adjacent raised surfaces. A first portion of the silicon oxide film is deposited over the substrate and within the gap using a high-density plasma process. Thereafter, a portion of the deposited first portion of the silicon oxide film is etched back. This includes flowing a halogen precursor through a first conduit from a halogen-precursor source to the substrate processing chamber, forming a high-density plasma from the halogen precursor, and terminating flowing the halogen precursor after the portion has been etched back. Thereafter, a halogen scavenger is flowed to the substrate processing chamber to react with residual halogen in the substrate processing chamber. Thereafter, a second portion of the silicon oxide film is deposited over the first portion of the silicon oxide film and within the gap using a high-density plasma process. | 03-12-2009 |
20090075489 | REDUCTION OF ETCH-RATE DRIFT IN HDP PROCESSES - A processing chamber is seasoned by providing a flow of season precursors to the processing chamber. A high-density plasma is formed from the season precursors by applying at least 7500 W of source power distributed with greater than 70% of the source power at a top of the processing chamber. A season layer having a thickness of at least 5000 Å is deposited at one point using the high-density plasma. Each of multiple substrates is transferred sequentially into the processing chamber to perform a process that includes etching. The processing chamber is cleaned between sequential transfers of the substrates. | 03-19-2009 |
Patent application number | Description | Published |
20090300392 | HIGH SPEED NETWORK INTERFACE WITH AUTOMATIC POWER MANAGEMENT WITH AUTO-NEGOTIATION - A computer system comprises host processor and a network interface, wherein the host processor includes resources supporting a full power mode, a lower power mode and a power down mode, as seen in standard system bus specifications such as PCI and InfiniBand. The network interface includes a medium interface unit coupled to network media supporting a least high speed protocol, such as a Gigabit Ethernet or high-speed InfiniBand, and a lower speed protocol, such as one of 10 Mb and 100 Mb Ethernet or a lower speed InfiniBand. Power management circuitry forces the medium interface unit to the lower speed protocol in response to an event signaling entry of the lower power mode. In the lower power mode, the network interface consumes less than the specified power when executing the lower speed protocol, and consumes greater than the specified power when executing the high speed protocol. Logic in the network interface operates in the lower power mode, and uses the lower speed protocol to detect a pattern in incoming packets. In response to the detection of said pattern, the logic issues a reset signal to the host processor. Thus, the network interface operates as a wake-up device in the lower power mode, using the lower speed protocol. | 12-03-2009 |
20120089853 | HIGH SPEED NETWORK INTERFACE WITH AUTOMATIC POWER MANAGEMENT WITH AUTO-NEGOTIATION - A power management circuit for managing power of a network interface is provided. The network interface includes a medium interface unit coupled to a network media supporting at least a high speed protocol and a lower speed protocol. The power management logic includes logic to determine that an event signalling entry of the medium interface unit into the lower speed protocol has occurred; and logic to force the medium interface unit into the lower speed protocol in response to a determination that the event has occurred. | 04-12-2012 |
Patent application number | Description | Published |
20100172504 | METHOD AND APPARATUS FOR CRYPTOGRAPHIC KEY STORAGE WHEREIN KEY SERVERS ARE AUTHENTICATED BY POSSESSION AND SECURE DISTRIBUTION OF STORED KEYS - A key management system includes secured data stored on a first system secured by a control key stored securely on a key server. The secured data is secured against attacks such as unauthorized use, modification or access, where authorization to access the secured data is determined by knowledge of an access private key of an access key pair. When an authorized user is to access the secured data, the first system generates a request to the key server, signed with the access private key, wherein the request is for a decryption control key and the request includes a one-time public key of a key pair generated by the first system for the request. The first system can decrypt the decryption control key from the response, using a one-time private key. The first system can then decrypt the secured data with the decryption control key remaining secured in transport. | 07-08-2010 |
20130046985 | Method and Apparatus for Cryptographic Key Storage Wherein Key Servers are Authenticated by Possession and Secure Distribution of Stored Keys - A key management system includes secured data stored on a first system secured by a control key stored securely on a key server. The secured data is secured against attacks such as unauthorized use, modification or access, where authorization to access the secured data is determined by knowledge of an access private key of an access key pair. When an authorized user is to access the secured data, the first system generates a request to the key server, signed with the access private key, wherein the request is for a decryption control key and the request includes a one-time public key of a key pair generated by the first system for the request. The first system can decrypt the decryption control key from the response, using a one-time private key. The first system can then decrypt the secured data with the decryption control key remaining secured in transport. | 02-21-2013 |
20130301691 | On-Chip Interferers for Standards Compliant Jitter Tolerance Testing - Systems and methods that facilitate on-chip testing are provided. An integrated circuit can include a transmitter configured to transmit a communications signal via a communications channel. The integrated circuit can also include a receiver configured to receive the communications signal via the communications channel. A jitter creation module also can form part of the integrated circuit and can introduce jitter into the system thereby allowing for on-chip jitter testing. The jitter creation module can form either part of the transmitter or receiver and can introduce the jitter by phase interpolation. | 11-14-2013 |
20140308046 | Compensation for Optical Multi-Path Interference - Systems and methods for optical multi-path interference (MPI) compensation are provided. In an embodiment, a mean MPI signal representing a mean amplitude of the MPI in an input signal is generated and subtracted from a first estimate of transmitted amplitude of the input signal to generate a mean MPI compensated estimate of transmitted amplitude. The mean MPI compensated estimate of transmitted amplitude is sliced to generate a decision of transmitted amplitude of the input signal. The mean MPI signal can be generated using a mean MPI feedback loop or using an iterative feed-forward process. In another embodiment, mean MPI levels corresponding to respective transmitted intensity levels are generated and used to control slice levels of a slicer in order to compensate for MPI. | 10-16-2014 |
20140321864 | Linearization of Optical Intensity Modulation Systems - Embodiments for improving the Signal to Noise and Distortion (SINAD) ratio in Pulse Amplitude Modulation (PAM)-M optical intensity modulation systems, to enable higher data rate communications, are provided. Embodiments can be used to improve the linearity and reduce the distortion of electrical and electro-optics components (including optical modulators) in optical intensity modulation systems. Embodiments are well suited for use with PAM-M optical intensity modulators, such as segmented Vertical Cavity Surface Emitting Laser (WSEL) and segmented Mach-Zehnder Modulator (MZM), for example. | 10-30-2014 |
20150070198 | Flexible ADC Calibration Technique Using ADC Capture Memory - Systems and methods are provided for calibrating an analog to digital converter (ADC) using one or more feedback mechanisms. In an embodiment, a capture memory module captures a portion of ADC data and post-processes the captured data using a microprocessor to perform calibration. Using the microprocessor, the capture memory module calibrates the ADC until the output of the ADC is within a desired range. In an embodiment, the capture memory module also captures a portion of data output from a digital correction module and post-processes this captured data using the microprocessor. Using the microprocessor, the capture memory module calibrates the digital correction module until the output of the digital correction module is within a desired range | 03-12-2015 |
Patent application number | Description | Published |
20100188027 | TRAVELING WAVE LINEAR ACCELERATOR COMPRISING A FREQUENCY CONTROLLER FOR INTERLEAVED MULTI-ENERGY OPERATION - An electromagnetic wave having a phase velocity and an amplitude is provided by an electromagnetic wave source to a traveling wave linear accelerator. The traveling wave linear accelerator generates a first output of electrons having a first energy by accelerating an electron beam using the electromagnetic wave. The first output of electrons can be contacted with a target to provide a first beam of x-rays. The electromagnetic wave can be modified by adjusting its amplitude and the phase velocity. The traveling wave linear accelerator then generates a second output of electrons having a second energy by accelerating an electron beam using the modified electromagnetic wave. The second output of electrons can be contacted with a target to provide a second beam of x-rays. A frequency controller can monitor the phase shift of the electromagnetic wave from the input to the output ends of the accelerator and can correct the phase shift of the electromagnetic wave based on the measured phase shift. | 07-29-2010 |
20110006708 | INTERLEAVING MULTI-ENERGY X-RAY ENERGY OPERATION OF A STANDING WAVE LINEAR ACCELERATOR USING ELECTRONIC SWITCHES - The disclosure relates to systems and methods for fast-switching operating of a standing wave linear accelerator (LINAC) for use in generating x-rays of at least two different energy ranges with advantageously low heating of electronic switches. In certain embodiments, the heating of electronic switches during a fast-switching operation of the LINAC can be kept advantageously low through the controlled, timed activation of multiple electronic switches located in respective side cavities of the standing wave LINAC, or through the use of a modified a side cavity that includes an electronic switch. | 01-13-2011 |
20110216886 | Interleaving Multi-Energy X-Ray Energy Operation Of A Standing Wave Linear Accelerator - The disclosure relates to systems and methods for interleaving operation of a standing wave linear accelerator (LINAC) for use in providing electrons of at least two different energy ranges, which can be contacted with x-ray targets to generate x-rays of at least two different energy ranges. The LINAC can be operated to output electrons at different energies by varying the power of the electromagnetic wave input to the LINAC, or by using a detunable side cavity which includes an activatable window. | 09-08-2011 |
20120081041 | TRAVELING WAVE LINEAR ACCELERATOR BASED X-RAY SOURCE USING PULSE WIDTH TO MODULATE PULSE-TO-PULSE DOSAGE - Provided herein are systems and methods for operating a traveling wave linear accelerator to generate stable electron beams at two or more different intensities by varying the number of electrons injected into the accelerator structure during each pulse by varying the width of the beam pulse, i.e., pulse width. | 04-05-2012 |
20120081042 | TRAVELING WAVE LINEAR ACCELERATOR BASED X-RAY SOURCE USING CURRENT TO MODULATE PULSE-TO-PULSE DOSAGE - Provided herein are systems and methods for operating a traveling wave linear accelerator to generate stable electron beams at two or more different intensities by varying the number of electrons injected into the accelerator structure during each pulse by varying the electron beam current applied to an electron gun. | 04-05-2012 |
20120294422 | SYSTEMS AND METHODS FOR CARGO SCANNING AND RADIOTHERAPY USING A TRAVELING WAVE LINEAR ACCELERATOR BASED X-RAY SOURCE USING CURRENT TO MODULATE PULSE-TO-PULSE DOSAGE - Provided herein are systems and methods for operating a traveling wave linear accelerator to generate stable electron beams at two or more different intensities by varying the number of electrons injected into the accelerator structure during each pulse by varying the electron beam current applied to an electron gun. The electron beams may be used to generate x-rays having selected doses and energies, which may be used for cargo scanning or radiotherapy applications. | 11-22-2012 |
20120294423 | SYSTEMS AND METHODS FOR CARGO SCANNING AND RADIOTHERAPY USING A TRAVELING WAVE LINEAR ACCELERATOR BASED X-RAY SOURCE USING PULSE WIDTH TO MODULATE PULSE-TO-PULSE DOSAGE - Provided herein are systems and methods for operating a traveling wave linear accelerator to generate stable electron beams at two or more different intensities by varying the number of electrons injected into the accelerator structure during each pulse by varying the width of the beam pulse, i.e., pulse width. The electron beams may be used to generate x-rays having selected doses and energies, which may be used for cargo scanning or radiotherapy applications. | 11-22-2012 |
20120313555 | INTERLEAVING MULTI-ENERGY X-RAY ENERGY OPERATION OF A STANDING WAVE LINEAR ACCELERATOR USING ELECTRONIC SWITCHES - The disclosure relates to systems and methods for fast-switching operating of a standing wave linear accelerator (LINAC) for use in generating x-rays of at least two different energy ranges with advantageously low heating of electronic switches. In certain embodiments, the heating of electronic switches during a fast-switching operation of the LINAC can be kept advantageously low through the controlled, timed activation of multiple electronic switches located in respective side cavities of the standing wave LINAC, or through the use of a modified a side cavity that includes an electronic switch. | 12-13-2012 |
20130016814 | TRAVELING WAVE LINEAR ACCELERATOR COMPRISING A FREQUENCY CONTROLLER FOR INTERLEAVED MULTI-ENERGY OPERATION - An electromagnetic wave having a phase velocity and an amplitude is provided by an electromagnetic wave source to a traveling wave linear accelerator. The traveling wave linear accelerator generates a first output of electrons having a first energy by accelerating an electron beam using the electromagnetic wave. The first output of electrons can be contacted with a target to provide a first beam of x-rays. The electromagnetic wave can be modified by adjusting its amplitude and the phase velocity. The traveling wave linear accelerator then generates a second output of electrons having a second energy by accelerating an electron beam using the modified electromagnetic wave. The second output of electrons can be contacted with a target to provide a second beam of x-rays. A frequency controller can monitor the phase shift of the electromagnetic wave from the input to the output ends of the accelerator and can correct the phase shift of the electromagnetic wave based on the measured phase shift. | 01-17-2013 |
20130063052 | INTERLEAVING MULTI-ENERGY X-RAY ENERGY OPERATION OF A STANDING WAVE LINEAR ACCELERATOR - The disclosure relates to systems and methods for interleaving operation of a standing wave linear accelerator (LINAC) for use in providing electrons of at least two different energy ranges, which can be contacted with x-ray targets to generate x-rays of at least two different energy ranges. The LINAC can be operated to output electrons at different energies by varying the power of the electromagnetic wave input to the LINAC, or by using a detunable side cavity which includes an activatable window. | 03-14-2013 |
Patent application number | Description | Published |
20080276143 | Method and apparatus for broadcasting scan patterns in a random access based integrated circuit - A broadcaster, system, and method for reducing test data volume and test application time in an ATE (automatic test equipment) in a scan-based integrated circuit. The scan-based integrated circuit contains multiple scan chains, each scan chain comprising multiple scan cells coupled in series. The broadcaster is a combinational logic network coupled to an optional virtual scan controller and an optional scan connector. The virtual scan controller controls the operation of the broadcaster. The system transmits virtual scan patterns stored in the ATE and generates broadcast scan patterns through the broadcaster for testing manufacturing faults in the scan-based integrated circuit. The number of scan chains that can be supported by the ATE is significantly increased. Methods are further proposed to reorder scan cells in selected scan chains, to generate the broadcast scan patterns and virtual scan patterns, and to synthesize the broadcaster and a compactor in the scan-based integrated circuit. | 11-06-2008 |
20090132880 | Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test - A method and apparatus for providing ordered capture clocks to detect or locate faults within N clock domains and faults crossing any two clock domains in an integrated circuit or circuit assembly in self-test or scan-test mode, where N>1 and each domain has a plurality of scan cells. The method and apparatus allows generating and loading N pseudorandom or predetermined stimuli to all the scan cells within the N clock domains in the integrated circuit or circuit assembly during the shift operation, applying an ordered sequence of capture clocks to all the scan cells within the N clock domains during the capture operation, compacting or comparing N output responses of all the scan cells for analysis during the compact/compare operation, and repeating the above process until a predetermined limiting criteria is reached. A computer-aided design (CAD) system is further developed to realize the method and synthesize the apparatus. | 05-21-2009 |
20100218062 | Method and Apparatus for Unifying Self-Test with Scan-Test During Prototype Debug and Production Test - A method and apparatus for testing or diagnosing faults in a scan-based integrated circuit using a unified self-test and scan-test technique. The method and apparatus comprises using a unified test controller to ease prototype debug and production test. The unified test controller further comprises using a capture clock generator and a plurality of domain clock generators each embedded in a clock domain to perform self-test or scan-test. The capture clocks generated by the capture clock generator are used to guide at-speed or reduced-speed self-test (or scan-test) within each clock domain. The frequency of these capture clocks can be totally unrelated to those of system clocks controlling the clock domains. This unified approach allows designers to test or diagnose stuck-type and non-stuck-type faults with a low-cost DFT (design-for-test) tester or a low-cost DFT debugger. A computer-aided design (CAD) method is further developed to realize the method and synthesize the apparatus. | 08-26-2010 |
20110197171 | COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER-TRANSFER LEVEL - A method and system to automate scan synthesis at register-transfer level (RTL). The method and system will produce scan HDL code modeled at RTL for an integrated circuit modeled at RTL. The method and system comprise computer-implemented steps of performing RTL testability analysis, clock-domain minimization, scan selection, test point selection, scan repair and test point insertion, scan replacement and scan stitching, scan extraction, interactive scan debug, interactive scan repair, and flush/random test bench generation. In addition, the present invention further comprises a method and system for hierarchical scan synthesis by performing scan synthesis module-by-module and then stitching these scanned modules together at top-level. The present invention further comprises integrating and verifying the scan HDL code with other design-for-test (DFT) HDL code, including boundary-scan and logic BIST (built-in self-test). | 08-11-2011 |
20120246604 | COMPUTER-AIDED DESIGN SYSTEM TO AUTOMATE SCAN SYNTHESIS AT REGISTER-TRANSFER LEVEL - A method and system to automate scan synthesis at register-transfer level (RTL). The method and system will produce scan HDL code modeled at RTL for an integrated circuit modeled at RTL. The method and system comprise computer-implemented steps of performing RTL testability analysis, clock-domain minimization, scan selection, test point selection, scan repair and test point insertion, scan replacement and scan stitching, scan extraction, interactive scan debug, interactive scan repair, and flush/random test bench generation. In addition, the present invention further comprises a method and system for hierarchical scan synthesis by performing scan synthesis module-by-module and then stitching these scanned modules together at top-level. The present invention further comprises integrating and verifying the scan HDL code with other design-for-test (DFT) HDL code, including boundary-scan and logic BIST (built-in self-test). | 09-27-2012 |
20120331361 | METHOD AND APPARATUS FOR BROADCASTING SCAN PATTERNS IN A SCAN-BASED INTEGRATED CIRCUIT - A broadcaster, system, and method for reducing test data volume and test application time in an ATE (automatic test equipment) in a scan-based integrated circuit. The scan-based integrated circuit contains multiple scan chains, each scan chain comprising multiple scan cells coupled in series. The broadcaster is a combinational logic network coupled to an optional virtual scan controller and an optional scan connector. The virtual scan controller controls the operation of the broadcaster. The system transmits virtual scan patterns stored in the ATE and generates broadcast scan patterns through the broadcaster for testing manufacturing faults in the scan-based integrated circuit. The number of scan chains that can be supported by the ATE is significantly increased. Methods are further proposed to reorder scan cells in selected scan chains, to generate the broadcast scan patterns and virtual scan patterns, and to synthesize the broadcaster and a compactor in the scan-based integrated circuit. | 12-27-2012 |
Patent application number | Description | Published |
20090303660 | NANOPOROUS ELECTRODES AND RELATED DEVICES AND METHODS - High surface area electrodes formed using sol-gel derived monoliths as electrode substrates or electrode templates, and methods for making high surface area electrodes are described. The high surface area electrodes may have tunable pore sizes and well-controlled pore size distributions. The high surface area electrodes may be used as electrodes in a variety of energy storage devices and systems such as capacitors, electric double layer capacitors, batteries, and fuel cells. | 12-10-2009 |
20090305026 | NANOPOROUS MATERIALS AND RELATED METHODS - Nanoporous sol-gel derived monoliths and methods for making nanoporous sol-gel derived monoliths are provided. The methods enable fine control over pore size and pore size distribution, e.g., so that pore sizes can be predetermined and precisely tuned over a range from 0.3 nm to about 30 nm, or over a range from about 0.3 nm to about 10 nm. The monoliths may be derived from any suitable sol-gel, but in some instances they are derived from silica sol-gels. The sol-gel derived monoliths with finely tunable pore sizes and narrow pore size distributions may be used for a variety of applications, e.g., as substrates or templates for high surface area electrodes, as substrates for high surface area sensor, or as a component in a filtration apparatus. | 12-10-2009 |
20130288007 | METHODS AND APPARATUS FOR CASTING SOL-GEL WAFERS - A mold for casting sol-gel wafers is provided. The mold may be formed of multiple low-friction layers, for example, layers made of polytetrafluoroethylene (e.g., Teflon™). The layers may alternate between solid layers and well layers, with a gel formulation placed in wells of each well layer. A force may be applied to the layers during the gelling process to produce a solid, but wet and porous gel in the shape of the wells of the mold. The gel may be further processed to produce sol-gel derived monoliths having desired surface characteristics. | 10-31-2013 |
Patent application number | Description | Published |
20110243942 | RELAXIN-FUSION PROTEINS WITH EXTENDED IN VIVO HALF-LIVES - Disclosed are human relaxin-Fc fusion proteins having an increased serum half-life, polynucleotides encoding the same, and intermediates formed during the fusion protein biosynthesis. The fusion proteins may include a linker portion or other sections as well. Suitable fusion proteins are also those predicted to have the same effect as human relaxin in vivo, based, for example, on structural modeling. The fusion protein is useful in the treatment of a number of diseases and conditions, including heart disease, vascular disease, wound healing, fibrosis, fibromyalgia, and promoting angiogenesis. | 10-06-2011 |
20110243943 | TREATMENT USING RELAXIN-FUSION PROTEINS WITH EXTENDED IN VIVO HALF-LIVES - Disclosed are human relaxin-Fc fusion proteins having an increased serum half-life, polynucleotides encoding the same, and intermediates formed during the fusion protein biosynthesis. The fusion proteins may include a linker portion or other sections as well. Suitable fusion proteins are also those predicted to have the same effect as human relaxin in vivo, based, for example, on structural modeling. The fusion protein is useful in the treatment of a number of diseases and conditions, including heart disease, vascular disease, wound healing, fibrosis, fibromyalgia, and promoting angiogenesis. | 10-06-2011 |
20110245469 | INTERMEDIATES FORMED IN BIOSYNTHESIS OF RELAXIN-FUSION PROTEINS WITH EXTENDED IN VIVO HALF-LIVES - Disclosed are human relaxin-Fc fusion proteins having an increased serum half-life, polynucleotides encoding the same, and intermediates formed during the fusion protein biosynthesis. The fusion proteins may include a linker portion or other sections as well. Suitable fusion proteins are also those predicted to have the same effect as human relaxin in vivo, based, for example, on structural modeling. The fusion protein is useful in the treatment of a number of diseases and conditions, including heart disease, vascular disease, wound healing, fibrosis, fibromyalgia, and promoting angiogenesis. | 10-06-2011 |
20110250215 | STRUCTURALLY-RELATED RELAXIN-FUSION PROTEINS WITH EXTENDED IN VIVO HALF-LIVES - Disclosed are human relaxin-Fc fusion proteins having an increased serum half-life, polynucleotides encoding the same, and intermediates formed during the fusion protein biosynthesis. The fusion proteins may include a linker portion or other sections as well. Suitable fusion proteins are also those predicted to have the same effect as human relaxin in vivo, based, for example, on structural modeling. The fusion protein is useful in the treatment of a number of diseases and conditions, including heart disease, vascular disease, wound healing, fibrosis, fibromyalgia, and promoting angiogenesis. | 10-13-2011 |
Patent application number | Description | Published |
20080247752 | Eye safety in electro-optical transceivers - An electro-optical transceiver module having at least one parallel optical transmit lane and at least one parallel optical receiver lane, the module comprising optical receiver lane signal detection circuitry to detect a loss of signal on one or more of the receive lanes, and optical transmit lane control circuitry to control a optical transmit lane corresponding to the receive lane, on which a loss of signal was detected to transmit a signaling mode optical signal indicating the loss of signal on the receive lane. In a multiple lane parallel optic embodiment, and by signaling a loss of a signal on a per lane basis, a break or fault in a sub-set of fibers of a parallel optical link will not result in the entire parallel optic link being lost. | 10-09-2008 |
20110013905 | ACTIVE OPTICAL CABLE APPARATUS AND METHOD FOR DETECTING OPTICAL FIBER BREAKAGE - Embodiments of the invention include an active optical cable and method for controlling the operation of the active optical cable based on the detection of signal loss, e.g., due to fiber breakage, within the active optical cable. The active optical cable includes first and second optical transceivers, each with an open fiber control module coupled between the transmission side and the receiver side of the respective optical transceiver. The transmission side of each optical transceiver is coupled to the receiver side of the other optical transceiver via a plurality of transmission channels, such as a plurality of optical fibers. Each open fiber control module is configured to detect an optical power level of an optical signal received by the receiver side of the optical transceiver within which the open fiber control module resides and, based on such detection, control the operation of the corresponding transmission side of the optical transceiver. | 01-20-2011 |
20110268390 | ACTIVE OPTICAL CABLE THAT IS SUITED FOR CONSUMER APPLICATIONS AND A METHOD - An active optical cable is provided that is well suited for consumer applications. In contrast to known Quad Small Form-Factor Pluggable (QSFP) active optical cables, the active optical cable incorporates at least one consumer input/output (CIO) optical transceiver module that is well suited for consumer applications. The plug housing of the known QSFP active optical cable has been modified to house at least one CIO optical transceiver module that utilizes laser diode and photodiode singlets, rather than the parallel laser diode and photodiode arrays used in the known QSFP active optical cables. These features reduce the overall cost of the active optical cable and make it well suited for consumer applications. | 11-03-2011 |
20110293221 | CONSUMER INPUT/OUTPUT (CIO) OPTICAL TRANSCEIVER MODULE FOR USE IN AN ACTIVE OPTICAL CABLE, AN ACTIVE OPTICAL CABLE THAT INCORPORATES THE CIO OPTICAL TRANSCEIVER MODULE, AND A METHOD - A consumer input/output (CIO) optical transceiver module, an active optical cable that incorporates a CIO optical transceiver module, and a method for using a CIO optical transceiver module in an active optical cable are provided. In contrast to optical transceiver modules currently used in active optical cables, which utilize parallel arrays of laser diodes and parallel arrays of photodiodes, the CIO optical transceiver module includes two singlet laser diodes and two singlet photodiodes for providing two high-speed transmit channels and two high-speed receive channels, respectively. Because the singlet laser diodes and photodiodes of the CIO optical transceiver module are less costly than the parallel arrays of laser diodes and parallel arrays of photodiodes that are used in known active optical cables, the CIO optical transceiver module can be manufactured at relatively low costs with high quality, and therefore is well suited for consumer applications. | 12-01-2011 |
20130094807 | OPTICAL COUPLING SYSTEM FOR USE IN AN OPTICAL COMMUNICATIONS MODULE, AN OPTICAL COMMUNICATIONS MODULE THAT INCORPORATES THE OPTICAL COUPLING SYSTEM, AND A METHOD - An optical communications module is provided with an optical coupling system that includes a reflective and focusing (RAF) lens and an index-matching material that together allow air gaps along the optical pathway, which are typically associated with the use of refractive optical elements used in known optical communications modules, to be eliminated. Eliminating these air gaps allows Fresnel reflection along the optical pathway to be eliminated, or at least greatly reduced. Eliminating or reducing Fresnel reflection reduces insertion loss and optical crosstalk in the optical communications module. | 04-18-2013 |
Patent application number | Description | Published |
20090025751 | Method of removing contaminants from a coating surface comprising an oxide or fluoride of a group IIIB metal - Disclosed herein is a cleaning method useful in removing contaminants from a surface of a coating which comprises an oxide or fluoride of a Group III B metal. Typically the coating overlies an aluminum substrate which is present as part of a semiconductor processing apparatus. The coating typically comprises an oxide or a fluoride of Y, Sc, La, Ce, Eu, Dy, or the like, or yttrium-aluminum-garnet (YAG). The coating may further comprise about 20 volume % or less of Al | 01-29-2009 |
20110036874 | Solid yttrium oxide-containing substrate which has been cleaned to remove impurities - Disclosed herein is a gas distribution plate for use in a gas distribution assembly for a processing chamber, where the gas distribution plate is fabricated from a solid yttrium oxide-comprising substrate, which may also include aluminum oxide. The gas distribution plate includes a plurality of through-holes, which are typically crescent-shaped. Through-holes which have been formed in the solid yttrium oxide-comprising substrate by ultrasonic drilling perform particularly well. The solid yttrium oxide-comprising substrate typically comprises at least 99.9% yttrium oxide, and has a density of at least 4.92 g/cm | 02-17-2011 |
20120091095 | METHOD AND APPARATUS FOR REDUCING PARTICLE DEFECTS IN PLASMA ETCH CHAMBERS - In-situ low pressure chamber cleans and gas nozzle apparatus for plasma processing systems employing in-situ deposited chamber coatings. Certain chamber clean embodiments for conductor etch applications include an NF | 04-19-2012 |
20140154889 | DRY-ETCH FOR SELECTIVE TUNGSTEN REMOVAL - Methods of selectively etching tungsten relative to silicon-containing films (e.g. silicon oxide, silicon carbon nitride and (poly)silicon) as well as tungsten oxide are described. The methods include a remote plasma etch formed from a fluorine-containing precursor and/or hydrogen (H | 06-05-2014 |
20140256131 | SELECTIVE TITANIUM NITRIDE REMOVAL - Methods are described herein for selectively etching titanium nitride relative to dielectric films, which may include, for example, alternative metals and metal oxides lacking in titanium and/or silicon-containing films (e.g. silicon oxide, silicon carbon nitride and low-K dielectric films). The methods include a remote plasma etch formed from a chlorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the titanium nitride. The plasma effluents react with exposed surfaces and selectively remove titanium nitride while very slowly removing the other exposed materials. The substrate processing region may also contain a plasma to facilitate breaking through any titanium oxide layer present on the titanium nitride. The plasma in the substrate processing region may be gently biased relative to the substrate to enhance removal rate of the titanium oxide layer. | 09-11-2014 |
Patent application number | Description | Published |
20120150626 | System and Method for Automated Recommendation of Advertisement Targeting Attributes - A system and method for recommending targeting attributes for advertising campaigns are provided. The system and method comprise receiving at least one advertizing campaign, receiving historical targeting data and historical click-through data, selecting a machine learning model, and determining recommended targeting attributes for the advertising campaign using the machine learning model and the received data. The machine learning model may be a collaborative filtering model or a performance oriented model. The collaborative filtering model may rely on matrix factorization or Boltzmann Machines. The performance-oriented model may rely on a local regression. | 06-14-2012 |
20120158456 | Forecasting Ad Traffic Based on Business Metrics in Performance-based Display Advertising - A method, advertising network, and computer readable medium for forecasting ad traffic based on business metrics in performance-based display advertising. The method commences by defining a set of advertising campaign parameters, the advertising campaign parameters comprising target predicates, a campaign pricing model, and a campaign performance model. The method continues by forecasting a supply of impressions satisfying target predicates, based on a statistical analysis of a historical dataset containing impressions satisfying target predicates. Once a measure of forecasted supply is known, an auction model serves for calculating the likelihood of winning the forecasted impression at auction, based the campaign pricing model and the campaign performance model. Having a forecasted supply, and also an assessment of the likelihood of winning at auction, the method proceeds by determining values for various performance metrics. The performance metrics are displayed; the user makes changes to any one or more of the advertising campaign parameters. | 06-21-2012 |
20120284128 | ORDER-INDEPENDENT APPROXIMATION FOR ORDER-DEPENDENT LOGIC IN DISPLAY ADVERTISING - Methods, systems, and apparatuses for forecasting pricing for an advertisement campaign that covers a set of impressions. A dynamic cost per mille (dCPM) value is defined for the campaign. An effective bid price is determined for each of the impressions to generate a plurality of effective bid prices. A parametric distribution is determined based on the plurality of effective bid prices. A mean and a variance are determined for the determined parametric distribution. Bids for the impressions are determined based on the effective bid prices and a participation probability function. The bids are determined in a manner that is independent of an order in which the bids are processed. | 11-08-2012 |
Patent application number | Description | Published |
20090063710 | CAPABILITY-BASED CONTROL OF A COMPUTER PERIPHERAL DEVICE - In an embodiment, a computer-implemented method comprises sending, to a computer peripheral device, a request to obtain capabilities of the computer peripheral device; receiving a first capability description from the computer peripheral device, wherein the first capability description describes one or more capabilities, features or functions of the device at the time of the request; creating one or more graphical user interface (GUI) elements based upon the first capability description and causing displaying the GUI elements; receiving user input representing one or more selections of the GUI elements; creating job ticket data that describes a job for the computer peripheral device to perform, based on the GUI elements that were selected as represented in the user input; sending the job ticket data to the peripheral device; wherein the job ticket data describes one or more device settings that the computer peripheral device can transform to device commands. | 03-05-2009 |
20090063718 | AUTOMATICALLY GENERATING CAPABILITY-BASED COMPUTER PERIPHERAL DEVICE DRIVERS - In an embodiment, a data processing system comprises device driver generation logic that is encoded in one or more computer-readable storage media for execution and which when executed is operable to perform receiving a first capability description from a computer peripheral device, wherein the first capability description describes one or more capabilities of the computer peripheral device; receiving a generic device driver file; receiving configuration data; automatically generating a device driver for the computer peripheral device and for a computer operating system based on the first capability description, the generic device driver file and the configuration data; device job processing logic that is configured to receive a request to use the computer peripheral device, to request and receive current first capability description from the computer peripheral device at the time of the request, to generate based on the current first capability description and send to the computer peripheral device job ticket data that describes a job for the computer peripheral device to perform, and to provide job data formatted in a page description language to the computer peripheral device. | 03-05-2009 |
20090089802 | Method and Apparatus for Reduction of Event Notification Within a Web Service Application of a Multi-Functional Peripheral - Techniques are provided for reducing the amount of event notifications within a Web Service Application (WSA) of a device such as a multi-functional peripheral (MFP). In one technique, a Subscription ID is linked with a Job ID within a reduced notification table. When an event occurs related to a specific job, an event notification is sent only to the subscriber associated with that job. | 04-02-2009 |
20090094539 | CONTROLLING A COMPUTER PERIPHERAL DEVICE USING A UNIVERSAL DRIVER AND DEVICE-GENERATED USER INTERFACE INFORMATION - In an embodiment, a computer peripheral device driver comprises logic operable to perform sending, from a computer to a peripheral device, a request for a user interface of the peripheral device; receiving from the peripheral device a description of the user interface that the peripheral device has created in at a time of the request and based upon then-current capabilities of the peripheral device; creating one or more graphical user interface (GUI) elements based upon the description of the user interface and causing displaying the GUI elements; receiving user input representing one or more selections of the GUI elements; creating a user interface ticket that describes the GUI elements that were selected as represented in the user input; sending the user interface ticket to the peripheral device. | 04-09-2009 |
20100100832 | PROVIDING DEVICE DEFINED USER INTERFACE MODIFIERS TO A COMPUTER SYSTEM - In an embodiment, a computer-implemented process comprises, in a computer peripheral device that is configured to be coupled to a computer system, creating and storing one or more user interface modifiers that are defined by the device and configured to be used by the computer system to modify rendering of a user interface in the computer system; and providing the device defined user interface modifiers to the computer system. In an embodiment, the device defined user interface modifiers comprise one or more priority values for one or more features of the device; each of the one or more priority values is associated with an identifier of one of the features; and each of the priority values indicates a relative importance of the associated feature in comparison to other features. | 04-22-2010 |
20110037995 | METHODS AND SYSTEMS FOR PROVIDING DEVICE SPECIFIC PRINT OPTIONS TO REMOTE PRINTING SERVICES - Systems and methods are disclosed for enabling remote printing services to consistently obtain and utilize print capabilities of printing devices across a wide variety of connection topologies. A client device retrieves the print capabilities from one or more printing devices selected for printing a document. The document and the print capabilities are transmitted to a web print service for rending the document. The web print service generates a print job based on the document and the print capabilities of the printing device selected for printing the document. The web print service provides the print job to the selected printing device for subsequent printing. | 02-17-2011 |
20140139870 | METHODS AND SYSTEMS FOR PROVIDING DEVICE SPECIFIC PRINT OPTIONS TO REMOTE PRINTING SERVICES - Systems and methods are disclosed for enabling remote printing services to consistently obtain and utilize print capabilities of printing devices across a wide variety of connection topologies. A client device retrieves the print capabilities from one or more printing devices selected for printing a document. The document and the print capabilities are transmitted to a web print service for rending the document. The web print service generates a print job based on the document and the print capabilities of the printing device selected for printing the document. The web print service provides the print job to the selected printing device for subsequent printing. | 05-22-2014 |
Patent application number | Description | Published |
20090249139 | Unidirectional Error Code Transfer for Both Read and Write Data Transmitted via Bidirectional Data Link - A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition. | 10-01-2009 |
20090249156 | Unidirectional Error Code Transfer Method for a Bidirectional Data Link - A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition. | 10-01-2009 |
20100039875 | Strobe Acquisition and Tracking - A memory controller includes an interface to receive a data strobe signal and corresponding read data. The data strobe signal and the read data correspond to a read command issued by the memory controller, and the read data is received in accordance with the data strobe signal and an enable signal. A circuit in the memory controller is to dynamically adjust a timing offset between the enable signal and the data strobe signal, and control logic is to issue a supplemental read command if a time interval since a last read command issued by the memory controller exceeds a predetermined value. | 02-18-2010 |
20120240010 | Unidirectional Error Code Transfer for Both Read and Write Data Transmitted via Bidirectional Data Link - A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition. | 09-20-2012 |
20140140149 | Strobe Acquisition and Tracking - A memory controller includes an interface to receive a data strobe signal and corresponding read data. The data strobe signal and the read data correspond to a read command issued by the memory controller, and the read data is received in accordance with the data strobe signal and an enable signal. A circuit in the memory controller is to dynamically adjust a timing offset between the enable signal and the data strobe signal, and control logic is to issue a supplemental read command in accordance with a determination that a time interval since a last read command issued by the memory controller exceeds a predetermined value. | 05-22-2014 |
Patent application number | Description | Published |
20100073069 | On-Chip Bias Voltage Temperature Coefficient Self-Calibration Mechanism - Techniques and corresponding circuitry for deriving a supply a bias voltage for a memory cell array from a received reference voltage is presented. The circuit includes a voltage determination circuit, which is connected to receive the reference voltage and generate from it the bias voltage, a temperature sensing circuit, and a calibration circuit. The calibration circuit is connected to receive the bias voltage and to receive a temperature indication from the temperature sensing circuit and determine from the bias voltage and temperature indication a compensation factor that is supplied to the voltage determination circuit, which adjusts the bias voltage based upon the compensation factor. | 03-25-2010 |
20100074033 | Bandgap Voltage and Temperature Coefficient Trimming Algorithm - A circuit and corresponding method for providing a reference voltage are presented. The circuit includes a current source having a magnitude with positive temperature correlation connected to a node, and a diode element connected between the node and ground, where the reference voltage is provided from the node. The circuit also includes a variable resistance connected to receive an input indicative of the circuit temperature and through which the diode element is connected to the node. The value of the variable resistance is adjusted based upon the circuit temperature input. The circuit is useful for application as a peripheral circuitry, such as on a flash or other non-volatile memory and other circuits requiring an on-chip reference voltage source. | 03-25-2010 |
20110018617 | Charge Pump with Reduced Energy Consumption Through Charge Sharing and Clock Boosting Suitable for High Voltage Word Line in Flash Memories - A charge pump circuit for generating an output voltage is described. Charge pump circuits typically have two branches. As the clocks supplying the branches of a charge pump circuit alternate, the output of each branch will alternately provide an output voltage, which are then combined to form the pump output. The techniques described here allow charge to be transferred between the two branches, so that as the capacitor of one branch discharges, it is used to charge up the capacitor in the other branch. An exemplary embodiment using a voltage doubler-type of circuit, with the charge transfer between the branches accomplished using a switch controller by a boosted version of the clock signal, which is provided by a one-sided voltage doubler | 01-27-2011 |
20110273227 | Bandgap Voltage and Temperature Coefficient Trimming Algorithm - A circuit and corresponding method for providing a reference voltage are presented. The circuit includes a current source having a magnitude with positive temperature correlation connected to a node, and a diode element connected between the node and ground, where the reference voltage is provided from the node. The circuit also includes a variable resistance connected to receive an input indicative of the circuit temperature and through which the diode element is connected to the node. The value of the variable resistance is adjusted based upon the circuit temperature input. The circuit is useful for application as a peripheral circuitry, such as on a flash or other non-volatile memory and other circuits requiring an on-chip reference voltage source. | 11-10-2011 |