Patent application number | Description | Published |
20080258163 | Semiconductor light-emitting device with high light-extraction efficiency - The invention discloses a semiconductor light-emitting device and a fabricating method thereof. The semiconductor light-emitting device according to the invention includes a substrate, a multi-layer structure, a top-most layer, and at least one electrode. The multi-layer structure is formed on the substrate and includes a light-emitting region. The top-most layer is formed on the multi-layer structure, and the lower part of the sidewall of the top-most layer exhibits a first surface morphology relative to a first pattern. In addition, the upper part of the sidewall of the top-most layer exhibits a second surface morphology relative to a second pattern. The at least one electrode is formed on the top-most layer. Therefore, the sidewall of the semiconductor light-emitting device according to the invention exhibits a surface morphology, which increases the light-extraction area of the sidewall, and consequently enhances the light-extraction efficiency of the semiconductor light-emitting device. | 10-23-2008 |
20090008657 | Semiconductor light-emitting device with low-density defects and method of fabricating the same - A semiconductor light-emitting device and a method of fabricating the same are provided. The semiconductor light-emitting device includes a substrate, a multi-layer structure and an ohmic electrode structure. The substrate has a first upper surface and a plurality of first recesses formed in the first upper surface. The multi-layer structure is formed on the first upper surface of the substrate and includes a light-emitting region. A bottom-most layer of the multi-layer structure is formed on the first upper surface of the substrate. The bottom-most layer has a second upper surface and a plurality of second recesses formed in the second upper surface. The second recesses project on the first upper surface. The ohmic electrode structure is formed on the multi-layer structure. | 01-08-2009 |
20090212311 | SEMICONDUCTOR LIGHT-EMITTING DEVICE - The invention discloses a semiconductor light-emitting device, which includes a substrate, a first conductive type semiconductor material layer, a second conductive type semiconductor material layer, a light-emitting layer, a first electrode, a second electrode, and a plurality of bump structures. The first conductive type semiconductor material layer is formed on the substrate and has an upper surface which includes a first region and a second region distinct from the first region. The first electrode is formed on the first region. The light-emitting layer and the second conductive type semiconductor material layer are formed on the second region. The bump structures are formed on the upper surface of the first conductive type semiconductor material layer and between the first region and the second region. Each bump structure is made of ITO, SiO2, SiN, ZnO, polymide, BCB, SOG, InO, or SnO. | 08-27-2009 |
20090212312 | SEMICONDUCTOR LIGHT-EMITTING DEVICE - The invention discloses a semiconductor light-emitting device, which includes a substrate, a first conductive type semiconductor material layer, a second conductive type semiconductor material layer, a light-emitting layer, a first electrode, a second electrode, and a plurality of bump structures. The first conductive type semiconductor material layer is formed on the substrate and has an upper surface which includes a first region and a second region distinct from the first region. The first electrode is formed on the first region. The light-emitting layer and the second conductive type semiconductor material layer are formed on the second region. The bump structures are formed on the upper surface of the first conductive type semiconductor material layer and between the first region and the second region. Each bump structure is made of ITO, SiO2, SiN, ZnO, polymide, BCB, SOG, InO, or SnO. | 08-27-2009 |
20100230706 | SEMICONDUCTOR LIGHT-EMITTING DEVICE - The invention discloses a semiconductor light-emitting device, which includes a substrate, a first conductive type semiconductor material layer, a second conductive type semiconductor material layer, a light-emitting layer, a first electrode, a second electrode, and a plurality of bump structures. The first conductive type semiconductor material layer is formed on the substrate and has an upper surface which includes a first region and a second region distinct from the first region. The first electrode is formed on the first region. The light-emitting layer and the second conductive type semiconductor material layer are formed on the second region. The bump structures are formed on the upper surface of the first conductive type semiconductor material layer and between the first region and the second region. At least one recess is formed in the sidewall of each bump structure. Alternatively, the sidewall of each bump structure has a curved contour. | 09-16-2010 |
Patent application number | Description | Published |
20090157704 | Method for determining synchronization code under SMIA - A method for determining the synchronization code under a standard mobile imaging architecture is provided. This method is essentially to solve any possible error occurring as transferring the images among the mobile devices. If any error is occurred to the transferred bit stream, it will cause fault in the image data. Consequently, the present invention provides an approach to compare every input data with iterative comparison operation, so as to obtain the position of synchronization codes under SMIA. Therefore, the correct synchronization code will solve the possible error translation. | 06-18-2009 |
20090167397 | Delay device for adjusting phase SMIA standard - A delay device for adjusting phase under a SMIA (Standard Mobile Imaging Architecture) standard is provided. More particularly, the delay device is used to adjust a phase of a clock signal, which carries data, under the SMIA standard. The delay device includes plural delay cells, which are disposed on a circuit board by means of APR (Automated Placement and Routing) method, and one or more delay multiplexers (MUX) connected with the delay cells. Through selective pins controlling the route selection in the delay multiplexer, the delay device can produce plural delay times to adjust the phase relationship between data and clock, as supposed to using PLL. | 07-02-2009 |
20090167572 | Serial/Parallel data conversion apparatus and method thereof - A serial/parallel data conversion apparatus and a method thereof are used to convert serial data into parallel data by a delay pulse and three stage registers, wherein the device includes a first data register, a second data register, a third data register, a frequency divider and a delay controller. Moreover, the first data register converts the serial data into the parallel data according to a first working clock signal. The frequency divider performs a frequency division for the first working clock signal for producing a second working clock signal. The second data register acquires the parallel data from the first register according to the second working clock signal. The delay controller delays the second working clock signal to produce a third working clock signal. Finally, the third data register obtains the parallel data from the second register according to the third working clock signal. | 07-02-2009 |
20090168918 | Differential signal modulating apparatus and method thereof - A differential signal modulating apparatus and method thereof is provided. The differential signal modulating apparatus receives differential signal pairs from a transmitter, and generates multimedia streams. It is controlled by modulating the reception sequence of differential pairs to match with the transmitted sequence of differential pairs sent from the transmitter. In addition, the present invention method can be extensively applied to various interfaces. | 07-02-2009 |
20090172334 | Data sorting device and method thereof - A data sorting device and a method thereof are disclosed, wherein the data sorting device includes plural storage modules and an enabling controller. Moreover, each storage module has a falling edge-triggered register and a rising edge-triggered register, and each storage module receives a serial data in response to the rising edge of clock and the falling edge of clock. Furthermore, the enabling controller is connected with each storage module for enabling each storage module by sequence turns in response to the trigger of the rising edge of clock. | 07-02-2009 |