Wang, MY
Hsin Wey Wang, Penang MY
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20080301615 | Focused ion beam defining process enhancement - Embodiments employ a method to define points on selected nets in a netlist for a focused ion beam (FIB) to create open circuits. A selected net is partitioned into a set of sub-segments, and after considering all metal layers at and above that of the selected net, a subset of the set of sub-segments is formed as those sub-segments having minimum distances from the considered metal layers greater than some threshold. All contiguous sub-segments in the subset of the set of sub-segments are grouped into groups. The midpoints of such groups, and any isolated sub-segments, are possible candidate for FIB points. For some embodiments, the midpoint of the longest (or one of the longest) groups of sub-segments is chosen as the FIB point for the selected net. Other embodiments are described and claimed. | 12-04-2008 |
Hui Teng Wang, Muar MY
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20100270667 | SEMICONDUCTOR PACKAGE WITH MULTIPLE CHIPS AND SUBSTRATE IN METAL CAP - A semiconductor package includes a first semiconductor chip, a second semiconductor chip, a first substrate, a second substrate and a metal cap. The chips are electrically connected to the first substrate, the second substrate is disposed between the chips, and the chips and the second substrate are disposed within the metal cap. | 10-28-2010 |
Mei Yong Wang, Air Keroh MY
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20140339690 | Elimination of Die-Top Delamination - An integrated-circuit module includes an integrated-circuit device having a first surface and a plurality of bond pads disposed on the first surface. The module further includes metallic bond wires or metallic ribbons, which are attached between respective ones of a first subset of the bond pads and a package substrate or leadframe, such that a second subset of the bond pads are not attached to either a package substrate or leadframe. A metallic stud bump is affixed to each of one or more of the second subset of the bond pads. The integrated-circuit module further comprises a molding compound that contacts at least the first surface of the integrated-circuit device and substantially surrounds the bond wires or ribbon wires and the metallic stud bumps. | 11-20-2014 |
Soon Wei Wang, Seremban MY
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20090102028 | METHOD FOR MANUFACTURING A SEMICONDUCTOR COMPONENT AND STRUCTURE THEREFOR - A method for manufacturing a semiconductor component that includes a leadframe having a non-metallic base structure and an intermediate leadframe structure. The non-metallic base structure may be, among other things, paper, cellulose, or plastic. A layer of electrically conductive material is formed over the non-metallic base structure. A circuit element attach structure and a plurality of leadframe leads are formed from the layer of electrically conductive material. A circuit element is coupled to the circuit element attach structure and electrically coupled to the plurality of leadframe leads. The circuit element is encapsulated and at least the non-metallic base structure is removed. Alternatively, a plurality of leadframe leads may be formed on the electrically conductive layer and a circuit element is placed over the electrically conductive layer. The circuit element is electrically coupled to the plurality of leadframe leads and encapsulated. The non-metallic base structure and the electrically conductive layer are removed. | 04-23-2009 |
20120063107 | SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE - A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component includes stacked semiconductor die. In accordance with embodiments, the semiconductor component includes a substrate having a component receiving area and a plurality of bond pads. A semiconductor chip is attached to the component receiving area. An electrical connector is coupled to the semiconductor chip and the substrate. A second semiconductor chip is mounted or attached to one of the ends of the electrical connector such that this end is positioned between the semiconductor chips. A second electrical connector is coupled between the second semiconductor chip and the substrate. A third semiconductor chip is mounted over or attached to the second electrical connector such that a portion is between the second and third semiconductor chips. | 03-15-2012 |
20120064781 | CONNECTOR ASSEMBLY AND METHOD OF MANUFACTURE - A connector assembly and a method for manufacturing the connector assembly. In accordance with embodiments, the connector assembly includes an electrical connector having first and second surfaces and first and second ends. A layer of electrically insulating material is formed from or on a portion of the first surface at the first end. Optionally, a layer of electrically insulating material can be formed from or on the second surface. | 03-15-2012 |
Tong Hong Wang, Selangor D.e. MY
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20090230544 | HEAT SINK STRUCTURE AND SEMICONDUCTOR PACKAGE AS WELL AS METHOD FOR CONFIGURING HEAT SINKS ON A SEMICONDUCTOR PACKAGE - A heat sink structure according to the present invention is provided. The heat sink has a through opening extending from the upper surface through to the lower surface. A solder is disposed in the through opening and on the upper and lower surfaces of the heat sink, wherein the portion of the solder in the through opening is connected with the portions of the solder on the upper and lower surfaces. | 09-17-2009 |
Tong Hong Wang, Banting MY
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20090250806 | SEMICONDUCTOR PACKAGE USING AN ACTIVE TYPE HEAT-SPREADING ELEMENT - A semiconductor package includes a carrier, a chip, a stiffener, a heat spreader and an active type heat-spreading element. The chip and the stiffener are disposed on the carrier. The heat spreader is disposed on the stiffener and includes a through opening. The active type heat-spreading element is disposed on the chip and located in the through opening. | 10-08-2009 |
Tong-Hong Wang, Selangor D. E. MY
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20080272486 | CHIP PACKAGE STRUCTURE - A chip package structure includes a carrier, an interposer, a plurality of electrically conductive elements, a first sealant, a chip, and a second sealant. The interposer is disposed on the carrier. The electrically conductive elements electrically connect the interposer and the carrier. The first sealant seals the electrically conductive elements. A plurality of bumps of the chip is connected to the interposer. The second sealant seals the bumps. A first glass transition temperature of the first sealant is higher than a second glass transition temperature of the second sealant. Since glass transition temperatures of the first sealant and the second sealant are different, and the first glass transition temperature of the first sealant is higher than the second glass transition temperature of the second sealant, the inner stress will be lowered and the yield is promoted. | 11-06-2008 |
Wai Keong Wang, Shah Alam MY
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20110101072 | ADJUSTABLE CLAMP SYSTEM AND METHOD FOR WIRE BONDING DIE ASSEMBLY - A method and an adjustable clamp system for clamping a die assembly during wire bonding. The system includes at least one pair of opposing base walls, each of the base walls has a base clamping surface. There is at least one pair of clamping members, each one of the clamping members being movable towards a respective base clamping surface to thereby clamp a lead frame of the die assembly. A die assembly support is disposed between the pair of opposing base walls and the die assembly support and pair of opposing base walls provide a cavity. There is a position sensor coupled to a controller and there is also a drive that is controllable by the controller. The drive provides movement of the die assembly support relative to each the base clamping surface to thereby adjust a depth of the cavity. In operation, after the lead frame is clamped between the base clamping surface and clamping members, the controller allows the drive to provide the relative movement until the position sensor detects that an underside of the lead frame has abutted the die assembly support. | 05-05-2011 |