| Patent application number | Description | Published |
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| 20090171908 | Natural language minimally explicit grammar pattern - The invention utilizes a known syntax and concept model to enable a user to make a reliable and accurate database query with words that more closely resemble the user's natural language and less like a structured database query. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72( | 07-02-2009 |
| 20090171912 | Disambiguation of a structured database natural language query - The invention compares a user-generated inquiry to a known data source in order to present a user with a choice of valid natural language inquiries. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. | 07-02-2009 |
| 20090171923 | Domain-specific concept model for associating structured data that enables a natural language query - The invention defines a domain specific concept model that is flexible, intuitive, and which easily integrates into disparate, but similarly architected, domain-specific databases. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b). | 07-02-2009 |
| 20090171924 | Auto-complete search menu - The invention builds a natural-language query by associating a auto-complete menu system with a domain-specific concept model, generating a command displayed in a list of proper commands, in a auto-complete fashion to the user (the list of proper commands comprising all elements of a set of proper commands), detecting a command choice of the user, and displaying the command choice in the entry area upon determining that the command choice is a proper command, and generating a target concept in a similar manner. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b). | 07-02-2009 |
| Patent application number | Description | Published |
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| 20090306899 | Geophysical surveying - Joint processing of seismic and controlled source electromagnetic (CSEM) surface data is performed by using a common rock physics model which relates reservoir properties (such as porosity, lithology, saturation, and shaliness) to surface seismic AVO (or AVA) data. This allows one to determine how perturbations in the reservoir properties affect surface data. This can be carried out by systematically changing the reservoir properties and examining the effect on the synthetic data. This allows the hydrocarbon type of a reservoir to be established, e.g. oil or gas, as well as the saturation level of the hydrocarbon in the reservoir, which is useful for determining whether the reservoir has a non-commercial, low hydrocarbon saturation or a commercial, high hydrocarbon saturation. | 12-10-2009 |
| 20130182819 | Method Of Determining Reservoir Properties And Quality With Multiple Energy X-Ray Imaging - A method of evaluating a reservoir includes a multi-energy X-ray CT scan of a sample, obtaining bulk density and photoelectric effect index effect for the sample, estimation of at least mineral property using data obtained from at least one of a core gamma scan, a spectral gamma ray scan, an X-ray fluorescence (XRF) analysis, or an X-ray diffraction (XRD) analysis of the sample, and determination of at least one sample property by combining the bulk density, photoelectric effect index, and the at least one mineral property (e.g., total clay content). Reservoir properties, such as one or more of formation brittleness, porosity, organic material content, and permeability, can be determined by the method without need of detailed lab physical measurements or destruction of the sample. A system for evaluating a reservoir also is provided. | 07-18-2013 |
| 20130259190 | Method And System For Estimating Properties Of Porous Media Such As Fine Pore Or Tight Rocks - A method for estimating properties of porous media, such as fine pore or tight rocks, is provided. The method comprises digital image scanning of sequential sub-samples of porous media at progressively higher resolution to systematically identify sub-sections of interest within the original sample and then estimate properties of the porous media. The resulting properties of the porous media then can be optionally upscaled to further estimate the properties of larger volumes of the porous media such as rock facies or subterranean reservoirs. A system operable for conducting the method also is provided. | 10-03-2013 |
| 20150025863 | CUTTINGS-BASED WELL LOGGING - Methods and systems for cuttings-based well logging, including a method that includes converting measurements of cuttings samples from one or more depth intervals of a wellbore to a concentration percent of one or more elements, determining a one or more minerals of the cuttings samples from the concentration percent and building a mineralogy model for the cuttings sample based at least in part on a gravimetric conversion of the concentration percent of at least some of the one or more elements to a concentration percent of the one or more minerals. The method further includes normalizing the concentration percent of the one or more minerals, computing a photo-electric absorption factor (PEF) of the cuttings samples for each of the one or more depth intervals, and presenting to a user a log of the computed PEF as a function of wellbore depth. | 01-22-2015 |
| Patent application number | Description | Published |
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| 20090200074 | Circuit Substrate Having Post-Fed Die Side Power Supply Connections - A circuit substrate uses post-fed top side power supply connections to provide improved routing flexibility and lower power supply voltage drop/power loss. Plated-through holes are used near the outside edges of the substrate to provide power supply connections to the top metal layers of the substrate adjacent to the die, which act as power supply planes. Pins are inserted through the plated-through holes to further lower the resistance of the power supply path(s). The bottom ends of the pins may extend past the bottom of the substrate to provide solderable interconnects for the power supply connections, or the bottom ends of the pins may be soldered to “jog” circuit patterns on a bottom metal layer of the substrate which connect the pins to one or more power supply terminals of an integrated circuit package including the substrate. | 08-13-2009 |
| 20090256253 | Continuously Referencing Signals Over Multiple Layers in Laminate Packages - A mechanism for continuously referencing signals over multiple layers in laminate packages provides a continuous path for signals from one layer to another while using the ideal voltage reference for all areas of the package and still avoiding discontinuities in the voltage reference. A reference plane adjustment engine analyzes a package design and identifies an ideal top plane for all areas of the package, including areas under particular chip die(s) and areas that are not under a chip die. The reference plane adjustment engine then modifies the package design to reposition ground planes, source voltage planes, signal planes, and vias between layers to maintain a continuous voltage reference regardless of the top layer. The reference plane adjustment engine provides the resulting mixed voltage plane package design to a design analysis engine. A package fabrication system fabricates the package. | 10-15-2009 |
| 20100195756 | REDUCED WIRING REQUIREMENTS WITH SIGNAL SLOPE MANIPULATION - An information handling system device includes a plurality of electronic components; an electric circuit including at least one trace for connecting two or more of the plurality of electronic components and transmitting data between the plurality of electronic components via at least one electric signal; and a substrate including an insulating material for serving as a base for the electric circuit and the plurality of electronic components, wherein the at least one electric signal transmitted between the plurality of electronic components is transmitted utilizing slope manipulation to provide a slope directly proportional to a data value. | 08-05-2010 |
| 20100330797 | FABRICATION METHOD FOR CIRCUIT SUBSTRATE HAVING POST-FED DIE SIDE POWER SUPPLY CONNECTIONS - A circuit substrate uses post-fed top side power supply connections to provide improved routing flexibility and lower power supply voltage drop/power loss. Plated-through holes are used near the outside edges of the substrate to provide power supply connections to the top metal layers of the substrate adjacent to the die, which act as power supply planes. Pins are inserted through the plated-through holes to further lower the resistance of the power supply path(s). The bottom ends of the pins may extend past the bottom of the substrate to provide solderable interconnects for the power supply connections, or the bottom ends of the pins may be soldered to “jog” circuit patterns on a bottom metal layer of the substrate which connect the pins to one or more power supply terminals of an integrated circuit package including the substrate. | 12-30-2010 |
| 20120174047 | Continuously Referencing Signals Over Multiple Layers in Laminate Packages - A mechanism for continuously referencing signals over multiple layers in laminate packages provides a continuous path for signals from one layer to another while using the ideal voltage reference for all areas of the package and still avoiding discontinuities in the voltage reference. A reference plane adjustment engine analyzes a package design and identifies an ideal top plane for all areas of the package, including areas under particular chip die(s) and areas that are not under a chip die. The reference plane adjustment engine then modifies the package design to reposition ground planes, source voltage planes, signal planes, and vias between layers to maintain a continuous voltage reference regardless of the top layer. The reference plane adjustment engine provides the resulting mixed voltage plane package design to a design analysis engine. A package fabrication system fabricates the package. | 07-05-2012 |
| 20130010445 | REDUCED WIRING REQUIREMENTS WITH SIGNAL SLOPE MANIPULATION - An information handling system device includes a plurality of electronic components; an electric circuit including at least one trace for connecting two or more of the plurality of electronic components and transmitting data between the plurality of electronic components via at least one electric signal; and a substrate including an insulating material for serving as a base for the electric circuit, wherein each of the at least one electric signal transmitted between the plurality of electronic components is transmitted utilizing slope manipulation by manipulating each of the at least one electric signal to provide a slope substantially proportional to a discrete integer data value of n discrete integer data values, n being a positive integer greater than or equal to 3, said discrete integer data value represented by using one of n distinct slopes transmitted utilizing a particular reference voltage of n predetermined reference voltages. | 01-10-2013 |
| 20130316534 | FABRICATION METHOD FOR CIRCUIT SUBSTRATE HAVING POST-FED DIE SIDE POWER SUPPLY CONNECTIONS - A circuit substrate uses post-fed top side power supply connections to provide improved routing flexibility and lower power supply voltage drop/power loss. Plated-through holes are used near the outside edges of the substrate to provide power supply connections to the top metal layers of the substrate adjacent to the die, which act as power supply planes. Pins are inserted through the plated-through holes to further lower the resistance of the power supply path(s). The bottom ends of the pins may extend past the bottom of the substrate to provide solderable interconnects for the power supply connections, or the bottom ends of the pins may be soldered to “jog” circuit patterns on a bottom metal layer of the substrate which connect the pins to one or more power supply terminals of an integrated circuit package including the substrate. | 11-28-2013 |
| 20130328645 | Plating Stub Resonance Shift with Filter Stub Design Methodology - A technique is provided to increase signal bandwidth of data processing signals by providing a plating stub as a filter using multiple line segments of different widths to filter the reflected high frequency components bouncing from the stub end toward the signal path. This stub-filter shifts the resonance point to a much higher frequency, placing that point of resonance beyond the bandwidth of interest without sacrificing a low frequency loss. Accordingly, there is provided an apparatus comprising a stub filter of a substrate, comprising a multi-segmented stub comprising a plurality of stub portions, where one of the stub portions has a different impedance than another of the stub portions. | 12-12-2013 |
| 20130330940 | Multi-Level Connector and Use Thereof that Mitigates Data Signaling Reflections - An improved electrical connector for connecting bus lines to a card such as a memory card or media card, including a multi-level connector comprising a latching device having a plurality of insertable latch positions that advantageously allows for selectively connecting or isolating an electrical path to an adjoining connector. The connectors of unpopulated DIMM slots are disconnected from the network along with the traces that would normally form a stub with associated undesirable signal reflections that would otherwise disturb the signal transmitted to the receiving end if not properly terminated. The contacts of the edge connector itself are used as a means to selectively connect or disconnect adjacent/downstream cards in a serially cascaded architecture. The burden of the stubs due to unpopulated card slots and the need to place one card at the far end of the network are thus eliminated. | 12-12-2013 |
| 20140075748 | Multi-Level Connector and Use Thereof that Mitigates Data Signaling Reflections - An improved electrical connector for connecting bus lines to a card such as a memory card or media card, including a multi-level connector comprising a latching device having a plurality of insertable latch positions that advantageously allows for selectively connecting or isolating an electrical path to an adjoining connector. The connectors of unpopulated DIMM slots are disconnected from the network along with the traces that would normally form a stub with associated undesirable signal reflections that would otherwise disturb the signal transmitted to the receiving end if not properly terminated. The contacts of the edge connector itself are used as a means to selectively connect or disconnect adjacent/downstream cards in a serially cascaded architecture. The burden of the stubs due to unpopulated card slots and the need to place one card at the far end of the network are thus eliminated. | 03-20-2014 |
| 20140167886 | Plating Stub Resonance Shift with Filter Stub Design Methodology - A technique is provided to increase signal bandwidth of data processing signals by providing a plating stub as a filter using multiple line segments of different widths to filter the reflected high frequency components bouncing from the stub end toward the signal path. This stub-filter shifts the resonance point to a much higher frequency, placing that point of resonance beyond the bandwidth of interest without sacrificing a low frequency loss. Accordingly, there is provided an apparatus comprising a stub filter of a substrate, comprising a multi-segmented stub comprising a plurality of stub portions, where one of the stub portions has a different impedance than another of the stub portions. | 06-19-2014 |
| 20150276838 | NOISE MODULATION FOR ON-CHIP NOISE MEASUREMENT - Functionality for estimating characteristics of an on-chip noise signal can be implemented on a processing module. An on-chip noise signal is determined at an on-chip determination point of a computer chip. The on-chip noise signal is converted to a frequency-varying signal using a voltage-controlled oscillator implemented on the computer chip. The frequency-varying signal is measured at an off-chip measurement point and frequency information is extracted from the frequency-varying signal. The frequency information is converted to a voltage level associated with the on-chip noise signal based on the relationship between an input voltage provided to the voltage-controlled oscillator and an output frequency generated by the voltage-controlled oscillator. | 10-01-2015 |
| 20150276840 | NOISE MODULATION FOR ON-CHIP NOISE MEASUREMENT - Functionality for estimating characteristics of an on-chip noise signal can be implemented on a processing module. An on-chip noise signal is determined at an on-chip determination point of a computer chip. The on-chip noise signal is converted to a frequency-varying signal using a voltage-controlled oscillator implemented on the computer chip. The frequency-varying signal is measured at an off-chip measurement point and frequency information is extracted from the frequency-varying signal. The frequency information is converted to a voltage level associated with the on-chip noise signal based on the relationship between an input voltage provided to the voltage-controlled oscillator and an output frequency generated by the voltage-controlled oscillator. | 10-01-2015 |
