Patent application number | Description | Published |
20090029582 | Tamper-Evident Connector - Embodiments of a tamper-evident connector are disclosed which may optionally be used in a trusted computing environment. In an exemplary embodiment, a tamper-evident connection includes a mate-once engaging assembly for providing with a first component, the mate-once engaging assembly including a foldable portion. The tamper-evident connection also includes a receiving chamber for providing with a second component, the mate-once engaging assembly fitting in the receiving chamber to physically secure the first component to the second component, the foldable portion of the mate-once engaging assembly unfolding during removal of the mate-once engaging assembly from the receiving chamber to provide evidence of tampering when the first component has been removed from the second component. Optionally, the first component is a Trusted Platform Module (TPM) and the second component is a system board. | 01-29-2009 |
20090031051 | CENTRALIZED SERVER RACK MANAGEMENT USING USB - A multi-server computing system includes a plurality of server modules mounted in an enclosure; each server has a universal serial bus (USB) interface. An enclosure onboard administration (OA) module is also mounted in the enclosure and has an addressable communication interface for connection to a remote management system and a USB interface connected to each of the plurality of servers. The USB interface of the enclosure OA operates as a master and the USB interface of each of the plurality of servers acts as a slave to the enclosure OA, such that each of the server modules can be managed by the remote management system using a single communication address. | 01-29-2009 |
20100081311 | Tamper-Evident Connector - Embodiments of a tamper-evident connector are disclosed which may optionally be used in a trusted computing environment. In an exemplary embodiment, a tamper-evident connection includes a mate-once engaging assembly for providing with a first component, the mate-once engaging assembly including a foldable portion. The tamper-evident connection also includes a receiving chamber for providing with a second component, the mate-once engaging assembly fitting in the receiving chamber to physically secure the first component to the second component, the foldable portion of the mate-once engaging assembly unfolding during removal of the mate-once engaging assembly from the receiving chamber to provide evidence of tampering when the first component has been removed from the second component. Optionally, the first component is a Trusted Platform Module (TPM) and the second component is a system board. | 04-01-2010 |
20110205078 | COMPONENT INSTALLATION GUIDANCE - In accordance with embodiments, a system includes a plurality of component slots and at least one indicator associated with each of said slots. The system also includes a controller coupled to the indicators. The indicators selectively provide installation guidance of components into said slots based on signals from the controller. | 08-25-2011 |
20110296100 | MIGRATING WRITE INFORMATION IN A WRITE CACHE OF A STORAGE SYSTEM - To migrate data from a first storage system to a second storage system, the second storage system detects a migration of a persistent storage media from the first storage system to the second storage system. In response to detecting the migration of the persistent storage media, write information from a write cache in the first storage system is copied to a write cache in the second storage system, where the write caches in the first and second storage systems were not maintained synchronously before the write information from the write cache in the first storage system is copied to the write cache in the second storage system. | 12-01-2011 |
20120110363 | METHOD AND SYSTEM FOR POWER-EFFICIENT AND NON-SIGNAL-DEGRADING VOLTAGE REGULATION IN MEMORY SUBSYSTEMS - Embodiments of the present invention are directed to a memory subsystem comprising a memory controller, multiple memory modules interconnected with the memory controller by one or more communications media, each memory module comprising a substrate to which multiple memory chips are mounted and electronically connected to the communications media, and a power-supply signal routed to two or more voltage regulators within the memory subsystem from a system power supply, the voltage regulators outputting two or more internal power signals, each power signal providing a different, regulated voltage, which are routed to each of the memory chips. Another embodiment of the present invention is directed to a memory module comprising a substrate to which multiple memory chips are mounted and two or more voltage regulators mounted to, or fabricated within, the substrate. | 05-03-2012 |
20120120582 | MEMORY SUPPORT STRUCTURE - A memory support structure includes a base for physically and electrically connecting to a substrate. When so connected, the memory support structure extends orthogonal to the substrate to a height of at least 2.5 cm. The memory support structure provides at least three sockets for receiving and engaging memory modules so that they extend parallel to the substrate. The memory support structure also includes electrical pathways for electrically connecting the sockets and the base so that a memory module inserted into one of said sockets is electrically connected to the substrate. | 05-17-2012 |
20140115209 | Flow Control for a Serial Peripheral Interface Bus - Systems and methods for flow control within a Serial Peripheral Interface without additional signal lines are included herein. In one example, a method includes generating a flow control command. The method also includes sending the flow control command from a master device to a slave device with a Serial Peripheral Interface. In addition, the method includes sending a memory address from the master device to the slave device. Furthermore, the method includes detecting a ready indicator in the master device. The method also includes waiting to receive a ready indicator and communicating with the slave device in response to the ready indicator. | 04-24-2014 |
20150032917 | MULTIPLEXER FOR SIGNALS ACCORDING TO DIFFERENT PROTOCOLS - A multi-protocol multiplexer provides signals according to different protocols for accessing a storage subsystem to a connector, where the signals according to a first protocol are to be routed over a first subset of channels of an interconnect to the storage subsystem, and the signals according to a second protocol are routed over a second subset of channels of the interconnect. | 01-29-2015 |
20150039873 | PROCESSOR PROVIDING MULTIPLE SYSTEM IMAGES - An example processor includes a plurality of processing core components, one or more memory interface components, and a management component, wherein the one or more memory interface components are each shared by the plurality of processing core components, and wherein the management component is configured to assign each of the plurality of processing core components to one of a plurality of system images. | 02-05-2015 |