Patent application number | Description | Published |
20090195335 | SEMICONDUCTOR CONFIGURATION HAVING AN INTEGRATED COUPLER AND METHOD FOR MANUFACTURING SUCH A SEMICONDUCTOR CONFIGURATION - A semiconductor configuration having an integrated coupler is provided. The semiconductor configuration includes a coupler which is integrated in the substrate and which includes a first port and a second port. The coupler defines, in a plan view onto the substrate, an inner region of the substrate surrounded at least in sections by the coupler, and an outer region of the substrate arranged outside to the coupler. The coupler is at least a magnetic coupler, a capacitive coupler, or a combination of both. At least a circuit element is integrated in the inner region of the substrate and includes a port which is electrically connected to the second port of the coupler. | 08-06-2009 |
20110148549 | Signal Transmission Arrangement - A signal transmission arrangement includes input terminals for receiving an input signal and output terminals for providing an output signal. A first transformer has a primary winding and a secondary winding, the primary winding being coupled to the input terminals. A second transformer has a primary winding and a secondary winding, the primary winding being coupled to the secondary winding of the first transformer, and the secondary winding being coupled to the output terminals. | 06-23-2011 |
20110176339 | Signal Transmission Arrangement - A signal transmission arrangement is disclosed. A voltage converter includes a signal transmission arrangement. | 07-21-2011 |
20120080770 | Transformer Arrangement - A transformer arrangement and a method for producing a transformer arrangement is disclosed. | 04-05-2012 |
20130224921 | LATERAL TRENCH TRANSISTOR, AS WELL AS A METHOD FOR ITS PRODUCTION - A method for production of doped semiconductor regions in a semiconductor body of a lateral trench transistor includes forming a trench in the semiconductor body and introducing dopants into at least one area of the semiconductor body that is adjacent to the trench, by carrying out a process in which dopants enter the at least one area through inner walls of the trench. | 08-29-2013 |
20130249602 | Semiconductor Arrangement with a Power Transistor and a High Voltage Device Integrated in a Common Semiconductor Body - A semiconductor arrangement includes a semiconductor body and a power transistor including a source region, a drain region, a body region and a drift region arranged in the semiconductor body, a gate electrode arranged adjacent to the body region and dielectrically insulated from the body region by a gate dielectric. The semiconductor arrangement further includes a high voltage device arranged within a well-like dielectric structure in the semiconductor body and comprising a further drift region. | 09-26-2013 |
20130307058 | Semiconductor Devices Including Superjunction Structure and Method of Manufacturing - A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface. A superjunction structure in the semiconductor body includes drift regions of a first conductivity type and compensation structures alternately disposed in a first direction parallel to the first surface. Each of the charge compensation structures includes a first semiconductor region of a second conductivity type complementary to the first conductivity type and a first trench including a second semiconductor region of the second conductivity type adjoining the first semiconductor region. The first semiconductor region and the first trench are disposed one after another in a second direction perpendicular to the first surface. | 11-21-2013 |
20140001552 | Super Junction Semiconductor Device Comprising a Cell Area and an Edge Area | 01-02-2014 |
20140231903 | Semiconductor Device with a Super Junction Structure Having a Vertical Impurity Distribution - A super junction semiconductor device includes a semiconductor portion with parallel first and second surfaces. An impurity layer of a first conductivity type is formed in the semiconductor portion. Between the first surface and the impurity layer a super junction structure includes first columns of the first conductivity type and second columns of a second conductivity type. A sign of a compensation rate between the first and second columns may change along a vertical extension of the columns perpendicular to the first surface. A body zone of the second conductivity type is formed between the first surface and one of the second columns. A field extension zone of the second conductivity type may be electrically connected to the body zone or a field extension zone of the first conductivity type may be connected to the impurity layer. The field extension zone improves the avalanche characteristics of the semiconductor device. | 08-21-2014 |
20140231904 | Super Junction Semiconductor Device with Overcompensation Zones - According to an embodiment, a super junction semiconductor device may be manufactured by introducing impurities of a first impurity type into an exposed surface of a first semiconductor layer of the first impurity type, thus forming an implant layer. A second semiconductor layer of the first impurity type may be provided on the exposed surface and trenches may be etched through the second semiconductor layer into the first semiconductor layer. Thereby first columns with first overcompensation zones obtained from the implant layer are formed between the trenches. Second columns of the second conductivity type may be provided in the trenches. The first and second columns form a super junction structure with a vertical first section in which the first overcompensation zones overcompensate a corresponding section in the second columns. | 08-21-2014 |
20140231909 | Super Junction Semiconductor Device Comprising Implanted Zones - In a semiconductor substrate with a first surface and a working surface parallel to the first surface, columnar first and second super junction regions of a first and a second conductivity type are formed. The first and second super junction regions extend in a direction perpendicular to the first surface and form a super junction structure. The semiconductor portion is thinned such that, after the thinning, a distance between the first super junction regions having the second conductivity type and a second surface obtained from the working surface does not exceed 30 μm. Impurities are implanted into the second surface to form one or more implanted zones. The embodiments combine super junction approaches with backside implants enabled by thin wafer technology. | 08-21-2014 |
20140231910 | Manufacturing a Super Junction Semiconductor Device and Semiconductor Device - A super junction semiconductor device includes a semiconductor portion with a first surface and a parallel second surface. A doped layer of a first conductivity type is formed at least in a cell area. Columnar first super junction regions of a second, opposite conductivity type extend in a direction perpendicular to the first surface. Columnar second super junction regions of the first conductivity type separate the first super junction regions from each other. The first and second super junction regions form a super junction structure between the first surface and the doped layer. A distance between the first super junction regions and the second surface does not exceed 30 μm. The on-state or forward resistance of low-voltage devices rated for reverse breakdown voltages below 1000 V can be defined by the resistance of the super junction structure. | 08-21-2014 |
20140231928 | Super Junction Semiconductor Device with an Edge Area Having a Reverse Blocking Capability - A semiconductor device includes a semiconductor layer with a super junction structure including first columns of a first conductivity type and second columns of a second conductivity type opposite the first conductivity type. The super junction structure is formed in a cell area and in an inner portion of an edge area surrounding the cell area. In the inner portion of the edge area a reverse blocking capability is locally reduced by a local modification of the semiconductor layer. The local modification allows an electric field to extend in case an avalanche breakdown occurs. The reverse blocking capability is locally reduced in the edge area, wherein once an avalanche breakdown has been triggered the semiconductor device accommodates a higher reverse voltage. Avalanche ruggedness is improved. | 08-21-2014 |
20140332885 | Trench Transistor Having a Doped Semiconductor Region - A lateral trench transistor has a semiconductor body having a source region, a source contact, a body region, a drain region, and a gate trench, in which a gate electrode which is isolated from the semiconductor body is embedded. A heavily doped semiconductor region is provided within the body region or adjacent to it, and is electrically connected to the source contact, and whose dopant type corresponds to that of the body region. | 11-13-2014 |
20150056782 | Method of Manufacturing a Super Junction Semiconductor Device with Overcompensation Zones - According to an embodiment, a super junction semiconductor device may be manufactured by introducing impurities of a first impurity type into an exposed surface of a first semiconductor layer of the first impurity type, thus forming an implant layer. A second semiconductor layer of the first impurity type may be provided on the exposed surface and trenches may be etched through the second semiconductor layer into the first semiconductor layer. Thereby first columns with first overcompensation zones obtained from the implant layer are formed between the trenches. Second columns of the second conductivity type may be provided in the trenches. The first and second columns form a super junction structure with a vertical first section in which the first overcompensation zones overcompensate a corresponding section in the second columns. | 02-26-2015 |