Patent application number | Description | Published |
20090250796 | SEMICONDUCTOR DEVICE PACKAGE HAVING FEATURES FORMED BY STAMPING - Embodiments of the present invention relate to the use of stamping to form features on a lead frame of a semiconductor device package. In one embodiment, portions of the lead frame such as pins are moved out of the horizontal plane of a diepad by stamping. In certain embodiments, indentations or a complex cross-sectional profile, such as chamfered, may be imparted to portions of the pins and/or diepad by stamping. The complexity offered by such a stamped cross-sectional profile serves to enhance mechanical interlocking of the lead frame within the plastic molding of the package body. Other techniques such as selective electroplating and/or formation of a brown oxide guard band to limit spreading of adhesive material during die attach, may be employed alone or in combination to facilitate fabrication of a package having such stamped features. | 10-08-2009 |
20090273065 | INTERCONNECTION OF LEAD FRAME TO DIE UTILIZING FLIP CHIP PROCESS - Embodiments in accordance with the present invention relate to techniques which avoid the problems of deformation in the shape of a solder connection in a flip chip package, resulting from solder reflow. In one embodiment, a solder-repellent surface is created adjacent to the solder to constrain the reflow and thereby maintain the vertical profile of the solder. Examples of such a solder-repellent surface include an oxide (such as Brown Oxide) of the lead frame, or a tape (such as Kapton) which is used as a dam bar to control/constrain the solder flow on the leads prior to the encapsulation step. In another embodiment, the solder connection may be formed from at least two components. The first component may reflow at high temperatures to provide the necessary adhesion between solder ball and the die, with the second component reflowing at a lower temperature to provide the necessary adhesion between the solder ball and the leads. An example of such multi-component connections include a first high temperature reflow solder ball paired with a second low temperature reflow solder. Another example includes a solder ball with a hard core (such as Cu, stainless steel, or a plastic material stable at high temperatures) coated with a lower temperature reflow material. | 11-05-2009 |
20090283919 | SEMICONDUCTOR PACKAGE FEATURING FLIP-CHIP DIE SANDWICHED BETWEEN METAL LAYERS - Embodiments in accordance with the present invention relate to flip-chip packages for semiconductor devices, which feature a die sandwiched between metal layers. One metal layer comprises portions of the lead frame configured to be in electrical and thermal communication with various pads on a first surface of the die (e.g. IC pads or MOSFET gate or source pads) through a solder ball contact. The other metal layer is configured to be in at least thermal communication with the opposite side of the die. Embodiments of packages in accordance with the present invention exhibit superior heat dissipation qualities, while avoiding the expense of wire bonding. Embodiments of the present invention are particularly suited for packaging of power devices. | 11-19-2009 |
20100140762 | INTERCONNECTION OF LEAD FRAME TO DIE UTILIZING FLIP CHIP PROCESS - Embodiments in accordance with the present invention relate to techniques which avoid the problems of deformation in the shape of a solder connection in a flip chip package, resulting from solder reflow. In one embodiment, a solder-repellent surface is created adjacent to the solder to constrain the reflow and thereby maintain the vertical profile of the solder. Examples of such a solder-repellent surface include an oxide (such as Brown Oxide) of the lead frame, or a tape (such as Kapton) which is used as a dam bar to control/constrain the solder flow on the leads prior to the encapsulation step. In another embodiment, the solder connection may be formed from at least two components. The first component may reflow at high temperatures to provide the necessary adhesion between solder ball and the die, with the second component reflowing at a lower temperature to provide the necessary adhesion between the solder ball and the leads. An example of such multi-component connections include a first high temperature reflow solder ball paired with a second low temperature reflow solder. Another example includes a solder ball with a hard core (such as Cu, stainless steel, or a plastic material stable at high temperatures) coated with a lower temperature reflow material. | 06-10-2010 |
20110024886 | SEMICONDUCTOR DEVICE PACKAGE HAVING FEATURES FORMED BY STAMPING - Embodiments of the present invention relate to the use of stamping to form features on a lead frame of a semiconductor device package. In one embodiment, portions of the lead frame such as pins are moved out of the horizontal plane of a diepad by stamping. In certain embodiments, indentations or a complex cross-sectional profile, such as chamfered, may be imparted to portions of the pins and/or diepad by stamping. The complexity offered by such a stamped cross-sectional profile serves to enhance mechanical interlocking of the lead frame within the plastic molding of the package body. Other techniques such as selective electroplating and/or formation of a brown oxide guard band to limit spreading of adhesive material during die attach, may be employed alone or in combination to facilitate fabrication of a package having such stamped features. | 02-03-2011 |
20110291254 | SEMICONDUCTOR DEVICE PACKAGE FEATURING ENCAPSULATED LEADFRAME WITH PROJECTING BUMPS OR BALLS - Embodiments of the present invention relate to semiconductor device packages featuring encapsulated leadframes in electrical communication with at least one die through electrically conducting bumps or balls and electrically conducting ribbons. Embodiments of the present invention may permit multiple die and/or multiple passive devices to occupy space in the package previously consumed by the diepad. The result is a flexible packaging process allowing the combination of die and technologies required for complete sub-systems in a conventional small JEDEC specified footprint. | 12-01-2011 |
20120056261 | BI-DIRECTIONAL, REVERSE BLOCKING BATTERY SWITCH - Embodiments of the present invention relate to an improved package for a bi-directional and reverse blocking battery switch. According to one embodiment, two switches are oriented side-by-side, rather than end-to-end, in a die package. This configuration reduces the total switch resistance for a given die area, often reducing the resistance enough to avoid the use of backmetal in order to meet resistance specifications. Elimination of backmetal reduces the overall cost of the die package and removes the potential failure modes associated with the manufacture of backmetal. Embodiments of the present invention may also allow for more pin connections and an increased pin pitch. This results in redundant connections for higher current connections, thereby reducing electrical and thermal resistance and minimizing the costs of manufacture or implementation of the die package. | 03-08-2012 |
20120181676 | POWER SEMICONDUCTOR DEVICE PACKAGING - Embodiments of the present invention relate to the use of stamping to form features on a lead frame of a semiconductor device package. In one embodiment, portions of the lead frame such as pins are moved out of the horizontal plane of a diepad by stamping. In certain embodiments, indentations or a complex cross-sectional profile, such as chamfered, may be imparted to portions of the pins and/or diepad by stamping. The complexity offered by such a stamped cross-sectional profile serves to enhance mechanical interlocking of the lead frame within the plastic molding of the package body. Other techniques such as selective electroplating and/or formation of a brown oxide guard band to limit spreading of adhesive material during die attach, may be employed alone or in combination to facilitate fabrication of a package having such stamped features. | 07-19-2012 |
20120181677 | SEMICONDUCTOR DEVICE PACKAGE WITH TWO COMPONENT LEAD FRAME - Embodiments of the present invention relate to the use of stamping to form features on a lead frame of a semiconductor device package. In one embodiment, portions of the lead frame such as pins are moved out of the horizontal plane of a diepad by stamping. In certain embodiments, indentations or a complex cross-sectional profile, such as chamfered, may be imparted to portions of the pins and/or diepad by stamping. The complexity offered by such a stamped cross-sectional profile serves to enhance mechanical interlocking of the lead frame within the plastic molding of the package body. Other techniques such as selective electroplating and/or formation of a brown oxide guard band to limit spreading of adhesive material during die attach, may be employed alone or in combination to facilitate fabrication of a package having such stamped features. | 07-19-2012 |
20130009296 | SEMICONDUCTOR DEVICE PACKAGE HAVING FEATURES FORMED BY STAMPING - Embodiments of the present invention relate to the use of stamping to form features on a lead frame of a semiconductor device package. The lead frame can include a plurality of terminals with stamped features at edges of the terminals. The stamped features can include flattened portions that are thinner than other portions of the terminals and extend laterally beyond the edges of the terminals. Such stamped features can help mechanically interlock the terminals with the plastic molding of the package body. The stamped features can include patterns and/or other features that may further increase interlocking between the terminals and the package body. | 01-10-2013 |
20130009297 | SEMICONDUCTOR DEVICE PACKAGE HAVING CONFIGURABLE LEAD FRAME FINGERS - Embodiments of the present invention relate to the use of configurable lead frame fingers in a semiconductor device package. More specifically, the lead frame of a device package can include a plurality of fingers used to support and provide electrical contact to the die. The die can include a plurality of contacts that comprise a series of parallel columns located a certain distance from one another, and the fingers of the lead frame can be configured to align with the contacts. The lead frame can have multiple terminals, each with one or more fingers and pins. As such, each lead frame configuration may be utilized with different configurations of die. | 01-10-2013 |
20130017652 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE PACKAGE WITH A HEATSINK - Embodiments of the present invention relate to forming semiconductor device package with a heat sink. In one embodiment, a subassembly comprising a die attached to a lead frame is formed, a heat sink is provided in a molding cavity, and the subassembly is coupled to the heat sink while the heat sink is in the molding cavity. In certain embodiments, a second component of the lead frame can be substituted for the heat sink. Such techniques can simplify the manufacturing process for semiconductor packages having a heat sink or lead frame with a second component. | 01-17-2013 |
20130105974 | SEMICONDUCTOR PACKAGE FEATURING FLIP-CHIP DIE SANDWICHED BETWEEN METAL LAYERS | 05-02-2013 |
Patent application number | Description | Published |
20120309445 | CONTROLLING AND MITIGATING DROPPED COMMUNICATIONS - Aspects relate to temporarily disabling a message or a set of messages based on the detection that an uplink transmission power is reaching maximum power or is at maximum power. The detection can be based on observing that one or more uplink transmissions are near, or at, the maximum power. The message or set of messages that are disabled can be a non-call critical message(s), such as a non-signaling radio bearer related message(s). Disabling the message or set of messages can conserve resources, which can be utilized for call critical messages, which can include signaling radio bearer related messages, call maintenance messages, voice communications, and so forth. Disabling the message or set of messages can also mitigate the chances of a call being disconnected due to power demands that exceed the maximum power available. | 12-06-2012 |
20130288667 | CONTROLLING AND MITIGATING DROPPED COMMUNICATIONS - Aspects relate to temporarily disabling a message or a set of messages based on the detection that an uplink transmission power is reaching maximum power or is at maximum power. The detection can be based on observing that one or more uplink transmissions are near, or at, the maximum power. The message or set of messages that are disabled can be a non-call critical message(s), such as a non-signaling radio bearer related message(s). Disabling the message or set of messages can conserve resources, which can be utilized for call critical messages, which can include signaling radio bearer related messages, call maintenance messages, voice communications, and so forth. Disabling the message or set of messages can also mitigate the chances of a call being disconnected due to power demands that exceed the maximum power available. | 10-31-2013 |
20140153418 | DIAGNOSIS OF CELLULAR NETWORK ELEMENT STATES USING RADIO FREQUENCY MEASUREMENTS - Techniques for monitoring and diagnosing states of wireless network elements having a known impact on uplink interference are presented. In an aspect, a method includes receiving, by a system including a processor, diagnostic data for a cellular network including strength data representative of strengths of radio frequency signals, prior to demodulation, respectively received at a plurality of antennas of a base station of the cellular network over a defined duration of time and at a defined sampling rate. The method further includes, based on analyzing the strength data by the system, determining by the system, a state of a network element of the cellular network. | 06-05-2014 |
20150141027 | SELF-ADAPTIVE COVERAGE OF WIRELESS NETWORKS - Both uplink spectral efficiency and downlink spectral efficiency are improved through adjustments made to various parameters that would otherwise be treated as static type parameters. Variations in respective performance of two or more cells can be considered during the adjustment. Further, variations of respective cell performance based on time of day/week are considered and compensated for through various adjustments. Such timely adaptations are applied in order to improve the performance of each cell, during each time of day/week. | 05-21-2015 |
Patent application number | Description | Published |
20080273580 | DYNAMIC ALLOCATION OF CYCLIC EXTENSION IN ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING SYSTEMS - Briefly, in accordance with one embodiment of the invention, an orthogonal frequency division multiplexing system may provide a dynamically calculated cyclic extension, the length of which may be based at least in part on a delay spread due to an experienced environmental condition. The length of the cyclic extension may be calculated by determining a channel impulse response, and then computing the energy distribution of the channel impulse response. The length of the cyclic extension may then be set according to the energy distribution of the channel impulse response. | 11-06-2008 |
20100118931 | DECISION FEEDBACK EQUALIZER FOR PORTABLE ENVIRONMENTS - A method is provided. The method includes receiving a carrier signal and analyzing the received carrier signal to identify at least one of a static multipath delay and a dynamic multipath delay in the signal. The method also includes configuring an equalizer based upon the at least one of the static and dynamic multipath delays. | 05-13-2010 |
20100329309 | ADVANCED TELEVISION SYSTEMS COMMITTEE (ATSC) DIGITAL TELEVISION (DTV) RECEIVER - A computer system may comprise a receiver to perform equalization. The receiver comprises an equalizer. The equalizer may determine locations of a principal tap, a platform noise tap, and a pre-cursor tap in a feedforward path of an equalizer. Also, the equalizer may determine locations of a post-cursor tap, a cross-term tap, and a portable tap in a feedback path of the equalizer. The receiver may align the portable tap in the feedback path with the principal tap in the feedforward path. The platform noise tap may cancel the effect of platform noise on a principal located at the principal tap, thus enabling the computer system to operate effectively in severe platform noise environment. Also, the computer system may operate in statics and portable environment in which platform noise and AGWN may be present. | 12-30-2010 |
20130142183 | CLUSTER-BASED DERIVATION OF ANTENNA TILTS IN A WIRELESS NETWORK - Systems, methods, and apparatus for cluster-based optimization of antenna tilts in a wireless network are presented herein. A screening component can receive information indicating wireless conditions of respective wireless access points of a geographical region, select, based on a performance criterion, an access point of the respective wireless access points, and group the access point and an other access point of the respective wireless access points into a representation of a cluster of access points. Further, an optimization component can derive antenna tilt values for respective access points of the cluster of the access points in response to a simulation of an application of the antenna tilt values to the respective access points. Furthermore, an implementation component can direct the antenna tilt values to respective components of the respective access points. | 06-06-2013 |
Patent application number | Description | Published |
20080294874 | ALLOCATION OF COMBINED OR SEPARATE DATA AND CONTROL PLANES - A dual mesh interconnect network in a heterogeneous configurable circuit may be allocated between data communication and control communication. | 11-27-2008 |
20090086841 | Platform noise mitigation - In one embodiment of the invention, a Fourier transform unit convert a unsynchronized received through multiple antennas to a frequency domain. Also, a spectrum estimation unit determines a power spectrum for the unsynchronized data. A notch filter removes data within a frequency band from additional unsynchronized data based on the power spectrum. A synchronization unit synchronizes the notch filtered data and a noise estimation unit determines a noise covariance matrix between the synchronized data received from multiple antennas. In addition, an equalization unit performs channel equalization on the synchronized data based on the noise covariance matrix. | 04-02-2009 |
20090089851 | Platform noise estimation and mitigation - A method and apparatus for platform noise estimation and mitigation are provided. An embodiment of a method for mitigating noise may include receiving a data signal in a system platform, where the data signal includes a received pseudo noise sequence. Noise on the system platform may be estimated based on the received pseudo noise sequence. In some embodiments the noise on the system platform may be mitigated based on the noise estimate for the system platform. | 04-02-2009 |
20090167945 | DEVICE, SYSTEM, AND METHOD OF MITIGATING INTERFERENCE TO DIGITAL TELEVISION SIGNALS - Device, system, and method of mitigating interference to digital television signals. For example, an apparatus includes a diversity-based digital television receiver having a filter controller and at least first and second channel paths, wherein the first channel path includes a first Global System for Mobile communication (GSM) reject filter, the second channel path includes a second GSM reject filter, the second channel path is parallel to the first channel path, and the filter controller is to selectively switch an operational state of the first GSM reject filter. | 07-02-2009 |
Patent application number | Description | Published |
20090061547 | Landing Pad for Use As a Contact to a Conductive Spacer - A landing pad for use as a contact to a conductive spacer adjacent a structure in a semiconductor device comprises two islands, each of which is substantially rectangularly shaped and is spaced apart from one another and from the structure. Conductive spacers are adjacent to each island and overlapping each other and overlapping with the conductive spacer adjacent to the structure. The contact to the landing pad is on the conductive spacers adjacent to the islands and spaced apart from the structure. | 03-05-2009 |
20140016399 | MEMORY ARCHITECTURES HAVING DENSE LAYOUTS - One embodiment relates to a memory device including a plurality of memory units tiled together to form a memory array. A memory unit includes a plurality of memory cells, which include respective capacitors and respective transistors, disposed on a semiconductor substrate. The capacitors include respective lower plates disposed in a conductive region in the semiconductor substrate. A wordline extends over the conductive region, and a contact couples the wordline to the conductive region so as to couple the wordline to the lower plates of the respective capacitors. The respective transistors are arranged so successive gates of the transistors are arranged on alternating sides of the wordline. | 01-16-2014 |
20140145299 | DEEP TRENCH STRUCTURE FOR HIGH DENSITY CAPACITOR - Some embodiments relate to high density capacitor structures. Some embodiments include a semiconductor substrate having an conductive region with a plurality of trenches formed therein. A first dielectric layer is formed over respective bottom portions and respective sidewall portions of the respective trenches. A first conductive layer is formed in the trench and over the first dielectric layer, wherein the first dielectric layer acts as a first capacitor dielectric between the conductive region and the first conductive layer. A second dielectric layer is formed in the trench and over the first conductive layer. A second conductive layer is formed in the trench and over the second dielectric layer, wherein the second dielectric layer acts as a second capacitor dielectric between the first conductive layer and the second conductive layer. Other embodiments are also disclosed. | 05-29-2014 |
20140167127 | Memory Devices and Methods of Manufacture Thereof - Memory devices and methods of manufacture thereof are disclosed. In one embodiment, a memory device includes a transistor having a gate disposed over a workpiece. The transistor includes a source region and a drain region disposed in the workpiece proximate the gate. The memory device includes an erase gate having a tip portion that extends towards the workpiece. The erase gate is coupled to the gate of the transistor. | 06-19-2014 |
20150016180 | MEMORY ARCHITECTURES HAVING DENSE LAYOUTS - Some embodiments relate to a memory cell to store one or more bits of data. The memory cell includes a capacitor including first and second capacitor plates which are separated from one another by a dielectric. The first capacitor plate corresponds to a doped region disposed in a semiconductor substrate, and the second capacitor plate is a polysilicon or metal layer arranged over the doped region. The memory cell also includes a transistor laterally spaced apart from the capacitor and including a gate electrode arranged between first and second source/drain regions. An interconnect structure is disposed over the semiconductor substrate and couples the gate electrode of the transistor to the second capacitor plate. | 01-15-2015 |
20150098266 | MECHANISMS FOR PREVENTING LEAKAGE CURRENTS IN MEMORY CELLS - Memory cells and operation methods thereof are provided. A memory device includes a number of memory cells. Each of the memory cells includes a first transistor, a switch and a capacitor. The first transistor has a drain connected to a corresponding bit-line. The switch has a first terminal connected to a source of the first transistor and a second terminal coupled to a reference voltage. The capacitor has a first plate and a second plate, and the first plate of the capacitor is electrically connected to a gate of the first transistor. The second plate of the capacitor is connected to a corresponding word line. The switch is turned off when the memory cell is not selected to perform a write operation or a read operation. | 04-09-2015 |
20150132905 | STRUCTURE AND METHOD FOR SINGLE GATE NON-VOLATILE MEMORY DEVICE HAVING A CAPACITOR WELL DOPING DESIGN WITH IMPROVED COUPLING EFFICIENCY - The NVM device includes a semiconductor substrate having a first region and a second region. The NVM device includes a data-storing structure formed in the first region and designed operable to retain charges. The NVM device includes a capacitor formed in the second region and coupled with the data-storing structure for data operations. The data-storing structure includes a first doped well of a first-type in the semiconductor substrate. The data-storing structure includes a first gate dielectric feature on the first doped well. The data-storing structure includes a first gate electrode disposed on the first gate dielectric feature and configured to be floating. The capacitor includes a second doped well of the first-type. The capacitor includes a second gate dielectric feature on the second doped well. The capacitor also includes a second gate electrode disposed on the second gate dielectric feature and connected to the first gate electrode. | 05-14-2015 |
20150311140 | SEMICONDUCTOR STRUCTURE AND FABRICATING METHOD THEREOF - A semiconductor structure and a method for fabricating the same are provided. The semiconductor structure includes a wafer substrate having a top surface and a bottom surface, and a conductive pillar in the wafer substrate defined by a deep trench insulator through the top surface and the bottom surface of the wafer substrate. The method for fabricating the semiconductor structure includes following steps. A deep trench is formed from a top surface of a wafer substrate to define a conductive region in the wafer substrate. The conductive region is doped with a dopant. The deep trench is filled with an insulation material to form a deep trench insulator. And the wafer substrate is thinned from a bottom surface of the wafer substrate to expose the deep trench insulator and isolate the conductive region to form a conductive pillar. | 10-29-2015 |
20160005751 | STRUCTURE AND METHOD FOR SINGLE GATE NON-VOLATILE MEMORY DEVICE - The present disclosure provides an integrated circuit. The integrated circuit includes a substrate; a field effect transistor disposed in a periphery region of the substrate, the field effect transistor including a gate electrode, a first source, a first drain; a floating gate non-volatile memory device disposed in a memory region of the substrate, the floating gate non-volatile memory device including a second source, a third source, and a second drain, wherein the second source, the third source, and the second drain are disposed along an axis; and a floating gate electrode in the memory region including a first portion, a second portion, and a third portion, wherein the first portion, the second portion, and the third portion are electrically connected, wherein the first portion, the second portion and the third portion extend perpendicular to the axis. | 01-07-2016 |
Patent application number | Description | Published |
20140259047 | PROXIMITY DETECTION BY MOBILE DEVICES - A method includes initiating, by a processor of a device, a listening session including listening for a message from a mobile device and receiving the message from the mobile device via a microphone of the device, the message including configuration data for a network, and in response to receiving the message from the mobile device, initiating an access session with the network using the configuration data. In some implementations, the device is coupled to a media player. The media player may be a television. The configuration data may include at least one of an identifier for the network or a password for the network. In some implementations, the initiating occurs only after the device fails to connect to any network. In some implementations, the message is encoded in a sub-sonic signal. | 09-11-2014 |
20140282882 | INDENTIFICATION DELEGATION FOR DEVICES - A first communication session is conducted between a media device and a mobile device. The first communication session includes requesting an authorization code from the mobile device and receiving the authorization code from the mobile device. The mobile device acts as an intermediary for obtaining authentication from a content server. The mobile device initiates a second communication session with a provider authorization service of the content server. The second communication session includes obtaining a token from the provider authorization service using the authorization code. The media device initiates a third communication session with the content server. The third communication session includes utilizing the token to obtain content from the content server. The system automatically attempts to renew the token in response to an expiration of the token. | 09-18-2014 |
20140344689 | SYSTEM FOR UNIVERSAL REMOTE MEDIA CONTROL IN A MULTI-USER, MULTI-PLATFORM, MULTI-DEVICE ENVIRONMENT - A system enables universal remote media control across multiple platforms, devices, and users. A protocol allows a media controller (such as computer or mobile device) to have access to running activities (such as a television show playing on a media player). The protocol does not require installation of a specific platform application, or a specific user-login/pairing of the media controller with the media player. The system receives commands from a media controller device using a common interface, provides the commands to a remote media player, loads new media content into the media player, based on the commands, and receives state notifications from the media player. The commands and the state notifications include a namespace and a message payload represented as a two-element script array. Another user or device can control the media player using the common interface, for example provided by a browser application on the media controller device. | 11-20-2014 |
Patent application number | Description | Published |
20100251278 | MEASUREMENT AND REPORTING OF SET TOP BOX INSERTED AD IMPRESSIONS - Methods are disclosed for measuring ad impressions and receiving feedback on local ad assets inserted into a video transport stream at the set top box level. Each set top box stores the number of times an ad asset is inserted into an ad avail, along with a variety of other information relating to the playback of the ad asset. This measurement data is aggregated and sent to the ad decision service. In order to balance bandwidth usage, each set top box may report its measurement data to the ad decision service at a different time interval that is randomly selected. As it is desirable to receive the data in a timely manner, the random intervals may be confined so that all measurement data is reported within a predefined time period, such as for example over a twelve hour period. | 09-30-2010 |
20100251289 | ADVERTISEMENT INSERTION DECISIONS FOR SET TOP BOX MANAGEMENT OF ADVERTISEMENTS - Methods are disclosed for inserting local ad assets into a video transport stream at the set top box level. The media advertising platform of the present system works in conjunction with existing platforms, such as an advertising decision service and a media platform. The present system further includes a client resident on end user set top boxes. In general, the present system operates by pre-caching advertisements to a set top box or boxes within a household or elsewhere. Each set top box is also assigned to particular groups, based on characteristics of the user of that set top box. Group membership information is also sent to the set top box and stored. The present system sends the set top box a decision matrix based on group memberships to allow the set top box to select and insert an ad asset targeted to the specific set top box. | 09-30-2010 |
20120159338 | MEDIA NAVIGATION VIA PORTABLE NETWORKED DEVICE - Embodiments are disclosed that relate to navigation in a media consumption environment. One embodiment provides, on a portable networked device, a method comprising receiving media metadata from a server via a network, wherein the media metadata corresponds to media content available for viewing. The method further comprises displaying on a display of the portable networked device a user interface presenting the media metadata, receiving a user input via the user interface selecting a media item, and in response, sending a request for the media item to a media rendering device. | 06-21-2012 |
20140362293 | SYSTEMS, METHODS, AND MEDIA FOR PRESENTING MEDIA CONTENT - Systems, methods, and media for presenting media content are provided. In some implementations, a system for presenting media content is provided, the system comprising: a hardware processor that is programmed to: establish a connection with a media playback device; respond to a discovery request from a computing device presenting a media content item; establish a persistent communication channel with the computing device over a network in response to a request from the computing device to establish the persistent communication channel; receive identifying information of the media content item being presented by the computing device and identifying information of a source of the media content item being presented by the computing device; request the media content item from the identified source of the media content item as a stream of media content; and cause the media content item to be presented using the media playback device. | 12-11-2014 |
20150188899 | METHODS, SYSTEMS, AND MEDIA FOR PROVIDING ACCESS CONTROL FOR A COMPUTING DEVICE - Methods, systems, and media for providing access control for a computing device are provided. In some implementations, methods for providing access control for a computing device are provided, the methods comprising: receiving a first request to authenticate the computing device from a first sender device; authenticating the computing device based at least in part on the first request; transmitting a session identifier and a session key to the first sender device; receiving an application identifier associated with the sender device from the computing device; determining, using a hardware processor, whether a sender application executing on the sender device is valid based at least in part on the application identifier; and transmitting the session key to the computing device in response to determining that the sender application is valid. | 07-02-2015 |
Patent application number | Description | Published |
20120202788 | AZABENZOTHIAZOLE COMPOUNDS, COMPOSITIONS AND METHODS OF USE - Provided are compounds of Formula I, stereoisomers, tautomers, solvates, prodrugs and pharmaceutically acceptable salts thereof, wherein A, X, R | 08-09-2012 |
20130079321 | PYRAZOL-4-YL-HETEROCYCLYL-CARBOXAMIDE COMPOUNDS AND METHODS OF USE - Pyrazol-4-yl-heterocyclyl-carboxamide compounds of Formula I, including stereoisomers, geometric isomers, tautomers, and pharmaceutically acceptable salts thereof, wherein X is thiazolyl, pyrazinyl, pyridinyl, or pyrimidinyl, are useful for inhibiting Pim kinase, and for treating disorders such as cancer mediated by Pim kinase. Methods of using compounds of Formula I for in vitro, in situ, and in vivo diagnosis, prevention or treatment of such disorders in mammalian cells, or associated pathological conditions, are disclosed. | 03-28-2013 |
20130096104 | IMIDAZOPYRIDINE COMPOUNDS, COMPOSITIONS AND METHODS OF USE - The invention provides compounds of Formulas Ia-Ib, stereoisomers or pharmaceutically acceptable salts thereof, wherein A, X, R | 04-18-2013 |
20140005168 | 5-AZAINDAZOLE COMPOUNDS AND METHODS OF USE | 01-02-2014 |
20140080801 | PYRAZOL-4-YL-HETEROCYCLYL-CARBOXAMIDE COMPOUNDS AND METHODS OF USE - Pyrazol-4-yl-heterocyclyl-carboxamide compounds of Formula I, including stereoisomers, geometric isomers, tautomers, and pharmaceutically acceptable salts thereof, wherein X is thiazolyl, pyrazinyl, pyridinyl, or pyrimidinyl, are useful for inhibiting Pim kinase, and for treating disorders such as cancer mediated by Pim kinase. Methods of using compounds of Formula I for in vitro, in situ, and in vivo diagnosis, prevention or treatment of such disorders in mammalian cells, or associated pathological conditions, are disclosed. | 03-20-2014 |
20140206702 | IMIDAZOPYRIDINE COMPOUNDS, COMPOSITIONS AND METHODS OF USE - The invention provides compounds of Formulas Ia-Ib, stereoisomers or pharmaceutically acceptable salts thereof, wherein A, X, R | 07-24-2014 |