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| 20100299743 | SESSION INITIATION AND MAINTENANCE WHILE ROAMING - The technology disclosed addresses initiation of peer-to-peer media exchange sessions, with traversal of NAT and firewall devices, in a manner adapted to roaming. In particular, involves preliminary determination of NAT/firewall topology, which reduces latency at initiation, and hole punching technologies to select a routing and traversal strategy that reduce reliance on external media relay devices. | 11-25-2010 |
| 20130067101 | SESSION INITIATION AND MAINTENANCE WHILE ROAMING - The technology disclosed addresses initiation of peer-to-peer media exchange sessions, with traversal of NAT and firewall devices, in a manner adapted to roaming. In particular, involves preliminary determination of NAT/firewall topology, which reduces latency at initiation, and hole punching technologies to select a routing and traversal strategy that reduce reliance on external media relay devices. | 03-14-2013 |
| 20150096048 | ALTERNATE FILES RETURNED FOR SUSPICIOUS PROCESSES IN A COMPROMISED COMPUTER NETWORK - Methods and systems are presented of presenting false and/or decoy content to an intruder operating on a computer system by obfuscating critical files on a computer storage device with data that directs subsequent infiltration and propagation to designated decoy hosts and decoy applications. | 04-02-2015 |
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| 20100026697 | PROCESSING RASTERIZED DATA - Devices, methods, and other embodiments associated with processing rasterized data are described. In one embodiment, an apparatus includes translation logic for converting lines of rasterized pixel data of a compressed image to a plurality of two-dimensional data blocks. The lines of rasterized pixel data are stored in consecutive memory locations. Each data block is stored in a consecutive memory location. The apparatus includes decompression logic for at least partially decompressing the compressed image based, at least in part, on the two-dimensional data blocks. | 02-04-2010 |
| 20100095307 | SELF-SYNCHRONIZING HARDWARE/SOFTWARE INTERFACE FOR MULTIMEDIA SOC DESIGN - A forced lock-step operation between a CPU (software) and the hardware is eliminated by unburdening the CPU from monitoring the hardware until it is finished with its task. This is done by providing a data/control message queue into which the CPU writes combined data/control messages and places an End tag into the queue when finished. The hardware checks the content of the message queue and starts decoding the incoming data. The hardware processes the data read from the message queue and the processed data is then written back into the message queue for use by the software. The hardware raises an interrupt signal to the CPU when reaching the End tag. Speed differences between hardware and software can be compensated for by changing the depth of the queue. | 04-15-2010 |
| 20100325334 | HARDWARE ASSISTED INTER-PROCESSOR COMMUNICATION - An external memory based FIFO (xFIFO) apparatus coupled to an external memory and a register bus is disclosed. The xFIFO apparatus includes an xFIFO engine, a wDMA engine, an rDMA engine, a first virtual FIFO, and a second virtual FIFO. The xFIFO engine receives a FIFO command from the register bus and generates a writing DMA command and a reading DMA command. The wDMA engine receives the writing DMA command from the xFIFO engine and forwards an incoming data to the external memory. The rDMA engine receives the reading DMA command from the xFIFO engine and pre-fetches a FIFO data from the external memory. The wDMA engine and the rDMA engine synchronize with each other via the first virtual FIFO and the second virtual FIFO. | 12-23-2010 |
| 20130287119 | PROCESSING RASTERIZED DATA - Devices, methods, and other embodiments associated with processing rasterized data are described. In one embodiment, an apparatus includes translation logic for converting lines of rasterized pixel data of a compressed image to a plurality of two-dimensional data blocks. The lines of rasterized pixel data are stored in consecutive memory locations. Each data block is stored in a consecutive memory location. The apparatus includes decompression logic for at least partially decompressing the compressed image based, at least in part, on the two-dimensional data blocks. | 10-31-2013 |
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| 20100100860 | METHOD AND APPARATUS FOR DEBUGGING AN ELECTRONIC SYSTEM DESIGN (ESD) PROTOTYPE - Using a vector-based emulation technique, a hardware-based prototyping system reduces time-consuming recompilation and reduces the iteration time for a verification run. The vector-based emulation technique takes advantage of information derived from user-defined probe points, automatically generated probe points and low-latency snapshots. Using a bounded-cycle simulation technique, the hardware-based prototyping system can provide complete or partial simulation traces covering interested signals and can efficiently evaluates assertions. A user is therefore able to debug in a real system test and to identify causes of fault conditions interactively under a controlled vector debugging environment. | 04-22-2010 |
| 20100305933 | Method and Apparatus for Verifying Logic Circuits Using Vector Emulation with Vector Substitution - A method for verifying a logic circuit in a prototyping system includes (a) configuring programmable logic circuits of the prototyping system to implement the logic circuit and to implement probe circuits for accessing internal nodes of the logic circuit; (b) preparing emulation vectors for use in a vector emulation of the logic circuit in the prototyping system; (c) setting one or more vector substitution points; (d) preparing one or more packet vectors at each vector substitution point for replacing emulation vectors in the vector emulation; (e) performing the vector emulation using the emulation vectors until one of the vector substitution points is reached; and (f) substituting packet vectors for the corresponding emulation vectors at vector substitution point and continuing the vector emulation. | 12-02-2010 |
| 20110289469 | VIRTUAL INTERCONNECTION METHOD AND APPARATUS - A prototyping system includes (i) a vector processor having an interface for communicating with a host processor and a second interface (e.g., a vector processor bus) for dispatching vectors; (ii) a number of programmable logic circuits each coupled to the second interface to receive the dispatched vectors; and (iii) a compiler for (a) partitioning an electronic circuit into multiple partitions, assigning each partition to one of the programmable logic circuits, (b) providing multiple connections each provided for connecting signals among the partitions, (c) providing in each programmable logic circuit an interface circuit module that manages the connections among partitions using a virtual interconnection technique, and (d) assigning the physical interconnection resources, such as pins of the programmable logic circuits and physical wires on the boards. First and further assigns at least one virtual interconnection (secondary I/O) between partitions to realize the connections among partitions. The prototyping system is associated with a method for prototyping an electronic design, which includes (i) compiling an electronic design into (a) multiple partitions, each partition being compiled for implementation in a programmable logic circuit (e.g., a field programmable gate array integrated circuit), and (b) multiple connections that connect signals between the partition; and (ii) compiling into each programmable logic circuit an interface circuit module for managing the connections using a virtual interconnection technique. | 11-24-2011 |
| 20120005547 | SCALABLE SYSTEM DEBUGGER FOR PROTOTYPE DEBUGGING - A prototype debugging system controlled by a host processor over a host bus includes: (a) a vector processor interface bus; (b) one or more programmable logic circuits, at least one of which provided to implement: (i) a logic circuit under verification; (ii) one or more programmable embedded debug circuits each receiving a first group of selected signals from the logic circuit under verification and providing control signals for (1) selecting a portion of the first group of selected signals, or (2) affecting the values of a second group of selected signals in the logic circuit under verification based on a portion of the first group of selected signals satisfying a predetermined triggering condition, wherein the programmable embedded debug circuits each including a built-in memory for storing signal vectors, the programmable embedded debug circuits each being configured according to a trigger specification defining one or more trigger states and triggering conditions; and (iii) a local debugging controller that controls programmable embedded debug circuits and transfers signal vectors between the built-in memories of the programmable embedded debug circuits and the vector processor interface bus; and (c) a vector processor which controls transferring of signal vectors between the host processor and the vector processor interface bus. | 01-05-2012 |
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| 20140260617 | FULLY DIFFERENTIAL CAPACITIVE ARCHITECTURE FOR MEMS ACCELEROMETER - A fully differential microelectromechanical system (MEMS) accelerometer configured to measure Z-axis acceleration is disclosed. This may avoid some of the disadvantages in traditional capacitive sensing architectures—for example, less sensitivity, low noise suppression, and low SNR, due to Brownian noise. In one embodiment, the accelerometer comprises three silicon wafers, fabricated with electrodes forming capacitors in a fully differential capacitive architecture. These electrodes may be isolated on a layer of silicon dioxide. In some embodiments, the accelerometer also includes silicon dioxide layers, piezoelectric structures, getter layers, bonding pads, bonding spacers, and force feedback electrodes, which may apply a force to the proof mass region. Fully differential MEMS accelerometers may be used in geophysical surveys, e.g., for seismic sensing or acoustic positioning. | 09-18-2014 |
| 20140260618 | FORCE FEEDBACK ELECTRODES IN MEMS ACCELEROMETER - A microelectromechanical system (MEMS) accelerometer having separate sense and force-feedback electrodes is disclosed. The use of separate electrodes may in some embodiments increase the dynamic range of such devices. Other possible advantages include, for example, better sensitivity, better noise suppression, and better signal-to-noise ratio. In one embodiment, the accelerometer includes three silicon wafers, fabricated with sensing electrodes forming capacitors in a fully differential capacitive architecture, and with separate force feedback electrodes forming capacitors for force feedback. These electrodes may be isolated on a layer of silicon dioxide. In some embodiments, the accelerometer also includes silicon dioxide layers, piezoelectric structures, getter layers, bonding pads, bonding spacers, and force feedback electrodes, which may apply a restoring force to the proof mass region. MEMS accelerometers with force-feedback electrodes may be used in geophysical surveys, e.g., for seismic sensing or acoustic positioning. | 09-18-2014 |
| 20150293142 | FULLY DIFFERENTIAL CAPACITIVE ARCHITECTURE FOR MEMS ACCELEROMETER - A fully differential microelectromechanical system (MEMS) accelerometer configured to measure Z-axis acceleration is disclosed. This may avoid some of the disadvantages in traditional capacitive sensing architectures—for example, less sensitivity, low noise suppression, and low SNR, due to Brownian noise. In one embodiment, the accelerometer comprises three silicon wafers, fabricated with electrodes forming capacitors in a fully differential capacitive architecture. These electrodes may be isolated on a layer of silicon dioxide. In some embodiments, the accelerometer also includes silicon dioxide layers, piezoelectric structures, getter layers, bonding pads, bonding spacers, and force feedback electrodes, which may apply a force to the proof mass region. Fully differential MEMS accelerometers may be used in geophysical surveys, e.g., for seismic sensing or acoustic positioning. | 10-15-2015 |
| 20150298965 | ALUMINUM NITRIDE (AlN) DEVICES WITH INFRARED ABSORPTION STRUCTURAL LAYER - A micro-electro-mechanical system device is disclosed. The micro-mechanical system device comprises a first silicon substrate comprising: a handle layer comprising a first surface and a second surface, the second surface comprises a cavity; an insulating layer deposited over the second surface of the handle layer; a device layer having a third surface bonded to the insulating layer and a fourth surface; a piezoelectric layer deposited over the fourth surface of the device layer; a metal conductivity layer disposed over the piezoelectric layer; a bond layer disposed over a portion of the metal conductivity layer; and a stand-off formed on the first silicon substrate; wherein the first silicon substrate is bonded to a second silicon substrate, comprising: a metal electrode configured to form an electrical connection between the metal conductivity layer formed on the first silicon substrate and the second silicon substrate. | 10-22-2015 |
| 20150321906 | INTEGRATED PACKAGE CONTAINING MEMS ACOUSTIC SENSOR AND ENVIRONMENTAL SENSOR AND METHODOLOGY FOR FABRICATING SAME - An integrated package of at least one environmental sensor and at least one MEMS acoustic sensor is disclosed. The package contains a shared port that exposes both sensors to the environment, wherein the environmental sensor measures characteristics of the environment and the acoustic sensor measures sound waves. The port exposes the environmental sensor to an air flow and the acoustic sensor to sound waves. An example of the acoustic sensor is a microphone and an example of the environmental sensor is a humidity sensor. | 11-12-2015 |
| 20150357375 | INTEGRATED PIEZOELECTRIC MICROELECTROMECHANICAL ULTRASOUND TRANSDUCER (PMUT) ON INTEGRATED CIRCUIT (IC) FOR FINGERPRINT SENSING - Microelectromechanical (MEMS) devices and associated methods are disclosed. Piezoelectric MEMS transducers (PMUTs) suitable for integration with complementary metal oxide semiconductor (CMOS) integrated circuit (IC), as well as PMUT arrays having high fill factor for fingerprint sensing, are described. | 12-10-2015 |
| 20150358740 | ELECTRICAL TUNING OF PARAMETERS OF PIEZOELECTRIC ACTUATED TRANSDUCERS - Parameters, such as, quality factor and/or resonance frequency of an acoustic transducer can be electrically tuned. The acoustic transducer can include a piezoelectric layer deposited on a silicon supporting layer, a first electrode layer deposited on the piezoelectric layer, and a second electrode layer deposited between the silicon supporting layer and piezoelectric layer. In one aspect, a resonant frequency of the piezoelectric actuated transducer is electrically tuned based on modifying a voltage across at least a portion of the first electrode layer and the second electrode layer. In another aspect, a quality factor of the piezoelectric actuated transducer is electrically tuned based on modifying a resistance across at least another portion of the first electrode layer and the second electrode layer. | 12-10-2015 |
| 20150362589 | ANTI-SCRATCHING PROTECTION FOR ACOUSTIC SENSORS - An acoustic sensing element of an acoustic sensor and/or transducer can be covered with a composite material comprising a cover material and an anti-scratch material. In one aspect, an acoustic impedance of the cover material is lower than an acoustic impedance of the anti-scratch material. During acoustical sensing, the acoustic sensing element transmits an ultrasonic signal through the cover material and the anti-scratch material, which interferes with an object on (or near) the surface of the anti-scratch material. An interference signal that is generated based on an interference of the ultrasonic signal with the object propagates through the anti-scratch material and the cover material and is sensed by the acoustic sensing element. Further, an image of the object is recreated based on an analysis of the interference signal. | 12-17-2015 |
| 20160041047 | PIEZOELECTRIC ACOUSTIC RESONATOR BASED SENSOR - A piezoelectric acoustic resonator based sensor is presented herein. A device can include an array of piezoelectric transducers and an array of cavities that has been attached to the array of piezoelectric transducers to form an array of resonators. A resonator of the array of resonators can be associated with a first frequency response corresponding to a first determination that the resonator has been touched, and a second frequency response corresponding to a second determination that the resonator has not been touched. The array of piezoelectric transducers can include a piezoelectric material; a first set of electrodes that has been formed a first side of the piezoelectric material; and a second set of electrodes that has been formed on second side of the piezoelectric material. | 02-11-2016 |
| 20160090300 | PIEZOELECTRIC MICROPHONE WITH INTEGRATED CMOS - A piezoelectric microphone and/or a piezoelectric microphone system is presented herein. In an implementation, a piezoelectric microphone includes a microelectromechanical systems (MEMS) layer and a complementary metal-oxide-semiconductor (CMOS) layer. The MEMS layer includes at least one piezoelectric layer and a conductive layer. The conductive layer is deposited on the at least one piezoelectric layer and is associated with at least one sensing electrode. The CMOS layer is deposited on the MEMS layer. Furthermore, a cavity formed in the CMOS layer includes the at least one sensing electrode | 03-31-2016 |
| 20160091378 | MICROELECTROMECHANICAL SYSTEMS (MEMS) PRESSURE SENSOR HAVING A LEAKAGE PATH TO A CAVITY - Microelectromechanical systems (MEMS) pressure sensors having a leakage path are described. Provided implementations can comprise a MEMS pressure sensor system associated with a back cavity and a membrane that separates the back cavity and an ambient atmosphere. A pressure of the ambient atmosphere is determined based on a parameter associated with movement of the membrane. | 03-31-2016 |
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| 20100083142 | Presence Change Alert - An apparatus and a method for monitoring availability of a contact are described. The apparatus includes an interface module for receiving a selection from a user that indicates the contact to be monitored. The apparatus also includes a presence change alert manager that is coupled to the interface module and is coupled to a network. The presence changer alert manager is configured to determine at least one relevant type of availability for the contact and to determine if availability information obtained from the network corresponds to a change in a relevant type of availability for the contact. The apparatus further includes a notification manager coupled to the presence change alert manager. If the presence change alert manager determines that the obtained availability information corresponds to a change of a relevant type of availability for the contact, the notification manager generates a notification alerting the user of the change. | 04-01-2010 |
| 20110075828 | MAINTAINING HISTORY INFORMATION FOR A USER ACROSS MULTIPLE TYPES OF END POINTS - A system for providing enhanced history information across multiple clients comprises a call application server having a history system, a telephony system and a history cache. The call application server advantageously maintains a history records for each user of the system. The enhanced history system is particularly advantageous because regardless of the endpoint (e.g., phone, thin client, personal call manager or standalone IP phone) with which the user is interacting, the history information specifically for that user is delivered by the call application server to that endpoint. Furthermore, the call application server allows the user to access history information using end points which heretofore were unable to provide history functionality. Finally, the call application server makes the history records universal across all endpoints with which the user interacts, in contrast to prior art, which had limited call history information specific to a particular endpoint. | 03-31-2011 |
| 20150055511 | MAINTAINING HISTORY INFORMATION FOR A USER ACROSS MULTIPLE TYPES OF END POINTS - A system for providing enhanced history information across multiple clients comprises a call application server having a history system, a telephony system and a history cache. The call application server advantageously maintains a history records for each user of the system. The enhanced history system is particularly advantageous because regardless of the endpoint (e.g., phone, thin client, personal call manager or standalone IP phone) with which the user is interacting, the history information specifically for that user is delivered by the call application server to that endpoint. Furthermore, the call application server allows the user to access history information using end points which heretofore were unable to provide history functionality. Finally, the call application server makes the history records universal across all endpoints with which the user interacts, in contrast to prior art, which had limited call history information specific to a particular endpoint. | 02-26-2015 |
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| 20080301623 | Lithography Suspect Spot Location and Scoring System - A fast method to detect hot spots using foundry independent models that do not require RET/OPC synthesis is presented. In some embodiments of the present invention, sensitive spots are located. Lithography models are used to simulate the geometry near the sensitive spots to produce a model of the area around the sensitive spots. The sensitive spots are scored using a measure such as intensity (of light) or scoring based on contrast. | 12-04-2008 |
| 20100014199 | ELECTROSTATIC-DISCHARGE PROTECTION USING A MICRO-ELECTROMECHANICAL-SYSTEM SWITCH - Embodiments of an interface circuit are described. This interface circuit includes an input pad, a control node and a transistor, which has three terminals. A first terminal is electrically coupled to the input pad and a second terminal is electrically coupled to the control node. Moreover, the interface circuit includes a micro-electromechanical system (MEMS) switch, which is electrically coupled to the input pad and the control node, where the MEMS switch is in parallel with the transistor. In the absence of a voltage applied to a control terminal of the MEMS switch, the MEMS switch is closed, thereby electrically coupling the input pad and the control node. Furthermore, when the voltage is applied to the control terminal of the MEMS switch, the MEMS switch is open, thereby electrically decoupling the input pad and the control node. | 01-21-2010 |
| 20110173578 | Method and Apparatus for Enhancing Signal Strength for Improved Generation and Placement of Model-Based Sub-Resolution Assist Features (MB-SRAF) - Model-Based Sub-Resolution Assist Feature (SRAF) generation process and apparatus are disclosed, in which an SRAF guidance map (SGM) is iteratively optimized to finally output an optimized set of SRAFs as a result of enhanced signal strength obtained by iterations involving SRAF polygons and SGM image. SRAFs generated in a prior round of iteration are incorporated in a mask layout to generate a subsequent set of SRAFs. The iterative process is terminated when a set of SRAF accommodates a desired process window or when a predefined process window criterion is satisfied. Various cost functions, representing various lithographic responses, may be predefined for the optimization process. | 07-14-2011 |
| 20120216156 | Method of Pattern Selection for Source and Mask Optimization - The present invention relates to a method of selecting a subset of patterns from a design, to a method of performing source and mask optimization, and to a computer program product for performing the method of selecting a subset of patterns from a design. According to certain aspects, the present invention enables coverage of the full design while lowering the computation cost by intelligently selecting a subset of patterns from a design in which the design or a modification of the design is configured to be imaged onto a substrate via a lithographic process. The method of selecting the subset of patterns from a design includes identifying a set of patterns from the design related to the predefined representation of the design. By selecting the subset of patterns according to the method, the selected subset of patterns constitutes a similar predefined representation of the design as the set of patterns. | 08-23-2012 |
| 20130000505 | Method and Apparatus for Cost Function Based Simultaneous OPC and SBAR Optimization - Described herein is a method for obtaining a preferred layout for a lithographic process, the method comprising: identifying an initial layout including a plurality of features; and reconfiguring the features until a termination condition is satisfied, thereby obtaining the preferred layout; wherein the reconfiguring comprises evaluating a cost function that measures how a lithographic metric is affected by a set of changes to the features for a plurality of lithographic process conditions, and expanding the cost function into a series of terms at least some of which are functions of characteristics of the features. | 01-03-2013 |
| 20130311960 | METHOD AND APPARATUS FOR ENHANCING SIGNAL STRENGTH FOR IMPROVED GENERATION AND PLACEMENT OF MODEL-BASED SUB-RESOLUTION ASSIST FEATURES (MB-SRAF) - Model-Based Sub-Resolution Assist Feature (SRAF) generation process and apparatus are disclosed, in which an SRAF guidance map (SGM) is iteratively optimized to finally output an optimized set of SRAFs as a result of enhanced signal strength obtained by iterations involving SRAF polygons and SGM image. SRAFs generated in a prior round of iteration are incorporated in a mask layout to generate a subsequent set of SRAFs. The iterative process is terminated when a set of SRAF accommodates a desired process window or when a predefined process window criterion is satisfied. Various cost functions, representing various lithographic responses, may be predefined for the optimization process. | 11-21-2013 |
| 20140359543 | METHOD AND APPARATUS FOR COST FUNCTION BASED SIMULTANEOUS OPC AND SBAR OPTIMIZATION - Described herein is a method for obtaining a preferred layout for a lithographic process, the method comprising: identifying an initial layout including a plurality of features; and reconfiguring the features until a termination condition is satisfied, thereby obtaining the preferred layout; wherein the reconfiguring comprises evaluating a cost function that measures how a lithographic metric is affected by a set of changes to the features for a plurality of lithographic process conditions, and expanding the cost function into a series of terms at least some of which are functions of characteristics of the features. | 12-04-2014 |
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| 20150370844 | PROCESSING MUTATIONS FOR A REMOTE DATABASE - Methods, systems, and apparatus are described for processing mutations for a remote database. In one aspect, a method includes receiving a log of database mutations from a client device, the log of database mutations indicating changes previously made to a client version of a database stored on the client device, and each database mutation specifying: an entity included in the database; an operation for the entity; and a client version number for the entity; identifying, in the log of database mutations, two or more database mutations that each specify a same client version number for a same entity; determining, based on a conflict resolution policy, that the two or more database mutations are eligible for collapsing; and collapsing the two or more database mutations into a single database mutation. | 12-24-2015 |
| 20160048554 | PROCESSING MUTATIONS FOR A REMOTE DATABASE - Methods, systems, and apparatus are described for processing mutations for a remote database. In one aspect, a method includes receiving a log of database mutations from a client device, the log of database mutations indicating changes previously made to a client version of a database stored on the client device, and each database mutation specifying: an entity included in the database; an operation for the entity; and a client version number for the entity; identifying, in the log of database mutations, two or more database mutations that each specify a same client version number for a same entity; determining, based on a conflict resolution policy, that the two or more database mutations are eligible for collapsing; and collapsing the two or more database mutations into a single database mutation. | 02-18-2016 |
| 20160048570 | PROCESSING MUTATIONS FOR A REMOTE DATABASE - Methods, systems, and apparatus are described for processing mutations for a remote database. In one aspect, a method includes receiving a log of database mutations from a client device, the log of database mutations indicating changes previously made to a client version of a database stored on the client device, and each database mutation specifying: an entity included in the database; an operation for the entity; and a client version number for the entity; identifying, in the log of database mutations, two or more database mutations that each specify a same client version number for a same entity; determining, based on a conflict resolution policy, that the two or more database mutations are eligible for collapsing; and collapsing the two or more database mutations into a single database mutation. | 02-18-2016 |
