Patent application number | Description | Published |
20120290376 | PROCESSING ELECTRONIC PAYMENT INVOLVING MOBILE COMMUNICATION DEVICE - Mobile payments and processing data related to electronic transactions. A near field communication connection is established between a mobile communication device of a consumer that serves as a mobile wallet and an electronic payment device of a merchant. Authorization data is shared between the mobile communication device and the electronic payment device without providing electronic payment instrument (e.g. credit card) data to the merchant. Authorization data is transmitted from the mobile communication device to a cloud computer or resource that serves as a cloud wallet and hosts respective data of respective electronic payment instruments of respective consumers, and from the electronic payment device a payment processor computer. The payment processor computer presents the authorization data to the cloud wallet, and in response, the cloud wallet transmits the credit card data to the payment processor computer, which processes the transaction. | 11-15-2012 |
20120324559 | ESTABLISHING A SECURE CONNECTION BASED ON A JOINT GESTURE - During a transaction, an electronic device (such as a cellular telephone) captures a gesture performed by a user of the electronic device. This gesture is analyzed to determine salient features, such as accelerations of the electronic device during the gesture and associated time intervals. Then, the electronic device generates a token based on the salient features, and provides the token to a server. When a second token, associated with the token, is received by the server from a second electronic device, the server establishes a secure connection between the electronic device and the second electronic device. | 12-20-2012 |
20130179353 | SECURE FINANCIAL TRANSACTIONS USING MULTIPLE COMMUNICATION TECHNOLOGIES - During a financial technique, electronic devices may exchange, using a first communication technique, information with each other to establish a secure connection between the electronic devices when they are proximate to each other. After the secure connection is established, the electronic devices may hand off communication with each other from the first communication technique to a second communication technique that supports communication at a higher data rate and over longer distances than the first communication technique. Moreover, the electronic devices may communicate, using the second communication technique and the secure connection, additional information associated with the financial transaction with each other to facilitate completion of the financial transaction. | 07-11-2013 |
20130179561 | RULE-BASED CLASSIFICATION OF ELECTRONIC DEVICES - The disclosed embodiments provide a system that facilitates interaction between an electronic device and a content provider. During operation, the system obtains a device profile containing a set of properties for the electronic device and a set of classification rules associated with the content provider. Next, the system identifies a device class of the electronic device based on the device profile and the classification rules. Finally, the system provides the device class to the content provider, wherein the content provider selects content to transmit to the electronic device based on the device class. | 07-11-2013 |
20130185123 | METHOD AND SYSTEM FOR AUTOMATED TRANSPORTATION USE TRACKING AND BILLING - A user registers with an automated transportation use and billing system. The user's geographical location/position is monitored and periodically compared with the geographical location/position of one or more public transportation systems. When a determination is made that the user's geographical location/position is the same as the geographical location/position of a public transportation system, an assumption is made that the user is making use of the public transportation system and once the user's geographical location/position data differs from the public transportation system's geographical location/position data, it is further assumed that the user is no longer making use of the public transportation system. Data indicating the users assumed use of the public transportation system, calculated as described above, is then recorded and credited to the user's account. | 07-18-2013 |
Patent application number | Description | Published |
20090175270 | TELEPHONE RECORDING AND STORING ARBITRARY KEYSTROKES SEQUENCE WITH REPLAY WITH A SINGLE STROKE - A telephone is described that allows any arbitrary combination of key strokes, including numerical keys, extension keys, as well as function keys such as TRANSFER, CONFERENCE, etc., to be programmed such that the entire sequence of key strokes can be recalled with the touch of a single button. The phone can be programmed directly by operation of the telephone user interface on the phone (i.e., the keys, phone display, and speaker prompting the user) and a program button dedicated to the feature of programming a separate programmable button to map to the specified key sequence. The feature can be implemented in advanced telephones capable of voice over Internet Protocol networks, and supporting the Session Initiation Protocol. In these more advanced phones, the programming can be done by a system administrator or by the user of the phone via a computer with internet access. | 07-09-2009 |
20090245239 | PERFORMING OPERATIONS ON IP TELEPHONY DEVICE FROM A REMOTE CLIENT - A method and system for remotely accessing an intelligent IP telephony device is provided. Information about at least one IP telephony device associated with a user is stored in a database. The database is accessible to a user through a secured environment. From a remote location, the user may logon to the database and select one or more actions to be performed on any of the IP telephony devices to which they have access. | 10-01-2009 |
20110267986 | IP-BASED ENHANCED EMERGENCY SERVICES USING INTELLIGENT CLIENT DEVICES - Providing enhanced emergency services (E-911) to an IP Telephony-based PBX or similar system, by utilizing aspects of the intelligence of end-user SIP client devices to address challenges and difficulties associated with E-911-like services in LAN-based telephony environments. | 11-03-2011 |
20130054838 | METHOD AND SYSTEM FOR SELECTING A DATA COMPRESSION TECHNIQUE FOR DATA TRANSFER THROUGH A DATA NETWORK - A method and system for selecting a data compression technique for data transfer through a data network is provided. During call setup, information is gathered from the network infrastructure by receiving feedback from smart network devices, reviewing calls logs, or by accessing a network topology database, and the information can then be used to select a desired compression technique. During a call, a media terminating end device or a call control server will monitor call connection performance specific to the data transfer pathway used for the call connection, and may adjust the data compression to conform with the performance that the connection is providing at any given moment. Performance parameters such as delay, jitter, and compression ratios can be measured in real-time for a call to determine if a change in compression is deemed beneficial. In this manner, the compression method can be chosen based on real time network performance. | 02-28-2013 |
20130246658 | METHOD AND SYSTEM FOR SELECTING A DATA COMPRESSION TECHNIQUE FOR DATA TRANSFER THROUGH A DATA NETWORK - A method and system for selecting a data compression technique for data transfer through a data network is provided. During call setup, information is gathered from the network infrastructure by receiving feedback from smart network devices, reviewing calls logs, or by accessing a network topology database, and the information can then be used to select a desired compression technique. During a call, a media terminating end device or a call control server will monitor call connection performance specific to the data transfer pathway used for the call connection, and may adjust the data compression to conform with the performance that the connection is providing at any given moment. Performance parameters such as delay, jitter, and compression ratios can be measured in real-time for a call to determine if a change in compression is deemed beneficial. In this manner, the compression method can be chosen based on real time network performance. | 09-19-2013 |
Patent application number | Description | Published |
20080279120 | Systems and Methods for Receiver Upgrade - Systems and methods for an upgradeable and/or reconfigurable receiver are provided. In general, the present invention is directed to providing systems and methods for designing an electronic communication system having easy and cost effective upgradeable receiver systems and components including, for example, an amplifier and/or a filter. For example, a receiver may include a receiver front end that is configured so that at least one of the original conventional system components may be used along with one or more new system components to provide greater receiver sensitivity and/or selectivity. In various embodiments, portions of an upgradeable receiver system may be made as modular components that allow easy replacement for the upgradeable components which may include a signal amplifier and/or a signal filter. In various embodiments the receiver may be upgraded by replacing a conventional low noise amplifier (LNA) with a high temperature superconductor (HTS) filter and/or a cryo-cooled LNA. | 11-13-2008 |
20090254070 | APPARATUS AND METHODS FOR PERFORMING ENHANCED VISUALLY DIRECTED PROCEDURES UNDER LOW AMBIENT LIGHT CONDITIONS - The apparatus and methods of the present invention in a broad aspect provide novel visualization platforms for performing enhanced visually directed procedures on target objects or tissues under low ambient light conditions. The visualization platforms can be included with or retro-fit to existing optical systems such as stereomicroscopes and include at least one high resolution photosensor capable of acquiring a plurality of optical views of the target object or tissue in at least one wavelength outside of the wavelengths of normal visible light. A resultant real-time high resolution video signal is transmitted from the photosensor to at least one high resolution video display that can be viewed by the apparatus or process operator. | 10-08-2009 |
20100094262 | REAL-TIME SURGICAL REFERENCE INDICIUM APPARATUS AND METHODS FOR SURGICAL APPLICATIONS - Described herein are apparatus and associated methods for the generation of at least one user adjustable, accurate, real-time, virtual surgical reference indicium. The apparatus includes one or more real-time, multidimensional visualization modules, one or more processors configured to produce real-time, virtual surgical reference indicia, and at least one user control input for adjusting the at least one real-time virtual surgical reference indicium. The associated methods generally involve the steps of providing one or more real-time multidimensional visualizations of a target surgical field, identifying at least one visual feature in a pre-operative dataset, aligning the visual features with the multidimensional visualization, and incorporating one or more real-time, virtual surgical reference indicium into the real-time visualization. In exemplary embodiments, the apparatus and methods are described in relation to ocular surgery, more specifically capsulorrhexis. | 04-15-2010 |
20100217278 | REAL-TIME SURGICAL REFERENCE INDICIUM APPARATUS AND METHODS FOR INTRAOCULAR LENS IMPLANTATION - Described herein are apparatus and associated methods for the generation of at least one user adjustable, accurate, real-time, virtual surgical reference indicium including natural patient vertical for use in ocular surgery. The apparatus used to generate real-time, virtual surgical reference indicium including natural patient vertical includes one or more real-time, multidimensional visualization modules, one or more data processors configured to produce real-time, virtual surgical reference indicia, and at least one user control input for adjusting the at least one real-time virtual surgical reference indicium including natural patient vertical. The associated methods generally involve the steps of providing one or more real-time multidimensional visualizations of a target surgical field, identifying at least one visual feature in a pre-operative dataset, aligning the visual features with the multidimensional visualization, and incorporating one or more real-time, virtual surgical reference indicium including natural patient vertical into the real-time visualization. | 08-26-2010 |
20110092984 | Real-time Surgical Reference Indicium Apparatus and Methods for Astigmatism Correction - Described herein are apparatus and associated methods for the generation of at least one user adjustable, accurate, real-time, virtual surgical reference indicium including data for making at least one limbal and/or corneal relaxing incision for use in astigmatism correcting procedures. The apparatus used to generate real-time, virtual surgical reference indicium including data for making at least one limbal and/or corneal relaxing incision includes one or more real-time, multidimensional visualization modules, one or more data processors configured to produce real-time, virtual surgical reference indicia, and at least one user control input for adjusting the at least one real-time virtual surgical reference indicium including data for making at least one limbal and/or corneal relaxing incision. The associated methods generally involve the steps of providing one or more real-time multidimensional visualizations of a target surgical field, identifying at least one visual feature in a pre-operative dataset, aligning the visual features with the multidimensional visualization, and incorporating one or more real-time, virtual surgical reference indicium including data for making at least one limbal and/or corneal relaxing incision into the real-time visualization. | 04-21-2011 |
20110160578 | REAL-TIME SURGICAL REFERENCE GUIDES AND METHODS FOR SURGICAL APPLICATIONS - Apparatus and methods are described which guide a surgeon in performing a reconstructive or cosmetic procedure. The apparatus and methods utilize three dimensional presentations of the target surgical site incorporating one or more virtual surgical guides which help attain proper alignment and orientation of the post surgical outcome. | 06-30-2011 |
20110213342 | Real-time Virtual Indicium Apparatus and Methods for Guiding an Implant into an Eye - Disclosed herein are apparatus and associated methods for guiding an implant to a desired angle, a desired depth, and/or a desired position in an eye. The apparatus used to guide an implant into an eye includes: one or more real-time, multidimensional visualization modules; one or more displays to present one or more real-time, multidimensional visualizations; one or more data processors configured to produce real-time, virtual surgical reference indicia including data for guiding an implant to a desired angle, a desired depth, and/or a desired position an eye; and one or more inserter for guiding an implant to a desired angle, a desired depth, and/or a desired position in the anterior chamber of an eye. The associated methods generally involve the steps required for guiding an implant into the eye using the apparatus. | 09-01-2011 |
20140324071 | REAL-TIME SURGICAL REFERENCE INDICIUM APPARATUS AND METHODS FOR ASTIGMATISM CORRECTION - A system, method, and apparatus for generating at least one user adjustable, accurate, real-time, virtual surgical reference indicium including data for making at least one limbal and/or corneal relaxing incision for use in astigmatism correcting procedures are disclosed. An example method includes providing at least one real-time multidimensional visualization of at least a portion of an eye to a surgeon and producing at least one rotationally accurate virtual indicium including data for making at least one limbal relaxing incision, at least one corneal relaxing incision or a combination thereof on the eye in conjunction with the real-time multidimensional visualization of at least a portion of the eye. | 10-30-2014 |
20150221105 | IMAGING SYSTEM AND METHODS DISPLAYING A FUSED MULTIDIMENSIONAL RECONSTRUCTED IMAGE - In some embodiments, an imaging system displays a multidimensional visualization of a surgical site. In some embodiments, the imaging system receives a selection corresponding to a portion of the displayed multidimensional visualization of the surgical site. At the selected portion of the multidimensional visualization, the imaging system displays a portion of a multidimensional reconstructed image which corresponds to the selected multidimensional visualization such that the displayed portion of the multidimensional reconstructed image is fused with the displayed multidimensional visualization. | 08-06-2015 |
Patent application number | Description | Published |
20130222698 | Cable with Video Processing Capability - In an embodiment, a host computing device includes an internal display and also includes a connector to connect to an external display. A cable is provided to connect to the connector and to connect to the external display. The cable includes video processing capabilities. For example, the cable may include a memory configured to store a frame buffer. The frame buffer may store a frame of video data for further processing by the video processing device in the cable. The video processing device may manipulate the frame in a variety of ways, e.g. scaling, rotating, gamma correction, dither correction, etc. | 08-29-2013 |
20130227631 | Cable with Fade and Hot Plug Features - In an embodiment, a host computing device includes an internal display and also includes a connector to connect to an external display. A cable is provided to connect to the connector and to connect to the external display. The cable includes video processing capabilities. For example, the cable may include a memory configured to store a frame buffer. The frame buffer may store a frame of video data for further processing by the video processing device in the cable. The video processing device may manipulate the frame in a variety of ways, e.g. scaling, rotating, gamma correction, dither correction, etc. | 08-29-2013 |
20140071140 | DISPLAY PIPE REQUEST AGGREGATION - A system and method for efficiently scheduling memory access requests. A semiconductor chip includes a memory controller for controlling accesses to a shared memory and a display controller for processing frame data. In response to detecting an idle state for the system and the supported one or more displays, the display controller aggregates memory requests for a given display pipeline of one or more display pipelines prior to attempting to send any memory requests from the given display pipeline to the memory controller. Arbitration may be performed while the given display pipeline sends the aggregated memory requests. In response to not receiving memory access requests from the functional blocks or the display controller, the memory controller may transition to a low-power mode. | 03-13-2014 |
20140075117 | DISPLAY PIPE ALTERNATE CACHE HINT - A system and method for efficiently allocating data in a memory hierarchy. A system includes a memory controller for controlling accesses to a memory and a display controller for processing video frame data. The memory controller includes a cache capable of storing data read from the memory. A given video frame may be processed by the display controller and presented on a respective display screen. During processing, control logic within the display controller sends multiple memory access requests to the memory controller with cache hint information. For the frame data, the cache hint information may alternate between (i) indicating to store frame data read in response to respective requests in the memory cache and (ii) indicating to not store the frame data read in response to respective requests in the memory cache. | 03-13-2014 |
20140078324 | IMAGE DISTORTION CORRECTION IN SCALING CIRCUIT - Techniques relating to correction of image distortion caused by movement of a camera unit during image capture. In one embodiment, an apparatus may include a camera unit and a scaling circuit. The apparatus may be configured to calculate a shift value for a line of an image captured by the camera unit, where the shift value is indicative of an amount of movement of the camera unit during at least a portion of capture of the image. The scaling circuit may be configured to operate on the line starting at a line position that is based on the calculated shift value. The calculated shift value may be based on movement information generated by a motion sensor. The scaling circuit may include a digital differential analyzer and one or more multi-tap polyphase filters. The line position may be specified as a fractional pixel value. | 03-20-2014 |
20140085275 | Refresh Rate Matching for Displays - In a graphics system, pixels may be provided to a graphics display at a pixel clock rate corresponding to an actual refresh rate nearest to and lower than a desired/target refresh rate. A number of additional pixels may be provided with the pixels for each image frame. The number is based at least on the actual refresh rate, target refresh rate, and a pixel-resolution of the image frame, such that providing pixels of an image frame and the number of additional pixels for each image frame at the pixel clock rate results in an effective refresh rate matching the target refresh rate. The additional pixels may be provided by adding one or more pixels at the end of each horizontal line of the image frame, or by adding an extra partial line in the vertical blanking interval. The additional pixels are not displayed and do not adversely affect normal operation. | 03-27-2014 |
20140168234 | LOW POWER DISPLAY PORT WITH ARBITRARY LINK CLOCK FREQUENCY - Embodiments of an apparatus for implementing a display port interface are disclosed. The apparatus may include a source processor and a sink processor coupled through an interface. The source processor may be operable to select a frequency from a continuous range of frequencies, and transmit data to the sink processor at the selected frequency. A phase lock circuit may be included in the sink processor. The phase lock circuit may be configured to generate a signal at the selected frequency dependent upon the transmitted data. The generated signal may be in phase with the transmitted data. | 06-19-2014 |
20140173313 | LINK CLOCK CHANGE DURING VERITCAL BLANKING - Embodiments of an apparatus for implementing a display port interface are disclosed. The apparatus may include a source processor and a sink processor coupled through an interface. The interface may include a primary link, and an auxiliary link. The source processor may be operable to send a wake-up command to the sink processor via the auxiliary link, which may indicate a change in frequency on the primary link. The source processor to the sink processor via the primary link may send initialization parameters, which may include a clock data recovery lock parameter and an idle parameter. | 06-19-2014 |
20140173320 | MAINTAINING SYNCHRONIZATION DURING VERTICAL BLANKING - Embodiments of an apparatus for implementing a display port interface are disclosed. The apparatus may include a source processor and a sink processor coupled through an interface. The interface may include a primary link, an auxiliary link, and a hot plug detect link. The source processor may be operable to send a wake-up command to the sink processor via the auxiliary link. The source processor may send initialization parameters to the sink processor via the primary link. The initialization parameters may include a clock data recovery lock parameter and an idle parameter. Following the initialization parameters, the source processor may send a synchronization signal to the sink processor via the primary link. The source processor may then send a sleep command via the primary link to the sink processor. | 06-19-2014 |
20140253570 | Network Display Support in an Integrated Circuit - In an embodiment, a system includes hardware optimized for communication to a network display. The hardware may include a display pipe unit that is configured to composite one or more static images and one or more frames from video sequences to form frames for display by a network display. The display pipe unit may include a writeback unit configured to write the composite frames back to memory, from which the frames can be optionally encoded using video encoder hardware and packetized for transmission over a network to a network display. In an embodiment, the display pipe unit may be configured to issue interrupts to the video encoder during generation of a frame, to overlap encoding and frame generation. | 09-11-2014 |
20140292787 | Compressed Frame Writeback and Read for Display in Idle Screen On Case - In an embodiment, a display pipe is configured to composite one or more frames of images and/or video sequences to generate output frames for display. Additionally, the display pipe may be configured to compress an output frame and write the compressed frame to memory responsive to detecting static content in the output frames is detected. The display pipe may also be configured to read the compressed frame from memory for display instead of reading the frames for compositing and display. In some embodiments, the display pipe may include an idle screen detect circuit configured to monitor the operation of the display pipe and/or the output frames to detect the static content. | 10-02-2014 |
20140292788 | Mechanism to Detect Idle Screen On - In an embodiment, a display pipe is configured to composite one or more frames of images and/or video sequences to generate output frames for display. Additionally, the display pipe may be configured to compress an output frame and write the compressed frame to memory responsive to detecting static content in the output frames is detected. The display pipe may also be configured to read the compressed frame from memory for display instead of reading the frames for compositing and display. In some embodiments, the display pipe may include an idle screen detect circuit configured to monitor the operation of the display pipe and/or the output frames to detect the static content. | 10-02-2014 |
20150042659 | VIDEO DATA COMPRESSION FORMAT - A method and device for data compression are presented, in which a data processor may receive a packet of image data which includes four groups of N bits, where N is an integer greater than 2. The data processor may compress the received packet of data, such that a total number of bits for the converted packet is less than four times N. The data processor may compress the received packet of image data by reducing the resolution of three of the values while maintaining the resolution of the fourth value. To reduce the resolution of the three values, the data processor may apply a dithering formula to the values. The data processor may then send the converted packet via an interface. | 02-12-2015 |
20150062134 | PARAMETER FIFO FOR CONFIGURING VIDEO RELATED SETTINGS - A graphics system may include one or more processing units for processing a current display frame, each processing unit including a plurality of parameter registers for storing parameter settings used in processing the current display frame. A parameter buffer in the graphics system may store frame packets, with each frame packet containing information corresponding to parameter settings to be used for at least one display frame. A control circuit coupled to the buffer and to the one or more processing units may retrieve a top frame packet from the parameter buffer and determine if the frame packet is an internal type, i.e., intended for internal registers in a respective processing unit or if it is an external type, i.e., intended for an external register elsewhere in the graphics system. Based on the type of frame packet, the control circuit may update one or more register values accordingly. | 03-05-2015 |
20150093023 | Backwards Compatible Extended Image Format - Techniques are provided for encoding an extended image such that it is backwards compatible with existing decoding devices. An extended image format is defined such that the extended image format is consistent with an existing image format over the full range of the existing image format. Because the extended image format is consistent with the existing image format over the full range of the existing image format, additional image information that is included in an extended image can be extracted from the extended image. A base version of an image (expressed using the existing image format) may be encoded in a payload portion and the extracted additional information may be stored in a metadata portion of a widely supported image file format. | 04-02-2015 |
20150213780 | DISPLAY PANEL SELF-REFRESH ENTRY AND EXIT - Embodiments of an apparatus for implementing a display port interface are disclosed. The apparatus may include a source processor and a sink processor coupled through an interface. The sink processor may be operable to send a synchronization signal to the source processor through the interface. The source processor may be operable, dependent upon the synchronization signal, to send data to the sink processor. | 07-30-2015 |
20150222930 | Backwards Compatible Extended Image Format - Techniques are provided for encoding an extended image such that it is backwards compatible with existing decoding devices. An extended image format is defined such that the extended image format is consistent with an existing image format over the full range of the existing image format. Because the extended image format is consistent with the existing image format over the full range of the existing image format, additional image information that is included in an extended image can be extracted from the extended image. A base version of an image (expressed using the existing image format) may be encoded in a payload portion and the extracted additional information may be stored in a metadata portion of a widely supported image file format. | 08-06-2015 |
20150346001 | System on a Chip with Always-On Processor - In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down. | 12-03-2015 |
20150347287 | System on a Chip with Always-On Processor Which Reconfigures SOC and Supports Memory-Only Communication Mode - In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down. | 12-03-2015 |
20150355762 | MID-FRAME BLANKING - Systems, apparatuses, and methods for performing mid-frame blanking. A first portion of a frame is driven to a display and then a first mid-frame blanking interval is generated. Following this first mid-frame blanking interval, a second portion of the frame is driven to the display, followed by a second mid-frame blanking interval, followed by a third portion of the frame, and so on. Any number of mid-frame blanking intervals may be introduced in a given frame. During each mid-frame blanking interval, touch sensing is performed to detect touch events on the screen for in-cell touch type displays. For displays with touch sensors electrically separated from the display common voltage layer, special sense scan steps are performed during mid-frame blanking intervals. By performing touch sensing or special sense scan steps during a frame rather than only at the end of a frame, the performance of touch sensing is improved. | 12-10-2015 |
20150356050 | Interface Emulator using FIFOs - An interface emulator for an IC is disclosed. An interface emulator includes a first first-in, first-out memory (FIFO) and a second FIFO. The first FIFO is coupled to receive data from an access port and a second FIFO coupled to receive data from at least one functional unit in the IC. The access port may be coupled to a device that is external to the IC. The external device may write information into the first FIFO, and this information may subsequently be read by a functional unit in the IC. Similarly, the functional unit may write information into the second FIFO, with the external device subsequently reading the information. Information may be written into the FIFOs in accordance with a predefined protocol. Thus, a particular type of interface may be emulated even though the physical connection and supporting circuitry for that interface is not otherwise implemented in the IC. | 12-10-2015 |
20150362947 | MAINTAINING SYNCHRONIZATION DURING VERTICAL BLANKING - Embodiments of an apparatus for implementing a display port interface are disclosed. The apparatus may include a source processor and a sink processor coupled through an interface. The interface may include a primary link, an auxiliary link, and a hot plug detect link. The source processor may be operable to send a wake-up command to the sink processor via the auxiliary link. The source processor may send initialization parameters to the sink processor via the primary link. The initialization parameters may include a clock data recovery lock parameter and an idle parameter. Following the initialization parameters, the source processor may send a synchronization signal to the sink processor via the primary link. The source processor may then send a sleep command via the primary link to the sink processor. | 12-17-2015 |
20150362980 | Always-On Processor as a Coprocessor - A system on a chip (SOC) may include a component that remains powered when the remainder of the SOC is powered off. The component may be configured to power up other components of the SOC while keeping the central processing unit (CPU) processors powered down, in order to perform a task assigned to such other component(s). The always-on component may further include a processor, in some embodiments, which may interact with the other components to perform the task. In an embodiment, the processor within the always-on component may execute operating system (OS) software to interact with the other components while the CPU processors are powered down. | 12-17-2015 |
20150371607 | MULTIPLE DISPLAY PIPELINES DRIVING A DIVIDED DISPLAY - Systems, apparatuses, and methods for driving a split display with multiple display pipelines. Frames for driving a display are logically divided into portions, a first display pipeline drives a first portion of the display, and a second display pipeline drives a second portion of the display. To ensure synchronization between the two display pipelines, a repeat vertical blanking interval (VBI) signal is generated if either of the display pipelines has not already received the frame packet with configuration data for the next frame. When the repeat VBI signal is generated, both display pipelines will repeat processing of the current frame. | 12-24-2015 |
20160071485 | HARDWARE AUXILIARY CHANNEL FOR SYNCHRONOUS BACKLIGHT UPDATE - Systems, apparatuses, and methods for synchronizing backlight adjustments to frame updates in a display pipeline. A change in the ambient light is detected and as a result, backlight settings are adjusted. To offset a reduction in the backlight, the color intensity in the frames is increased. While the change in ambient light is detected asynchronously, the adjustment to the backlight settings and color intensity is synchronized to a frame update via a virtual channel for the auxiliary channel of the display interface. | 03-10-2016 |
20160092010 | TOUCH, PEN AND FORCE SENSOR OPERATION WITH VARIABLE REFRESH DISPLAYS - Synchronization of display functions and various touch, stylus and/or force sensing functions for devices including a variable refresh rate (VRR) display is disclosed. In some examples, touch, stylus and/or force sensing functions can be synchronized with display frames and a display refresh rate can be adjusted by extended blanking of the display for one or more display frames. In other examples, touch, stylus and/or force sensing functions can be synchronized with display sub-frames and a display refresh rate can be adjusted by extended blanking of the display for one or more display sub-frames. Pre-warning synchronization signals can be generated to prepare one or more scan controllers to implement the appropriate scan events during and after extended blanking periods. Latency between the scan results and the corresponding image on the display can be corrected in software and/or firmware by time-stamping scan results or by dropping scan results from uncompleted scans. | 03-31-2016 |
Patent application number | Description | Published |
20110169849 | Buffer Underrun Handling - A graphics system may include a display pipe with a buffer configured to store pixels to be processed by a display controller for displaying on a display device, with a buffer control circuit coupled to the buffer to supply pixels to the display controller. When the buffer control circuit detects an underrun of the buffer responsive to the display controller attempting to read pixels from the buffer that have not yet been written to the buffer, the buffer control circuit may supply an underrun pixel to the display. The underrun pixel may be selected from a set of previously stored set of underrun pixels, which may include a most recent valid pixel read by the display controller. A read pointer representative of the location in the buffer from where the display controller is currently attempting to read may be advanced even when an underrun condition occurs. The underrun pixel may be supplied to the display controller until the underrun has been resolved, at which point the most recent valid pixel read from the buffer may be supplied to the display controller. | 07-14-2011 |
20120182889 | Quality of Service (QoS)-Related Fabric Control - In an embodiment, one or more fabric control circuits may be inserted in a communication fabric to control various aspects of the communications by components in the system. The fabric control circuits may be included on the interface of the components to the communication fabric, in some embodiments. In other embodiments that include a hierarchical communication fabric, fabric control circuits may alternatively or additionally be included. The fabric control circuits may be programmable, and thus may provide the ability to tune the communication fabric to meet performance and/or functionality goals. | 07-19-2012 |
20120229497 | DEVICES AND METHODS FOR DYNAMIC DITHERING - Devices and methods for dynamic dithering are provided. For example, an electronic device according to an embodiment may include image processing circuitry that operates on higher-bit-depth image data and a display panel that displays lower-bit-depth image data. To obtain the lower-bit-depth image data, the image processing circuitry may perform dynamic dithering on the higher-bit-depth image data. Such dynamic dithering may involve dithering frames of the higher-bit-depth image data based at least in part on respective rounding threshold values. | 09-13-2012 |
20120306926 | INLINE SCALING UNIT FOR MIRROR MODE - A scaling unit is disclosed that is within a computing device having an internal display and an external interface. The scaling unit facilitates the concurrent presentation of images on the internal display and an external display connected to the external interface. In configurations in which the external interface does not have sufficient data width to concurrently display images on the external display at the same resolution as the internal display, the scaling unit may be used to reduce the number of pixels in a line, thus reducing bandwidth requirements at the external interface. The scaling unit may also scale further to maintain an aspect ratio of the image displayed on the internal display. Further vertical scaling may be performed outside the computing device (e.g., by a dongle coupled between the computing device and the external display), such that the scaling unit may be implemented with reduced memory requirements. | 12-06-2012 |
20120307141 | FRAME RETIMING FOR MIRROR MODE - An inline scaling unit configured to retime an input video frame is disclosed. The scaling unit is configured to receive pixels within a line of a video frame to be displayed on a primary display that is within a first clock domain. The scaling unit down-scales the group of pixels and writes the down-scaled pixels to a buffer circuit in the first clock domain. The scaling unit includes a control circuit configured to generate horizontal and vertical control signals for the retimed video frame to be displayed on a secondary display that is within a second clock domain. The horizontal and vertical control signals are then used to enable reading from the buffer circuit in the second clock domain. The scaling unit outputs the down-scaled pixels and the generated control signals within the retimed video frame such that input video frame and the retimed video frame may be displayed concurrently. | 12-06-2012 |
20130002703 | Non-Real-Time Dither Using a Programmable Matrix - A dither unit with a programmable kernel matrix in which each indexed location/entry may store one or more dither values. Each dither value in a respective entry of the kernel matrix may correspond to the number of bits that are truncated during dithering. During dithering of each pixel of an image, entries in the kernel matrix may be indexed according to the relative coordinates of the pixel within the image. A dither value for the pixel may be selected from the indexed entry based on the truncated least significant bits of the pixel component value. When the kernel matrix is storing more than one dither value per entry, the dither value may be selected based further on the number of truncated least significant bits. A dithered pixel component value may then be generated according to the dither value and the remaining most significant bits of the pixel component value. | 01-03-2013 |
20130038791 | RGB-Out Dither Interface - A display controller may include an RGB Interface module and a display port module, which may both use a target-master interface, in which the data receiving module pops pixels from the data sourcing module, and generates the HSync, VSync, and VBI timing signals. A dither module may be instantiated between the RGB interface module and display port module to perform dithering. The dither module may use a source-master interface, in which data signals and data valid signals are issued by the data sourcing module. In order to avoid having to use a large storage capacity FIFO with the dither module, a control unit may issue interface signals to the RGB Interface module and display port module, and clock-gate the dither module, to allow the data signals and data valid signals to properly interface with the RBG interface module and display port module, and provide data flow from the RGB interface module to the dither module to the display port module. | 02-14-2013 |
20130057567 | Color Space Conversion for Mirror Mode - The same pixel stream may be displayed on an internal display and an external display while maintaining the original aspect ratio corresponding to the internal display dimensions. A connector with limited number of pins may only support a two-wire display port interface to the external display, which may not provide enough bandwidth to transmit the full resolution image to the external display. To transmit the full resolution image, a color space conversion from RGB space to YCbCr color space may be performed. The Luma component may be transmitted at full resolution, while the chroma components may be scaled. Accordingly, there is no loss of image resolution, while some amount of color resolution may be lost. However, there is no need to retime frames within the system on chip (SOC), and the same pixel stream may be used as the basis for display on both the internal and the external display. | 03-07-2013 |
20130120037 | Agile Clocking with Receiver PLL Management - A method and apparatus for changing a frequency of a clock signal to avoid interference is disclosed. In one embodiment, data conveyed on a first interface is synchronized to a clock signal at a first frequency. Signals are conveyed on a second interface at another frequency. Responsive to a change of the frequency at which signals are conveyed on a second interface, a clock control unit associated with the first interface initiates a change of the clock signal to a second frequency. The second frequency may be chosen as to not cause interference with the frequency at which signals are conveyed on the second interface. The change of the clock frequency may be performed in such a manner as to prevent spurious activity on the clock line of the interface. | 05-16-2013 |
20130135351 | INLINE IMAGE ROTATION - Methods and apparatus for performing an inline rotation of an image. The apparatus includes a rotation unit for reading pixels from a source image in an order based on a specified rotation to be performed. The source image is partitioned into multiple tiles, the tiles are processed based on where they will be located within the rotated image, and each tile is stored in a tile buffer. The target pixel addresses within a tile buffer are calculated and stored in a lookup table, and when the pixels are retrieved from the source image by the rotation unit, the lookup table is read to determine where to write the pixels within a corresponding tile buffer. | 05-30-2013 |
20130215134 | Alpha Channel Power Savings in Graphics Unit - A graphics processing circuit and method for power savings in the same is disclosed. In one embodiment, a graphics processing circuit includes a number of channels. The number of channels includes a number of color component channels that are each configured to process color components of pixel values of an incoming frame of graphics information. The number of channels also includes an alpha scaling channel configured to process alpha values (indicative of a level of transparency) for the incoming and/or outgoing frames. The graphics processing circuit also includes a control circuit. The control circuit is configured to place the alpha scaling channel into a low-power state responsive to determining that at least one of the incoming or outgoing frames does not include alpha values. | 08-22-2013 |
20130222411 | EXTENDED RANGE COLOR SPACE - Techniques are disclosed relating to additive color systems. In one embodiment, an apparatus is disclosed that includes a device configured to operate on pixel data having color component values falling within an extended range outside of 0.0 to 1.0 corresponding to an extended range color space. In one embodiment, a gamma correction function is disclosed that can be applied to the pixel data, where the gamma correction function is applicable to both negative and positive values. Various embodiments of formats for arranging pixel data are also disclosed. | 08-29-2013 |
20130222413 | BUFFER-FREE CHROMA DOWNSAMPLING - Methods and graphics processing pipelines for performing inline chroma downsampling of pixel data. The graphics processing pipeline includes a chroma downsampling unit for performing buffer-free downsampling of chroma pixel components. A vertical column of chroma pixel components is received in each clock cycle by the chroma downsampling unit, and downsampled chroma pixel components are generated on every clock cycle or every other clock cycle. Vertical, horizontal, and vertical and horizontal downsampling can be performed without buffers by the chroma downsampling unit. A programmable configuration register in the chroma downsampling unit determines the type of downsampling that is implemented. | 08-29-2013 |
20130223733 | PIXEL NORMALIZATION - Methods and apparatuses for performing lossless normalization of input pixel component values. The apparatus includes a normalization unit for converting pixel values from a range of 0 to (2 | 08-29-2013 |
20130223764 | PARALLEL SCALER PROCESSING - A parallel scaler unit for simultaneously scaling multiple pixels from a source image. The scaler unit includes multiple vertical scalers and multiple horizontal scalers. A column of pixels from the source image is presented to the vertical scalers, and each vertical scaler selects appropriate pixels from the column of pixels for scaling. Each vertical scaler scales the selected pixels in a vertical direction and then conveys the vertically scaled pixels to a corresponding horizontal scaler. Each horizontal scaler scales the received pixels in a horizontal direction. | 08-29-2013 |
20130257752 | Electronic Devices With Adaptive Frame Rate Displays - An electronic device may be provided with a display. The display may be a variable frame rate display capable of adaptively adjusting a frame rate at which display frames are displayed in response to information associated with the current state of operation of the device. The information may be gathered using control circuitry in the electronic device. The control circuitry may gather the information for adjusting the frame rate by monitoring the electronic device power supply configuration, other device components, the type of content to be displayed, and user-input signals. The control circuitry may adjust the frame rate based on the gathered information by increasing or decreasing the frame rate. The control circuitry may be formed as a portion of display control circuitry for the device such as a display driver integrated circuit or may be formed as a portion of storage and processing circuitry external to the display. | 10-03-2013 |
20130262540 | Transcendental and Non-Linear Components Using Series Expansion - In an embodiment, hardware implementing a transcendental or other non-linear function is based on a series expansion of the function. For example, a Taylor series expansion may be used as the basis. One or more of the initial terms of the Taylor series may be used, and may be implemented in hardware. In some embodiments, modifications to the Taylor series expansion may be used to increase the accuracy of the result. In one embodiment, a variety of bit widths for the function operands may be acceptable for use in a given implementation. A methodology for building a library of series-approximated components for use in integrated circuit design is provided which synthesizes the acceptable implementations and tests the results for accuracy. A smallest (area-wise) implementation which produces a desired level of accuracy may be selected as the library element. | 10-03-2013 |
20140139535 | Buffer Underrun Handling - A graphics system may include a display pipe with a buffer configured to store pixels to be processed by a display controller for displaying on a display device, with a buffer control circuit coupled to the buffer to supply pixels to the display controller. When the buffer control circuit detects an underrun of the buffer responsive to the display controller attempting to read pixels from the buffer that have not yet been written to the buffer, the buffer control circuit may supply an underrun pixel to the display. The underrun pixel may be selected from a set of previously stored set of underrun pixels, which may include a most recent valid pixel read by the display controller. A read pointer representative of the location in the buffer from where the display controller is currently attempting to read may be advanced even when an underrun condition occurs. The underrun pixel may be supplied to the display controller until the underrun has been resolved, at which point the most recent valid pixel read from the buffer may be supplied to the display controller. | 05-22-2014 |
20140198117 | Cable with Fade and Hot Plug Features - In an embodiment, a host computing device includes an internal display and also includes a connector to connect to an external display. A cable is provided to connect to the connector and to connect to the external display. The cable includes video processing capabilities. For example, the cable may include a memory configured to store a frame buffer. The frame buffer may store a frame of video data for further processing by the video processing device in the cable. The video processing device may manipulate the frame in a variety of ways, e.g. scaling, rotating, gamma correction, dither correction, etc. | 07-17-2014 |
Patent application number | Description | Published |
20090264130 | METHOD AND APPARTUS FOR MANAGEMENT OF AUTOMATIC NEIGHBOR RELATION FUNCTION IN WIRELESS NETWORKS - Systems and methodologies are described that facilitate management of automatic neighbor relation functions in wireless networks. The system can include components and/or devices that ascertain whether or not to add or remove a neighbor relation based on information associated with an operations and management system, wherein the operations and management system dispatches add or remove requests to a base station that establishes, updates, and/or maintains a neighbor relations table and/or set of neighbor relations that includes neighbor relations between cells. | 10-22-2009 |
20100303054 | APPARATUS AND METHOD FOR ADAPTIVE TSP SETTING TO MINIMIZE DUPLICATE PACKET TRANSMISSIONS - An apparatus and method for adaptively setting a Timer_Status_Prohibit (TSP) parameter, the method comprising receiving a category information from a first terminal; determining a threshold value based on the category information and transmitting the threshold value to the first terminal; starting a TSP timer and transmitting at least one data packet to the first terminal once the TSP timer has started; determining when the TSP timer exceeds the threshold value to discontinue transmitting the at least one data packet to the first terminal; receiving a status report from the first terminal; and using the status report, determining whether there is any missing or erroneously received data packet and retransmitting any missing or erroneously received data packet from the at least one data packet to the first terminal. | 12-02-2010 |
20110228687 | METHODS AND APPARATUS FOR ESTABLISHING RECIPROCAL INTER-RADIO ACCESS TECHNOLOGY NEIGHBOR RELATIONS - A method and apparatus for establishing inter-RAT reciprocal neighbor relationships. The method may include receiving a neighbor relation notification from a first entity, wherein the neighbor relation notification indicates a neighbor relationship of a first cell to a second cell, wherein the first cell uses a first RAT, and wherein the second cell uses a second RAT that is different than the first RAT, determining, by a second network entity, that a reciprocal neighbor relationship of the second cell to the first cell does not exist in a neighbor list for the second cell, and generating the reciprocal neighbor relationship. | 09-22-2011 |
20120262335 | Network coverage and demand maps - Disclosed is an apparatus and method for pairing measurements and position estimate as an information pair from multiple mobile devices and reporting these information pairs to a server without over burdening the mobile device and without requiring the mobile devices to establish a new link. Also, disclosed is an apparatus and method for collecting these information pairs and compiling network maps based on the information pairs. | 10-18-2012 |
20140002015 | ELECTRIC VEHICLE WIRELESS CHARGING WITH MONITORING OF DURATION OF CHARGING OPERATIONAL MODE | 01-02-2014 |
20140012448 | SYSTEMS, METHODS, AND APPARATUS RELATED TO ELECTRIC VEHICLE PARKING AND WIRELESS CHARGING - Systems, methods, and apparatus are disclosed for parking and wireless power transfer and communication of messages in a parking and charging system. In one aspect, an apparatus for parking a vehicle for receiving charging in a parking and charging system is provided. The apparatus includes an antenna configured to wirelessly receive information identifying a location of one or more charging stations. The apparatus further includes a user interface configured to display information identifying at least one of the one or more charging stations. The apparatus further includes a controller configured to cause a communication link to be established between the vehicle with and at least one identified charging station. | 01-09-2014 |
20140035526 | SELECTIVE COMMUNICATION BASED ON DISTANCE FROM A PLURALITY OF ELECTRIC VEHICLE WIRELESS CHARGING STATIONS IN A FACILITY - Systems, methods, and apparatus are disclosed for charging a vehicle in a wireless power transfer system. In one aspect, a method of charging a vehicle is provided, including determining distances between the vehicle and each of a plurality of charging stations. The method further includes selectively communicating, based on the distances, with a first charging station of the plurality of charging stations. | 02-06-2014 |
20150015419 | SYSTEMS, METHODS, AND APPARATUS RELATED TO MUTUAL DETECTION AND IDENTIFICATION OF ELECTRIC VEHICLE AND CHARGING STATION - Systems, methods, and apparatus are disclosed for communicating with a charging system comprising a plurality of charging stations configured to charge an electric vehicle. At least one first signal is transmitted to the charging system via a first communication link while the electric vehicle is a first distance from at least one charging station of the plurality of charging stations. The at least one first signal is indicative of a vehicle identifier of the electric vehicle. At least one second signal is received from the at least one charging station of the plurality of charging stations via a second communication link while the electric vehicle is a second distance from the at least one charging station, the second distance less than the first distance. The at least one second signal is indicative of a charging station identifier of the at least one charging station. | 01-15-2015 |
20150234442 | WAKE LOCK MANAGEMENT THROUGH APPLICATION MONITORING - Methods, systems, and devices are described for managing wake locks in a wireless communication device. The described methods, systems and devices may enable a wireless communication device to monitor activity of an application for which a wake lock is held. The described approach may manage the wake lock based at least in part on the activity or inactivity of the application. For example, when the application is inactive or has activity below a particular threshold for a certain amount of time, the described approach may determine to release the wake lock. | 08-20-2015 |
Patent application number | Description | Published |
20130091303 | SYSTEMS AND METHODS FOR DATA PACKET PROCESSING - Systems and methods for performing efficient network address (NAT) translation are described herein. In some aspects, partial NAT entries are created for data packets before all the IP fragments of the data packets are received. Further, the IP fragments are transmitted before all the IP fragments of the data packets are received. In some aspects, unique IP-IDs are generated for IP fragments and/or data packets at a NAT device. | 04-11-2013 |
20130156041 | APPARATUS AND METHODS FOR EFFICIENT NETWORK ADDRESS TRANSLATION AND APPLICATION LEVEL GATEWAY PROCESSING - Apparatus and methods for efficient NAT and ALG processing is disclosed. An exemplary method includes the operations of deep scanning a packet received over a connection to determine an application level gateway (ALG) process to be performed on the packet, associating the connection with the ALG process, and forwarding additional packets received over the connection to receive the ALG process based on said associating so that deep scanning of the additional packets is bypassed. An exemplary apparatus includes a processor to deep scan a packet received over a connection to determine an ALG process to be performed on the packet, a database to associate the connection with the ALG process, and a packet transmitter to forward additional packets received over the connection to receive the ALG process based on said associating so that deep scanning of the additional packets is bypassed. | 06-20-2013 |
20130223230 | Serving Multiple Subscribers Through a Software-Enabled Access Point - Methods and apparatus for serving multiple subscribers through a software-enabled access point (softAP) are described. One example method generally includes establishing at least one wireless wide area network (WWAN) connection for one or more wireless local area network (WLAN) clients, wherein each WLAN client belongs to one of a plurality of subscriber groups, and monitoring use of each WWAN connection for each subscriber group of the plurality of subscriber groups. | 08-29-2013 |
20150163197 | SYSTEMS, METHODS, AND APPARATUS FOR FULL-CONE AND ADDRESS RESTRICTED CONE NETWORK ADDRESS TRANSLATION USING HARDWARE ACCELERATION - This disclosure describes systems, methods, and apparatus for using a NATTYPE module in a Linux kernel to carry out Full Cone NAT and address-restricted cone NAT while offloading NAT functionality to a hardware accelerator. The NATTYPE module can be configured to create a mapping between conntrack entries and NATTYPE entries and a conntrack module can be configured to update a NATTYPE entry when a conntrack entry is updated and the conntrack entry includes a mapping to a NATTYPE entry. Alternatively, a hardware accelerator controller can be configured to refresh conntrack entries as well as NATTYPE entries. | 06-11-2015 |
20150334537 | EMBMS OVER HOME SHARING ENVIRONMENT - A method, an apparatus, and a computer program product for wireless communication are provided. The apparatus may be a network device. The apparatus receives an evolved multimedia broadcast multicast service (eMBMS) data from a base station via multicast transmission. The apparatus transmits the received eMBMS data to one or more end nodes via unicast transmission. In an aspect, the one or more end nodes are connected to the network device via a local area network (LAN). | 11-19-2015 |
20160036768 | Technique to Delegate Prefixes To Wi-Fi Clients Connected To Mobile Access Point Routers - Methods, devices, systems, and non-transitory process-readable storage media of the various embodiments enable a software-enabled access point mobile computing device to delegate prefixes to already connected local area network (LAN) client devices upon establishment or re-establishment of a data connection. The various embodiments may enable a mobile computing device configured to operate as a mobile router (i.e., a softAP mobile computing device) to support prefix delegation by providing unique IPv6 prefixes to connected LAN client devices. | 02-04-2016 |
20160036772 | Technique to Prevent IPv6 Address Exhaustion in Prefix Delegation Mode for Mobile Access Point Routers - Methods, devices, systems, and non-transitory process-readable storage media include methods for preventing IPv6 address exhaustion in prefix delegation mode by a software-enabled access point (“softAP”) mobile computing device providing an Internet Protocol version 6 (IPv6) wide area network (WAN) connection to a plurality of client devices. A processor of a softAP mobile computing device may include assigning an unassigned prefix of a pool of available prefixes to a client device connected to a local area network (LAN) established by the softAP mobile computing device. The processor may determine whether the client device is disconnected from the LAN based on receiving an indication that the client device has disconnected. The processor may perform a cache look-up to obtain a link-local address of the client device when the client device is disconnected from the LAN, and unassign the prefix associated with the link-local address of the client device. | 02-04-2016 |
20160142219 | eMBMS Multicast Routing for Routers - Systems, methods, devices, and non-transitory processor-readable storage media of the various embodiments enable a software enabled access point (“softAP”) computing device to route evolved Multimedia Broadcast Multicast Service (“eMBMS”) multicast (“MCAST”) traffic to connected local area network (“LAN”) client devices. In an embodiment, a self-assigned Internet Protocol (“IP”) address may be assigned to the wide area network (“WAN”) interface of the softAP computing device where eMBMS MCAST traffic may be received and an MCAST routing daemon/utility of the softAP computing device may enable MCAST forwarding from the WAN interface to the LAN interface of the softAP computing device. In an embodiment, an MCAST routing daemon/utility may be modified to accept an alternate network comprising all source IP addresses. | 05-19-2016 |
Patent application number | Description | Published |
20130323822 | Yeast Expressing Saccharolytic Enzymes for Consolidated Bioprocessing Using Starch and Cellulose - The present invention is directed to a yeast strain, or strains, secreting a full suite, or any subset of that full suite, of enzymes to hydrolyze corn starch, corn fiber, lignocellulose, (including enzymes that hydrolyze linkages in cellulose, hemicellulose, and between lignin and carbohydrates) and to utilize pentose sugars (xylose and arabinose). The invention is also directed to the set of proteins that are well expressed in yeast for each category of enzymatic activity. The resulting strain, or strains can be used to hydrolyze starch and cellulose simultaneously. The resulting strain, or strains can be also metabolically engineered to produce less glycerol and uptake acetate. The resulting strain, or strains can also be used to produce ethanol from granular starch without liquefaction. The resulting strain, or strains, can be further used to reduce the amount of external enzyme needed to hydrolyze a biomass feedstock during an Simultaneous Saccharification and Fermentation (SSF) process, or to increase the yield of ethanol during SSF at current saccharolytic enzyme loadings. In addition, multiple enzymes of the present invention can be co-expressed in cells of the invention to provide synergistic digestive action on biomass feedstock. In some aspects, host cells expressing different heterologous saccharolytic enzymes can also be co-cultured together and used to produce ethanol from biomass feedstock. | 12-05-2013 |
20140308724 | Yeast Expressing Saccharolytic Enzymes for Consolidated Bioprocessing Using Starch and Cellulose - The present invention is directed to a yeast strain, or strains, secreting a full suite, or any subset of that full suite, of enzymes to hydrolyze corn starch, corn fiber, lignocellulose, (including enzymes that hydrolyze linkages in cellulose, hemicellulose, and between lignin and carbohydrates) and to utilize pentose sugars (xylose and arabinose). The invention is also directed to the set of proteins that are well expressed in yeast for each category of enzymatic activity. The resulting strain, or strains can be used to hydrolyze starch and cellulose simultaneously. The resulting strain, or strains can be also metabolically engineered to produce less glycerol and uptake acetate. The resulting strain, or strains can also be used to produce ethanol from granular starch without liquefaction. The resulting strain, or strains, can be further used to reduce the amount of external enzyme needed to hydrolyze a biomass feedstock during an Simultaneous Saccharification and Fermentation (SSF) process, or to increase the yield of ethanol during SSF at current saccharolytic enzyme loadings. In addition, multiple enzymes of the present invention can be co-expressed in cells of the invention to provide synergistic digestive action on biomass feedstock. In some aspects, host cells expressing different heterologous saccharolytic enzymes can also be co-cultured together and used to produce ethanol from biomass feedstock. | 10-16-2014 |
20160068850 | YEAST EXPRESSING SACCHAROLYTIC ENZYMES FOR CONSOLIDATED BIOPROCESSING USING STARCH AND CELLULOSE - The present invention is directed to a yeast strain, or strains, secreting a full suite, or any subset of that full suite, of enzymes to hydrolyze corn starch, corn fiber, lignocellulose, (including enzymes that hydrolyze linkages in cellulose, hemicellulose, and between lignin and carbohydrates) and to utilize pentose sugars (xylose and arabinose). The invention is also directed to the set of proteins that are well expressed in yeast for each category of enzymatic activity. The resulting strain, or strains can be used to hydrolyze starch and cellulose simultaneously. The resulting strain, or strains can be also metabolically engineered to produce less glycerol and uptake acetate. The resulting strain, or strains can also be used to produce ethanol from granular starch without liquefaction. The resulting strain, or strains, can be further used to reduce the amount of external enzyme needed to hydrolyze a biomass feedstock during an Simultaneous Saccharification and Fermentation (SSF) process, or to increase the yield of ethanol during SSF at current saccharolytic enzyme loadings. In addition, multiple enzymes of the present invention can be co-expressed in cells of the invention to provide synergistic digestive action on biomass feedstock. In some aspects, host cells expressing different heterologous saccharolytic enzymes can also be co-cultured together and used to produce ethanol from biomass feedstock. | 03-10-2016 |
Patent application number | Description | Published |
20130033981 | METHOD AND SYSTEM FOR DISTRIBUTING NETWORK TRAFFIC AMONG MULTIPLE DIRECT HARDWARE ACCESS DATAPATHS - A system for distributing network traffic among direct hardware access datapaths, comprising: a processor; one or more activated PNICs; a host operating system; and a virtual machine (VM). Each activated PNIC sends and receives data packets over a network. Each activated PNIC is configured with a virtual function. The VM includes a VNIC and a virtual link aggregator configured to maintain a list identifying each activated PNIC. Virtual function mappings for the VM associate the VM with virtual functions for the activated PNICs. The virtual link aggregator selects the first activated PNIC for servicing a network connection and determines a virtual function for the first activated PNIC. The VNIC for the first activated PNIC uses the virtual function to directly transfer network traffic for the network connection between the VM and the first activated PNIC. | 02-07-2013 |
20130215754 | Servers, Switches, and Systems with Switching Module Implementing a Distributed Network Operating System - One networking device includes a switch module, a server, and a switch controller. The switch module has ports with a communications interface of a first type (CI1) and ports with a communications interface of a second type (CI2). The server, coupled to the switch module via a first CI2 coupling, includes a virtual CI1 driver, which provides a CI1 interface in the server, defined to exchange CI1 packets with the switch module via the first CI2 coupling. The virtual CI1 driver includes a first network device operating system (ndOS) program. The switch controller, in communication with the switch module via a second CI2 coupling, includes a second ndOS program controlling, in the switch module, a packet switching policy defining the switching of packets through the switch module or switch controller. The first and second ndOS programs exchange control messages to maintain a network policy for the switch fabric. | 08-22-2013 |
20130223438 | Methods and Systems for Managing Distributed Media Access Control Address Tables - Methods, systems, and computer programs are presented for switching a network packet. One method includes operations for receiving a packet having a media access control (MAC) address, and for switching the packet by a first packet switching device (PSD) when the MAC address is present in a first memory. Further, the method includes operations for transferring the packet to a second PSD when the MAC address is absent from the first memory and present in a second memory associated with the second PSD, and for transferring the packet to a third PSD when the MAC address is absent from the first memory and the second memory. | 08-29-2013 |
20130235870 | Methods, Systems, and Fabrics Implementing a Distributed Network Operating System - Methods, systems, and computer programs are presented for managing a switching layer fabric. A network device operating system (ndOS) program includes program instructions for exchanging switching policy regarding a switching of network packets in a plurality of ndOS switching devices having respective ndOS programs executing therein. The first ndOS program is executed in a first ndOS switching device, and the switching policy is exchanged with other ndOS programs via multicast messages. Further, the ndOS program includes program instructions for exchanging resource control messages with the other ndOS switching devices to implement service level agreements in the switching layer fabric, where the ndOS switching devices cooperate to enforce the service level agreements. Further yet, the ndOS program includes program instructions for receiving changes to the switching policy, and program instructions for propagating the received changes to the switching policy via message exchange between the ndOS programs. The ndOS switching devices are managed as a single logical switch that spans the plurality of ndOS switching devices. | 09-12-2013 |
20130238885 | Network Switch, Systems, and Servers Implementing Boot Image Delivery - Methods, systems, and computer programs are presented for providing a program to a server. One method includes an operation for receiving a request by a switching device from a first server, the request being for a boot image for booting the first server. In addition, the method includes operations for determining if the boot image is available from non-volatile storage in the switching device, and for forwarding the request to a second server when the boot image is absent from the non-volatile storage. Further, the method includes an operation for sending the boot image to the first server from the switching device when the boot image is available from the non-volatile storage. | 09-12-2013 |
20130242983 | Servers, Switches, and Systems with Virtual Interface to External Network Connecting Hardware and Integrated Networking Driver - Methods, systems, and computer programs are presented for networking communications. One method includes an operation for receiving a packet in a first format by a virtual driver providing a communications interface of a first type (CI1), the first format being for CI1. Further, the method includes an operation for encapsulating the packet in a second format by a processor, the second format being for a communications interface of a second type (CI2) different from CI1. In addition, the method includes an operation for sending the encapsulated packet in the second format to a switch module. The switch module includes a switch fabric, one or more CI1 ports, and one or more CI2 ports, and the switch module transforms the packet back to the first format to send the packet in the first format to a CI1 network via one of the CI1 ports in the switch module. | 09-19-2013 |
20150071292 | METHOD AND SYSTEM FOR PROCESSING PACKETS IN A NETWORK DEVICE - Systems are presented for processing packets in a network switch. One network device includes a processor, an Ethernet switch, a PCIe switch, and a packet processor. The processor is for executing a controller program, and the Ethernet switch is for switching packets among a ports. Further, the PCIe switch is coupled to the processor and the Ethernet switch, and the packet processor, coupled to the Ethernet switch and the PCIe switch, is operable to modify an application header of an incoming packet and send the incoming packet to one of the ports. The controller program is operable to configure the Ethernet switch and the packet processor to define processing of packets. The controller program is operable to send a first configuration rule to the Ethernet switch, the first configuration rule defining that packets of a network flow requiring header modification be forwarded to the packet processor. | 03-12-2015 |
20160028654 | Servers, Switches, and Systems with Virtual Interface to External Network Connecting Hardware and Integrated Networking Driver - Methods, systems, and computer programs are presented for networking communications. One method includes an operation for receiving a packet in a first format by a virtual driver providing a communications interface of a first type (CI1), the first format being for CI1. Further, the method includes an operation for encapsulating the packet in a second format by a processor, the second format being for a communications interface of a second type (CI2) different from CI1. In addition, the method includes an operation for sending the encapsulated packet in the second format to a switch module. The switch module includes a switch fabric, one or more CI1 ports, and one or more CI2 ports, and the switch module transforms the packet back to the first format to send the packet in the first format to a CI1 network via one of the CI1 ports in the switch module. | 01-28-2016 |
20160087885 | CONNECTING FABRICS VIA SWITCH-TO-SWITCH TUNNELING TRANSPARENT TO NETWORK SERVERS - A network switch includes ports, memory, and a processor. The switch is operable to switch packets of a layer 2 network, and the memory is for storing a tunneling engine computer program. The processor executes the tunneling engine, where the processor identifies a second switch operable to switch layer-2 network packets. The identification includes detecting that the second switch is connected to the network switch over a layer 3 connection, and the tunneling engine creates a tunnel over the layer 3 connection between the switches to exchange layer-2 packets. The tunnels encapsulates and decapsulates the packets that are exchanged between the switches. When the processor determines that a packet from a first node to a second node that is connected to the second switch, the processor creates an encapsulation flow on the network switch to encapsulate packets from the first node to the second node over the tunnel. | 03-24-2016 |