Patent application number | Description | Published |
20080277651 | ORGANIC NON-VOLATILE MEMORY MATERIAL AND MEMORY DEVICE UTILIZING THE SAME - Disclosed is an organic non-volatile memory (ONVM) material including nanoparticles evenly dispersed in a first polymer. The nanoparticles have a metal core covered by a second polymer to form a core/shell structure, and the first polymer has a higher polymerization degree and molecular weight than the second polymer. The ONVM material of the invention has high uniformity, thereby stabilizing the electric properties of the memory device, such as increasing rewrite counts, increasing data retention time, reducing driving voltage, reducing write current, and enhancing current on/off ratio. | 11-13-2008 |
20100292433 | SOLUBLE POLYTHIOPHENE DERIVATIVE - The invention discloses soluble polythiophene derivatives containing highly coplanar repeating units. The coplanar characteristic of side chain conjugated thiophene units improves the degree of the intramolecular conjugation and intermolecular π-π interaction. The polythiophene derivative exhibits good carrier mobility and is suitable for use in photo-electronic device such as organic thin film transistors (OTFT), organic light-emitting diodes (OLEDs), and organic solar cells (OSCs). | 11-18-2010 |
20120279420 | Ink composition and Method for Forming the Ink - An ink composition for forming a chalcogenide semiconductor film and a method for forming the same are disclosed. The ink composition includes a solvent, a plurality of metal chalcogenide nanoparticles and at least one selected from the group consisted of metal ions and metal complex ions. The metal ions and/or complex ions are distributed on the surface of the metal chalcogenide nanoparticles and adapted to disperse the metal chalcogenide nanoparticles in the solvent. The metals of the metal chalcogenide nanoparticles, the metal ions and the metal complex ions are selected from a group consisted of group I, group II, group III and group IV elements of periodic table and include all metal elements of a chalcogenide semiconductor material. | 11-08-2012 |
20120282721 | Method for forming Chalcogenide Semiconductor Film and Photovoltaic Device - A method for forming a chalcogenide semiconductor film and a photovoltaic device using the chalcogenide semiconductor film are disclosed. The method includes steps of coating a precursor solution to form a layer on a substrate and annealing the layer to form the chalcogenide semiconductor film. The precursor solution includes a solvent, metal chalcogenide nanoparticles and at least one of metal ions and metal complex ions which are distributed on surfaces of the metal chalcogenide nanoparticles. The metals of the metal chalcogenide nanoparticles, the metal ions and the metal complex ions are selected from a group consisted of group I, group II, group III and group IV elements of periodic table and include all metal elements of a chalcogenide semiconductor material. | 11-08-2012 |
20130074911 | Photovoltaic Device Including a CZTS Absorber Layer and Method of Manufacturing the Same - A photovoltaic device including a CZTS absorber layer and method for manufacturing the same are disclosed. The photovoltaic device includes a substrate, a bottom electrode, an absorber layer formed on the bottom electrode, a buffer layer formed on the absorber layer and a top electrode layer formed on the buffer layer. The absorber layer includes a first region adjacent to the bottom electrode and a second region adjacent to the first region. Both of the first region and the second region include a formula of Cu | 03-28-2013 |
Patent application number | Description | Published |
20090240862 | System Design for a Digital Electronic Sign Board - A system design for a digital electronic sign board comprises a main circuit module, an adapter module and a computer module; wherein the adapter module is fixed between the main circuit module and the computer module. The main circuit module and the adapter module are fixed in the digital electronic sign board. The computer module is externally inserted into the digital electronic sign board. Therefore the computer module and the main circuit module are electrically connected through the adapter module. The system design of the present invention removable and attached the computer module with the main circuit module. As a result, when a maintenance worker needs to perform maintenance on the computer module, he or she can conveniently pull out the computer module from the digital electronic sign board and insert the computer module back to the digital electronic sign board after maintenance is done so as to improve the efficiency and quality of maintenance. | 09-24-2009 |
20120080532 | TEMPERATURE CONDITIONING SYSTEM FOR OUTDOOR DIGITAL SIGNAGE AND METHOD THEREOF - A temperature conditioning system for outdoor digital signage and method thereof comprises a central control module, a system temperature sensor, a fan temperature sensor, a digital signage control module, an internal power supply module, a display module, a heating module and an external fan, wherein the central control module is responsible for receiving temperature signals detected by the system temperature sensor and the fan temperature sensor; in case the detected temperature is lower than a certain range, the central control module activates the heating module, the external fan and the display module in order to start and display the warm-up process of the outdoor digital signage. Consequently, when the temperature elevates to a certain range, the digital signage control module activates the power source of the outdoor digital signage such that the outdoor digital signage operates within a normal temperature range thereby preventing the dew formed by excessively low outdoor temperature from causing malfunction problems in the outdoor digital signage. | 04-05-2012 |
Patent application number | Description | Published |
20090244416 | Active Array Substrate, Electrode Substrate, and Liquid Crystal Display Panel - An active array substrate, an electrode substrate, and a liquid crystal display panel (LCD) are provided. The LCD includes an active array substrate, an electrode substrate, and a liquid crystal layer. The active array substrate includes a base, a plurality of scan lines and data lines disposed on the base, a plurality of pixel electrodes, and a plurality of active devices. Each of the active devices is electrically connected to the corresponding scan line, date line, and pixel electrode to define a pixel region and a non-display region. The electrode substrate includes a base and a common electrode disposed on the base of the electrode substrate. The liquid crystal layer is formed between the active array substrate and the electrode substrate and includes liquid molecules with a threshold voltage, a saturation voltage and ions located in the non-display region. | 10-01-2009 |
20110115998 | Liquid crystal display panel with charge sharing scheme - A LCD panel in which a pixel has a first sub-pixel area and a second sub-pixel area, each area having a storage capacitor. Each pixel has a first gate line for providing a first gate-line signal for charging the first and second storage capacitors, and a second gate line for providing a second gate-line signal for removing part of the charges in the second storage capacitor to a third capacitor after the first gate-line signal has passed. The width of the first and second gate-line signals and their timing can be varied so that the first gate-line signal provided to a row can be used as the second gate-line signal to one of the preceding rows. In some embodiments, a pixel in each row has a duplicate pixel arranged to similarly receive the first and second gate-line signals, but data signals are received from different data lines. | 05-19-2011 |
20130100106 | LIQUID CRYSTAL DISPLAY WITH COLOR WASHOUT IMPROVEMENT AND METHOD OF DRIVING SAME - An LCD panel with color washout improvement. In one embodiment, the LCD panel includes a plurality of pixels spatially arranged in a matrix form, each pixel defined between a respective pair of scanning lines (G | 04-25-2013 |
20130176523 | PIXEL STRUCTURE FOR LIQUID CRYSTAL DISPLAY DEVICE - In one aspect of the invention, a liquid crystal display device includes a pixel matrix having a plurality of pixels. Each pixel includes a first pixel electrode having a plurality of first pixel electrode stripes and a second pixel electrode having a plurality of second pixel electrode stripes. The first pixel electrode stripes and the second pixel electrode stripes are alternately placed to define a plurality of pitches therebetween. Each pixel is defined between two adjacent first pixel electrode and second pixel electrode stripes, and has a width. In one embodiment, the width of at least one of the pitches is different from that of the other pitches. In another embodiment, the width of each pitch is variable along the adjacent first pixel electrode and second pixel electrode stripes. | 07-11-2013 |
20130176524 | PIXEL STRUCTURE FOR LIQUID CRYSTAL DISPLAY DEVICE - In one aspect of the invention, a liquid crystal display device includes a pixel matrix having a plurality of pixels. Each pixel includes a first pixel electrode having a plurality of first pixel electrode stripes and a second pixel electrode having a plurality of second pixel electrode stripes. The first pixel electrode stripes and the second pixel electrode stripes are alternately placed to define a plurality of pitches therebetween. Each pitch is defined between two adjacent first pixel electrode and second pixel electrode stripes, and has a width. In one embodiment, the width of at least one of the pitches is different from that of the other pitches. In another embodiment, the width of each pitch is variable along the adjacent first pixel electrode and second pixel electrode stripes. | 07-11-2013 |
Patent application number | Description | Published |
20090284483 | Display Device and Method Having Sensing Function - A display device and method having a sensing function is described. The device includes a liquid crystal display (LCD) panel and plural sense lines. The LCD panel includes a plurality of data lines and a plurality of gate lines. Each of the data lines is connected electrically to a plurality of left pixels and a plurality of right pixels. The sense line is disposed between each two adjacent data lines, and each of the sense lines is configured to be parallel to the data lines and perpendicular to the gate lines. The sense lines are used to transmit touch signals. | 11-19-2009 |
20120104402 | ARCHITECTURE OF ANALOG BUFFER CIRCUIT - In one aspect of the invention, an analog buffer circuit includes a p-channel field effect transistor (PTFT) and an n-channel field effect transistor (NTFT). Each of the PTFT and NTFT has a source region and a drain region defining a channel region therebetween, formed on a substrate such that the drain regions of the PTFT and the NTFT are in substantial contact with each other, a gate layer formed over and insulated from the corresponding channel region, a source electrode insulated from the gate layer and electrically connected to the corresponding source region, and a common drain electrode insulated from the gate layer and the source electrode, and is electrically connected to the drain regions of both the PTFT and the NTFT through a via defined over the depletion region. | 05-03-2012 |
20140035896 | DISPLAY WITH MULTIPLEXER FEED-THROUGH COMPENSATION AND METHODS OF DRIVING SAME - In one aspect, an LCD includes a display panel with a pixel matrix having M scan lines and N data lines, and a multiplexer feed-through compensation circuit, which includes P signal lines for providing P video signals, P multiplexers, and K pairs of control lines providing K pairs of control signals. Each multiplexer is electrically coupled to a corresponding signal line and has K channels. Each channel includes first and second switches parallel-connected between the signal line and a corresponding data line for selectively transmitting the video signal to the corresponding data line. Each pair of control lines is respectively electrically coupled to the first and second switches of a corresponding channel of each multiplexer. Each pair of control signals are configured such that a time turning off one of the first and second switches is earlier than that turning off the other switch. | 02-06-2014 |