Patent application number | Description | Published |
20080204739 | Process Excursion Detection - A method for analyzing defect information on a substrate, including logically dividing the substrate into zones, and detecting defects on the substrate to produce the defect information. The defect information from the substrate is analyzed on a zone by zone basis to produce defect level classifications for the defects within each zone. The zonal defect level classifications are analyzed according to at least one analysis method. The defect level classifications are preferably selected from a group of defect level classifications that is specified by a recipe. Preferably, the at least one analysis method includes at least one of zonal defect distribution, automatic defect classification, spatial signature analysis, and excursion detection. The defect level classifications preferably include at least one of individual defect, defect cluster, and spatial signature analysis signature. In one embodiment the defect information is logically divided into configurable zones after the defects on the substrate have been detected. | 08-28-2008 |
20100067781 | Process Excursion Detection - A method for analyzing defect information on a substrate, including logically dividing the substrate into zones, and detecting defects on the substrate to produce the defect information. The defect information from the substrate is analyzed on a zone by zone basis to produce defect level classifications for the defects within each zone. The zonal defect level classifications are analyzed according to at least one analysis method. The defect level classifications are preferably selected from a group of defect level classifications that is specified by a recipe. Preferably, the at least one analysis method includes at least one of zonal defect distribution, automatic defect classification, spatial signature analysis, and excursion detection. The defect level classifications preferably include at least one of individual defect, defect cluster, and spatial signature analysis signature. In one embodiment the defect information is logically divided into configurable zones after the defects on the substrate have been detected. | 03-18-2010 |
20110137576 | Process Excursion Detection - A method for analyzing defect information on a substrate, including logically dividing the substrate into zones, and detecting defects on the substrate to produce the defect information. The defect information from the substrate is analyzed on a zone by zone basis to produce defect level classifications for the defects within each zone. The zonal defect level classifications are analyzed according to at least one analysis method. The defect level classifications are preferably selected from a group of defect level classifications that is specified by a recipe. Preferably, the at least one analysis method includes at least one of zonal defect distribution, automatic defect classification, spatial signature analysis, and excursion detection. The defect level classifications preferably include at least one of individual defect, defect cluster, and spatial signature analysis signature. In one embodiment the defect information is logically divided into configurable zones after the defects on the substrate have been detected. | 06-09-2011 |
20130082174 | METHODS AND APPARATUS FOR CLASSIFICATION OF DEFECTS USING SURFACE HEIGHT ATTRIBUTES - One embodiment relates to a method of classifying a defect on a substrate surface. The method includes scanning a primary electron beam over a target region of the substrate surface causing secondary electrons to be emitted therefrom, wherein the target region includes the defect. The secondary electrons are detected from the target region using a plurality of at least two off-axis sensors so as to generate a plurality of image frames of the target region, each image frame of the target region including data from a different off-axis sensor. The plurality of image data frames are processed to generate a surface height map of the target region, and surface height attributes are determined for the defect. The surface height attributes for the defect are input into a defect classifier. Other embodiments, aspects and features are also disclosed. | 04-04-2013 |
Patent application number | Description | Published |
20100131619 | CREATING CROSS-TECHNOLOGY CONFIGURATION SETTINGS - A network and connection provisioning framework for configuring and provisioning multiple aspects of network connectivity (e.g., multiple networks, media types, and/or connections). The framework may comprise a unified configuration interface that enables an administrator to configure multiple different types of network connectivity. A single configuration file comprising settings for multiple aspects of network connectivity may be generated based on preferences entered by a system administrator, or by exporting current settings from a particular computing device. Global configuration policies or other configuration settings that span multiple types of network connectivity may be also created and stored in one or more configuration files. Stand-alone media managers and/or plug-in modules may implement one or more standardized application programming interface functions so that they may interoperate with the network and connection provisioning framework. The standardized API may be used to ensure that configuration information is handled and stored in a standardized manner by different media managers and/or plug-in modules. | 05-27-2010 |
20100131622 | UNIFIED STORAGE FOR CONFIGURING MULTIPLE NETWORKING TECHNOLOGIES - A network and connection provisioning framework for configuring and provisioning multiple aspects of network connectivity (e.g., multiple networks, media types, and/or connections). The framework may comprise a unified configuration interface that enables an administrator to configure multiple different types of network connectivity. A single configuration file comprising settings for multiple aspects of network connectivity may be generated based on preferences entered by a system administrator, or by exporting current settings from a particular computing device. Global configuration policies or other configuration settings that span multiple types of network connectivity may be also created and stored in one or more configuration files. Stand-alone media managers and/or plug-in modules may implement one or more standardized application programming interface functions so that they may interoperate with the network and connection provisioning framework. The standardized API may be used to ensure that configuration information is handled and stored in a standardized manner by different media managers and/or plug-in modules. | 05-27-2010 |
20100131652 | UNIFIED INTERFACE FOR CONFIGURING MULTIPLE NETWORKING TECHNOLOGIES - A network and connection provisioning framework for configuring and provisioning multiple aspects of network connectivity (e.g., multiple networks, media types, and/or connections). The framework may comprise a unified configuration interface that enables an administrator to configure multiple different types of network connectivity. A single configuration file comprising settings for multiple aspects of network connectivity may be generated based on preferences entered by a system administrator, or by exporting current settings from a particular computing device. Global configuration policies or other configuration settings that span multiple types of network connectivity may be also created and stored in one or more configuration files. Stand-alone media managers and/or plug-in modules may implement one or more standardized application programming interface functions so that they may interoperate with the network and connection provisioning framework. The standardized API may be used to ensure that configuration information is handled and stored in a standardized manner by different media managers and/or plug-in modules. | 05-27-2010 |
20110231551 | NETWORK RESOURCE MANAGEMENT WITH PREDICTION - A computing device including an indicator predicting use of a network resource. The indicator may provide an indication that a threshold associated with a budget for the network resource has or will be reached. When a user requests a network operation that will consume the network resource, an amount of the network resource to be consumed by the operation is predicted, if possible. If the prior use of the network resource and the amount to be used to complete the network operation exceeds a threshold the user may be warned and given an opportunity to cancel the operation or adjust the way in which the operation will be performed. If the amount of network resource a network operation will consume is unknown, a rate of use of the network resource is determined and a time until the budget is reached is estimated. An administrative tool is provided for managing network resources and setting budgets for resource consumption by users, devices, or applications. | 09-22-2011 |
20110238498 | SERVICE STAGE FOR SUBSCRIPTION MANAGEMENT - A utility for managing subscriptions for multiple services in a consistent fashion. The utility may collect information from multiple service providers and present the information to a user in a consistent format. A user interface component may control the user interface during performing actions associated with managing subscriptions, regardless of the specific service for which management operations are performed. The utility may include a feedback component, providing feedback relating to a user such that service providers can elect to supply offers for additional services or service features that align with a user's interests. | 09-29-2011 |
20120254420 | NETWORK RESOURCE MANAGEMENT WITH PREDICTION - An indicator for a device may provide an indication that a threshold associated with a budget for a network resource has or will be reached. When a user requests a network operation that will consume the network resource, an amount of the network resource to be consumed by the operation is predicted, if possible. If the prior use of the network resource and the amount to be used to complete the network operation exceeds a threshold the user may be warned and given an opportunity to cancel the operation or adjust the way in which the operation will be performed. If the amount of network resource a network operation will consume is unknown, a rate of use of the network resource is determined and a time until the budget is reached is estimated. | 10-04-2012 |
20130219058 | NETWORK RESOURCE MANAGEMENT WITH PREDICTION - An indicator for a device may provide an indication that a threshold associated with a budget for a network resource has or will be reached. When a user requests a network operation that will consume the network resource, an amount of the network resource to be consumed by the operation is predicted, if possible. If the prior use of the network resource and the amount to be used to complete the network operation exceeds a threshold the user may be warned and given an opportunity to cancel the operation or adjust the way in which the operation will be performed. If the amount of network resource a network operation will consume is unknown, a rate of use of the network resource is determined and a time until the budget is reached is estimated. | 08-22-2013 |
20140101648 | APPLICATION VERSION GATEKEEPING DURING UPGRADE - Embodiments are directed to ensuring that only one version of an application is running on a cluster. In one scenario, a computer system includes a configuration agent that generates service instance version queries upon startup to determine which service instance version to activate, maintains a service instance version table that includes a listing of service instance versions currently running on the computer system as part of one or more application instances and activates specified service instances. The computer system also includes a failover manager that manages service instance version queries. The failover manager indicates which service instance version to activate to ensure that the appropriate, current version is activated for each service instance. The computer system further includes a cluster manager that creates, deletes and upgrades service instances as part of an application instance upgrade. | 04-10-2014 |
20150074269 | NETWORK RESOURCE MANAGEMENT WITH PREDICTION - An indicator for a device may provide an indication that a threshold associated with a budget for a network resource has or will be reached. When a user requests a network operation that will consume the network resource, an amount of the network resource to be consumed by the operation is predicted, if possible. If the prior use of the network resource and the amount to be used to complete the network operation exceeds a threshold the user may be warned and given an opportunity to cancel the operation or adjust the way in which the operation will be performed. If the amount of network resource a network operation will consume is unknown, a rate of use of the network resource is determined and a time until the budget is reached is estimated. | 03-12-2015 |
Patent application number | Description | Published |
20080262828 | Encoding and Adaptive, Scalable Accessing of Distributed Models - Systems, methods, and apparatus for accessing distributed models in automated machine processing, including using large language models in machine translation, speech recognition and other applications. | 10-23-2008 |
20090083243 | CROSS-LANGUAGE SEARCH - Methods, systems, and apparatus, including computer program products, in which a cross-language search can be performed. A search query can be examined to determine whether it is a candidate for cross-language searching. Upon identifying a candidate, the search can be performed using a translated search query associated with the search query. The results of the translated search query can be served to the client device submitting the search query. | 03-26-2009 |
20090193003 | Cross-Language Search - Methods, systems, and apparatus, including computer program products, in which a cross-language search can be performed. A search query is received in a first language. A translated search query of the search query is obtained and evaluated to determine whether it is a candidate for cross-language searching. Upon identifying a candidate, a search can be performed using the translated search query to generate search results relevant to the translated search query. | 07-30-2009 |
20110015919 | Displaying Original Text In A User Interface With Translated Text - Methods, systems, and apparatus, including computer program products, for user interaction with machine translation. A user interface for receiving requests to translate text and/or documents from a first language text to a second language text. The translated text and/or document is displayed such that the first language text corresponding to a selected portion of the second language text can be accessed and displayed in the same user interface. | 01-20-2011 |
20130046530 | ENCODING AND ADAPTIVE, SCALABLE ACCESSING OF DISTRIBUTED MODELS - Systems, methods, and apparatus for accessing distributed models in automated machine processing, including using large language models in machine translation, speech recognition and other applications. | 02-21-2013 |
20140257787 | ENCODING AND ADAPTIVE, SCALABLE ACCESSING OF DISTRIBUTED MODELS - Systems, methods, and apparatus for accessing distributed models in automated machine processing, including using large language models in machine translation, speech recognition and other applications. | 09-11-2014 |
Patent application number | Description | Published |
20150084139 | DEVICE, SYSTEM AND METHOD FOR PROVIDING MEMS STRUCTURES OF A SEMICONDUCTOR PACKAGE - Techniques and mechanisms for providing precisely fabricated structures of a semiconductor package. In an embodiment, a build-up carrier of the semiconductor package includes a layer of porous dielectric material. Seed copper and plated copper is disposed on the layer of porous dielectric material. Subsequent etching is performed to remove copper adjacent to the layer of porous dielectric material, forming a gap separating a suspended portion of a MEMS structure from the layer of porous dielectric material. In another embodiment, the semiconductor package includes a copper structure disposed between portions of an insulating layer or portions of a layer of silicon nitride material. The layer of silicon nitride material couples the insulating layer to another insulating layer. One or both of the insulating layers are each protected from desmear processing with a respective release layer structure. | 03-26-2015 |
20150135526 | SECONDARY DEVICE INTEGRATION INTO CORELESS MICROELECTRONIC DEVICE PACKAGES - The present disclosure relates to the field of fabricating microelectronic device packages and, more particularly, to microelectronic device packages having bumpless build-up layer (BBUL) designs, wherein at least one secondary device is disposed within the thickness (i.e. the z-direction or z-height) of the microelectronic device of the microelectronic device package. | 05-21-2015 |
20150217995 | ARRANGEMENT OF THROUGH-HOLE STRUCTURES OF A SEMICONDUCTOR PACKAGE - A semiconductor package comprising a suspended beam portion including an arrangement of through-hole structures. In an embodiment, a first surface of the suspended beam portion includes edges each defining in part a respective through-hole of a plurality of through-holes extending between the first surface and a second surface. The first surface comprises a plurality of arm portions each located between a respective pair of edge-adjacent edges. The first surface comprises a plurality of node portions each located at a respective junction of three or more of the plurality of arm portions. In another embodiment, for each of the plurality of node portions, a respective total number of arm portions which join one another at the node portion is a number other than four, or two arm portions which join one another at the node portion have respective mid-lines which are oblique to one another. | 08-06-2015 |
20150291415 | HERMETIC ENCAPSULATION FOR MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICES - Embodiments of the invention describe hermetic encapsulation for MEMS devices, and processes to create the hermetic encapsulation structure. Embodiments comprise a MEMS substrate stack that further includes a magnet, a first laminate organic dielectric film, a first hermetic coating disposed over the magnet, a second laminate organic dielectric film disposed on the hermetic coating, a MEMS device layer disposed over the magnet, and a plurality of metal interconnects surrounding the MEMS device layer. A hermetic plate is subsequently bonded to the MEMS substrate stack and disposed over the formed MEMS device layer to at least partially form a hermetically encapsulated cavity surrounding the MEMS device layer. In various embodiments, the hermetically encapsulated cavity is further formed from the first hermetic coating, and at least one of the set of metal interconnects, or a second hermetic coating deposited onto the set of metal interconnects. | 10-15-2015 |
Patent application number | Description | Published |
20120326271 | SECONDARY DEVICE INTEGRATION INTO CORELESS MICROELECTRONIC DEVICE PACKAGES - The present disclosure relates to the field of fabricating microelectronic device packages and, more particularly, to microelectronic device packages having bumpless build-up layer (BBUL) designs, wherein at least one secondary device is disposed within the thickness (i.e. the z-direction or z-height) of the microelectronic device of the microelectronic device package. | 12-27-2012 |
20130270715 | PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) PACKAGES - A packaged semiconductor die with a bumpless die-package interface and methods of fabrication are described. For example, a semiconductor package includes a substrate having a land side with a lowermost layer of conductive vias. A semiconductor die is embedded in the substrate and has an uppermost layer of conductive lines, one of which is coupled directly to a conductive via of the lowermost layer of conductive vias of the substrate. In another example, a semiconductor package includes a substrate having a land side with a lowermost layer of conductive vias. A semiconductor die is embedded in the substrate and has an uppermost layer of conductive lines with a layer of conductive vias disposed thereon. At least one of the conductive lines is coupled directly to a conductive via of the semiconductor die which is coupled directly to a conductive via of the lowermost layer of conductive vias of the substrate. | 10-17-2013 |
20130277837 | CONTROLLED SOLDER-ON-DIE INTEGRATIONS ON PACKAGES AND METHODS OF ASSEMBLING SAME - A process of bumping a die backside includes opening a recess in a die backside film (DBF) to expose a through-silicon via (TSV) contact in a die, followed by filling the recess with a conductive material that contacts the TSV contact. Added solder is coupled to the conductive material at a level of the DBF. A subsequent die is coupled to the first die at the added solder to form an electrical coupling consisting of the TSV contact, the conductive material, and the added solder, an electrical bump coupled to the subsequent die. Apparatus and computer systems are assembled using the process. | 10-24-2013 |
20130277865 | MULTI DIE PACKAGE STRUCTURES - Package assemblies for and methods of packaging integrated circuit chips are described. Disclosed package assemblies have spacers and recessed regions comprising IC chips. Architectural structures are provided that enable, for example, three dimensional (3D) packaging (or system in package (SiP) or multi-chip modules), systems-on-chip 3D packaging, and hybrid 3D bonding. Embodiments of the invention can be used, for example, to create logic-to-memory, memory-to-memory, and logic-to-logic interface stacking assemblies. | 10-24-2013 |
20130284572 | THROUGH-SILICON VIA RESONATORS IN CHIP PACKAGES AND METHODS OF ASSEMBLING SAME - A process of forming a through-silicon via (TSV) in a die includes forming a movable member in the TSV that can be actuated or that can be a sensor. Action of the movable member in the TSV can result in a logic word being sent from the TSV die to a subsequent die. The TSV die may be embedded in a substrate. The TSV die may also be coupled to a subsequent die. | 10-31-2013 |
20140000377 | SEMICONDUCTOR PACKAGE WITH AIR PRESSURE SENSOR | 01-02-2014 |
20140001583 | METHOD TO INHIBIT METAL-TO-METAL STICTION ISSUES IN MEMS FABRICATION | 01-02-2014 |
20140002178 | SEMICONDUCTOR PACKAGE WITH MECHANICAL FUSE | 01-02-2014 |
20140076051 | ACCELEROMETER AND METHOD OF MAKING SAME - An accelerometer includes a mass, suspended by a beam, and associated conductive paths. Each conductive path is subjected to a magnetic field, such that, when a time varying signal is applied to the conductive paths, a characteristic resonant frequency is produced, and when the mass experiences an acceleration, a respective change in the resonant frequency is produced that may be interpreted as acceleration data. Embodiments include methods of manufacturing an accelerometer and systems and devices incorporating the accelerometer. | 03-20-2014 |
20140083858 | HETEROGENEOUS INTEGRATION OF MICROFLUIDIC DEVICES IN PACKAGE STRUCTURES - Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include attaching a microfluidic die to a package structure, wherein the microfluidic die comprises a plurality of asymmetric electrodes that may be coupled with signal pads disposed within the package structure. | 03-27-2014 |
20140091445 | BUMPLESS BUILD-UP LAYER PACKAGE INCLUDING AN INTEGRATED HEAT SPREADER - An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die side, the microelectronic die including an active region and an inactive region. The example optionally includes a heat spreader having a lower heat spreader surface, an upper heat spreader surface parallel to the lower heat spreader surface, and at least one heat spreader side, the heat spreader disposed on the upper surface of the microelectronic die in thermal communication with the inactive region of the die and electrically insulated from the active region. The example optionally includes an encapsulation material encapsulating the die side and the heat spreader side and lower heat spreader surface, the encapsulation material including a lower surface substantially parallel to the die lower surface and an upper surface substantially parallel to the die upper surface. | 04-03-2014 |
20140093999 | EMBEDDED STRUCTURES FOR PACKAGE-ON-PACKAGE ARCHITECTURE - Electronic assemblies including substrates and their manufacture are described. One assembly includes a die embedded in a dielectric layer in a multilayer substrate, and a dielectric region embedded in the dielectric layer in the multilayer substrate. The multilayer substrate includes a die side and a land side, with the first dielectric region and the dielectric layer extending to the die side. A plurality of vias are positioned within the first dielectric region, the vias extending to pads on the die side. Other embodiments are described and claimed. | 04-03-2014 |
20140159228 | HIGH DENSITY SUBSTRATE ROUTING IN BBUL PACKAGE - Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more embodiments a device can include a bumpless buildup layer (BBUL) substrate including a first die at least partially embedded in the BBUL substrate, the first die including a first plurality of high density interconnect pads. A second die can be at least partially embedded in the BBUL substrate, the second die including a second plurality of high density interconnect pads. A high density interconnect element can be embedded in the BBUL substrate, the high density interconnect element including a third plurality of high density interconnect pads electrically coupled to the first and second plurality of high density interconnect pads. | 06-12-2014 |
20140165723 | INDUCTIVE INERTIAL SENSOR ARCHITECTURE & FABRICATION IN PACKAGING BUILD-UP LAYERS - This invention relates to inductive inertial sensors employing a magnetic drive and/or sense architecture. In embodiments, translational gyroscopes utilize a conductive coil made to vibrate in a first dimension as a function of a time varying current driven through the coil in the presence of a magnetic field. Sense coils register an inductance that varies as a function of an angular velocity in a second dimension. In embodiments, the vibrating coil causes first and second mutual inductances in the sense coils to deviate from each other as a function of the angular velocity. In embodiments, self-inductances associated with a pair of meandering coils vary as a function of an angular velocity in a second dimension. In embodiments, package build-up layers are utilized to fabricate the inductive inertial sensors, enabling package-level integrated inertial sensing advantageous in small form factor computing platforms, such as mobile devices. | 06-19-2014 |
20140169800 | OPTICAL INTERCONNECT ON BUMPLESS BUILD-UP LAYER PACKAGE - This disclosure relates generally to an electronic package that can include a die and a dielectric layer at least partially enveloping the die. Electrical interconnects can be electrically coupled to the die and passing, at least in part, through the dielectric layer. An optical emitter can be electrically coupled to the die with a first one of the electrical interconnects and configured to emit light from a first major surface of the electronic package. A solder bump can be electrically coupled to the die with a second one of the electrical interconnects and positioned on a second major surface of the electronic package different from the first major surface. | 06-19-2014 |
20140203379 | INTEGRATION OF LAMINATE MEMS IN BBUL CORELESS PACKAGE - An apparatus including a die including a first side and an opposite second side including a device side with contact points and lateral sidewalls defining a thickness of the die; a build-up carrier coupled to the second side of the die, the build-up carrier including a plurality of alternating layers of conductive material and insulating material, wherein at least one of the layers of conductive material is coupled to one of the contact points of the die; and at least one device within the build-up carrier disposed in an area void of a layer of patterned conductive material. A method and an apparatus including a computing device including a package including a microprocessor are also disclosed. | 07-24-2014 |
20140217599 | BBUL MATERIAL INTEGRATION IN-PLANE WITH EMBEDDED DIE FOR WARPAGE CONTROL - An apparatus including a die including a first side and an opposite second side including a device side with contact points and lateral sidewalls defining a thickness of the die; a primary core adjacent at least a pair of the lateral sidewalls of the die; and a build-up carrier coupled to the second side of the die, the build-up carrier including a plurality of alternating layers of conductive material and insulating material, wherein at least one of the layers of conductive material is coupled to one of the contact points of the die. A method of forming a package and an apparatus including a computing device including a package are also disclosed. | 08-07-2014 |
20140264830 | BUMPLESS BUILD-UP LAYER (BBUL) SEMICONDUCTOR PACKAGE WITH ULTRA-THIN DIELECTRIC LAYER - Bumpless build-up layer (BBUL) semiconductor packages with ultra-thin dielectric layers are described. For example, an apparatus includes a semiconductor die including an integrated circuit having a plurality of external conductive bumps. A semiconductor package houses the semiconductor die. The semiconductor package includes a dielectric layer disposed above the plurality of external conductive bumps. A conductive via is disposed in the dielectric layer and coupled to one of the plurality of conductive bumps. A conductive line is disposed on the dielectric layer and coupled to the conductive via. | 09-18-2014 |
20150014861 | EMBEDDED STRUCTURES FOR PACKAGE-ON-PACKAGE ARCHITECTURE - Electronic assemblies including substrates and their manufacture are described. One assembly includes a die embedded in a dielectric layer in a multilayer substrate, and a dielectric region embedded in the dielectric layer in the multilayer substrate. The multilayer substrate includes a die side and a land side, with the first dielectric region and the dielectric layer extending to the die side. A plurality of vias are positioned within the first dielectric region, the vias extending to pads on the die side. Other embodiments are described and claimed. | 01-15-2015 |
20150104907 | BUMPLESS BUILD-UP LAYER PACKAGE INCLUDING AN INTEGRATED HEAT SPREADER - An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die side, the microelectronic die including an active region and an inactive region. The example optionally includes a heat spreader having a lower heat spreader surface, an upper heat spreader surface parallel to the lower heat spreader surface, and at least one heat spreader side, the heat spreader disposed on the upper surface of the microelectronic die in thermal communication with the inactive region of the die and electrically insulated from the active region. The example optionally includes an encapsulation material encapsulating the die side and the heat spreader side and lower heat spreader surface, the encapsulation material including a lower surface substantially parallel to the die lower surface and an upper surface substantially parallel to the die upper surface. | 04-16-2015 |
20150189797 | MAGNETIC FIELD SHIELDING FOR PACKAGING BUILD-UP ARCHITECTURES - Magnetic field shielding material with high relative permeability incorporated into a build-up package, for example to restrict a field of a magnet integrated with the build-up to a target device configured to operate in the field. In embodiments, a first device is physically coupled to the build-up. In embodiments, a magnetic field shielding material is disposed in contact with the build-up and in proximity to the first device to restrict a magnetic field either to a region occupied by the first device or to a region exclusive of the first device. A field shielding material may be disposed within build-up near a permanent magnet also within the build-up to reduce exposure of another device, such as an IC, to the magnetic field without reducing MEMS device exposure. | 07-02-2015 |
20150194406 | HIGH DENSITY SUBSTRATE ROUTING IN BBUL PACKAGE - Discussed generally herein are devices that include high density interconnects between dice and techniques for making and using those devices. In one or more embodiments a device can include a bumpless buildup layer (BBUL) substrate including a first die at least partially embedded in the BBUL substrate, the first die including a first plurality of high density interconnect pads. A second die can be at least partially embedded in the BBUL substrate, the second die including a second plurality of high density interconnect pads. A high density interconnect element can be embedded in the BBUL substrate, the high density interconnect element including a third plurality of high density interconnect pads electrically coupled to the first and second plurality of high density interconnect pads. | 07-09-2015 |