Patent application number | Description | Published |
20080276256 | Method and System for Speeding Up Mutual Exclusion - In a multiprocessor computer system, a lock operation is maintained with a thread using non-atomic instructions. Identifiers are assigned to each thread. Flags in conjunction with the thread identifiers are used to determine the continuity of the lock with a thread. However, in the event continuity of the lock with the thread ceases, a compare-and-swap operation is executed to reset the lock with the same thread or another thread. Similarly, in the event there has been a collision between two or more threads requesting the lock, a compare-and-swap operation is executed to assign the lock to one of the requesting threads. Accordingly, prolonged ownership of a lock operation by a thread is encouraged to mitigate use of atomic operations in granting of the lock to a non-owning thread. | 11-06-2008 |
20080281906 | SERVER DEVICE OPERATING IN RESPONSE TO RECEIVED REQUEST - The present invention provides a server device operating in response to a request received from a client device. A request storage device in system memory space with a request storage region stores a request received from a client device in association with identification information. An identification information storage region contains a request that is waiting to be processed. An identification information storage unit retrieves at least one request waiting to be processed from the request storage region if the number of identification information pieces stored in the identification information storage region has declined to a reference number or below, and then stores retrieved request identification information in the identification information storage region Multiple request processors operate in parallel, each acquiring identification information from the identification information storage region, a request identified by the acquired identification information from the request storage region, and performing processing in response to the acquired request. | 11-13-2008 |
20090187896 | COMPILER DEVICE, PROGRAM, AND RECORDING MEDIUM - Compiler device for optimizing program which manipulates a character string includes append instruction detection unit, store code generation unit, and append code generation unit. The append instruction detection unit detects an append instruction which appends a character string to a string variable for storing a character string, in the program. The store code generation unit generates, a substitute for each of a plurality of the append instructions detected by the append instruction detection unit, a store code for storing data of an appendant character string to be appended to the string variable by the append instruction into a buffer. The append instructions append the character strings to the same string variable. The append code generation unit generates append code for appending a plurality of the appendant character strings to the string variable, at a position executed before an instruction to refer to the string variable in the program. | 07-23-2009 |
20100088476 | METHOD FOR ALLOWING EXCLUSIVE ACCESS TO SHARED DATA - A method of allowing exclusive access to shared data by a computing device and a computer readable article embodying instructions for executing the method. The method includes: reading from a storage unit into a memory a program including a code for execution in a critical section and an instruction to write a value into or read a value from a shared data area in the memory; acquiring a lock on the critical section before start of a first instruction in the critical section; writing a value into a thread-local area in the memory in response to an instruction to write the value into the shared data area; writing into the shared data area the value written into the thread-local area upon completion of a final instruction in the critical section; and releasing the lock on the critical section, thereby allowing exclusive access to shared data. | 04-08-2010 |
20100106932 | CONTROL APPARATUS - A control apparatus, control method and computer readable article of manufacture for controlling data. The control apparatus includes a data storage unit; a plurality of entry storage units, and a plurality of registration units. The data storage unit stores data. Each of the entry storage units stores an entry for registering a pointer to data. If each of the registration units receives an instruction for registering data, then each registration unit (i) searches the entry storage units for an entry storage unit having an empty entry, (ii) registers a pointer to the data to be registered in the retrieved entry storage unit and (iii) stores the data to be registered and identification information of the retrieved entry storage unit in the data storage unit in such a manner that the data to be registered and the identification information is associated with each other. | 04-29-2010 |
20100122041 | MEMORY CONTROL APPARATUS, PROGRAM, AND METHOD - A memory control apparatus which controls access to a shared memory for each transaction. The apparatus includes a management unit that stores versions of data stored in the shared memory, a log storage unit that stores an update entry including a version of data subjected to an update operation in response to execution of an update operation on the shared memory in processing each transaction, and a control unit that writes a result of processing corresponding to execution of a relevant update operation to the shared memory when a request to commit a transaction has been given, and a relevant update entry version matches a corresponding version stored in the management unit, or re-executes the update operation and writes a result of re-execution to the shared memory when the update entry version does not match the corresponding version in the management unit. | 05-13-2010 |
20100138460 | MEMORY POWER CONTROL METHOD AND MEMORY POWER CONTROL PROGRAM - A method and a computer readable article of manufacture for controlling memory power consumption on a computer. The method includes a memory having a power saving mode and performs a garbage collection for collecting no-longer-needed objects in groups the no-longer-needed objects being allocated to memory blocks obtained by dividing a memory's address space by a predetermined constant size. The method includes the steps of dividing a heap area of the memory into a number of sub-heap areas; managing the sub-heap areas; and changing the number of sub-heap areas used for garbage collection based on a magnitude correlation between a required time for the garbage collection and a predefined target value. | 06-03-2010 |
20110004869 | PROGRAM, APPARATUS, AND METHOD OF OPTIMIZING A JAVA OBJECT - An apparatus, method and article of manufacture tangibly embodying computer readable instructions for optimizing a Java object on a target computer program. The apparatus includes: a storage unit for storing a value of the object and management information on the object in association with each other; a code generation unit for generating, from the target computer program, optimized code and unoptimized code; a switching unit for switching from executing the target computer program using the optimized code to executing the target computer program using the unoptimized code in response to an event in which the value of the object is written while the target computer program is executed by using the optimized code; and a management unit for managing the object by accessing the management information by a non-detection write operation in which writing to the object is performed without being detected. | 01-06-2011 |
20110282920 | REQUEST PROCESSING SYSTEM, METHOD AND PROGRAM PRODUCT - A processing method has been claimed for reducing the average wait time of requests in a queue in a system environment where garbage collection may occur. In the method, a computer system treats as a unit each request in a queue and a completion time of garbage collection that may occur at the time of processing the request, and processes requests preferentially and systematically in ascending order of the processing times of the units including the garbage collection times, thereby, reducing the average wait time of the requests. While, the computer system managing the queue knows the remaining amount of heap just before processing a certain request, the computer system statistically calculates in advance the amounts of heap to be consumed on a request type basis and holds the values. Accordingly, before processing a certain request, the computer system can predict whether or not the processing of the request will cause garbage collection, in consideration of the estimated heap consumption of the request and the remaining amount of heap in the memory. | 11-17-2011 |
20120215818 | REQUEST PROCESSING SYSTEM, METHOD AND PROGRAM PRODUCT - A processing method has been claimed for reducing the average wait time of requests in a queue in a system environment where garbage collection may occur. In the method, a computer system treats as a unit each request in a queue and a completion time of garbage collection that may occur at the time of processing the request, and processes requests preferentially and systematically in ascending order of the processing times of the units including the garbage collection times, thereby, reducing the average wait time of the requests. While, the computer system managing the queue knows the remaining amount of heap just before processing a certain request, the computer system statistically calculates in advance the amounts of heap to be consumed on a request type basis and holds the values. | 08-23-2012 |
20130067431 | PROGRAM, APPARATUS, AND METHOD OF OPTIMIZING A JAVA OBJECT - An apparatus, method and article of manufacture tangibly embodying computer readable instructions for optimizing a Java object on a target computer program. The apparatus includes: a storage unit for storing a value of the object and management information on the object in association with each other; a code generation unit for generating, from the target computer program, optimized code and unoptimized code; a switching unit for switching from executing the target computer program using the optimized code to executing the target computer program using the unoptimized code in response to an event in which the value of the object is written while the target computer program is executed by using the optimized code; and a management unit for managing the object by accessing the management information by a non-detection write operation in which writing to the object is performed without being detected. | 03-14-2013 |
20140007046 | INITIALIZATION SAFETY | 01-02-2014 |
20140007047 | INITIALIZATION SAFETY | 01-02-2014 |
20140040588 | NON-TRANSACTIONAL PAGE IN MEMORY - One or more embodiments are directed to allocating a page to put non-shared data to the page, setting a transactional property for the page, the transactional property indicating that data in the page does not need tracking by hardware transactional memory (HTM), in response to detecting an access to the page during a transaction, determining whether the transactional property for the page is set, and in response to determining that the transactional property for the page is set, handling data loaded from the page in a cache as non-transactional data. | 02-06-2014 |
20140040589 | NON-TRANSACTIONAL PAGE IN MEMORY - One or more embodiments are directed to allocating a page to put non-shared data to the page, setting a transactional property for the page, the transactional property indicating that data in the page does not need tracking by hardware transactional memory (HTM), in response to detecting an access to the page during a transaction, determining whether the transactional property for the page is set, and in response to determining that the transactional property for the page is set, handling data loaded from the page in a cache as non-transactional data. | 02-06-2014 |
20140047215 | STALL REDUCING METHOD, DEVICE AND PROGRAM FOR PIPELINE OF PROCESSOR WITH SIMULTANEOUS MULTITHREADING FUNCTION - The disclosure provides a technique for suppressing the occurrence of stalling caused by data dependency other than register dependency in an out-of-order processor. A stall reducing program includes a handler for detecting a stall occurring during execution of execution code using a PMU, and identifying, based on dependencies, a second instruction dependent on data of a first instruction causing the stall based on this dependency; a profiler registering the second instruction as profile information; and an optimization module for inserting a thread yield instruction in the appropriate position inside the execution code or original code file based on the profile information, and outputting the optimized execution code. | 02-13-2014 |
20140325188 | SIMULTANEOUS FINISH OF STORES AND DEPENDENT LOADS - A method for reducing a pipeline stall in a multi-pipelined processor includes finding a store instruction having a same target address as a load instruction and having a store value of the store instruction not yet written according to the store instruction, when the store instruction is being concurrently processed in a different pipeline than the load instruction and the store instruction occurs before the load instruction in a program order. The method also includes associating a target rename register of the load instruction as well as the load instruction with the store instruction, responsive to the finding step. The method further includes writing the store value of the store instruction to the target rename register of the load instruction and finishing the load instruction without reissuing the load instruction, responsive to writing the store value of the store instruction according to the store instruction to finish the store instruction. | 10-30-2014 |