Takeshi Murata
Takeshi Murata, Kawasaki-Shi JP
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20090278193 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A nonvolatile semiconductor memory device includes a first stack unit with a first selection transistor and a second selection transistor formed on a semiconductor substrate and a second stack unit with first insulating layers and first conductive layers stacked alternately on the upper surface of the first stack unit. The second stack unit includes a second insulating layer formed in contact with side walls of the first insulating layer and the first conductive layer, a charge storage layer formed in contact with the second insulating layer for storing electrical charges, a third insulating layer formed in contact with the charge storage layer, and a first semiconductor layer formed in contact with the third insulating layer so as to extend in a stacking direction, with one end connected to one diffusion layer of the first selection transistor and the other end connected to a diffusion layer of the second selection transistor. | 11-12-2009 |
20100065900 | SEMICONDUCTOR DEVICE INCLUDING RESISTANCE ELEMENT - A semiconductor device includes a resistance element. The resistance element includes a first and second conductive films, second insulating film, and contact plugs. The first conductive film is formed on a semiconductor substrate with a first insulating film interposed therebetween. The second insulating film is formed on the first conductive film. The second conductive film is formed on the second insulating film. In the first connection portion, the second insulating film is removed. The first connection portion connects the first conductive film and the second conductive film together. The contact plugs are formed on the second conductive film. The contact plugs are arranged such that a region located on the second conductive film and immediately above the connection portion is sandwiched between the contact plugs. | 03-18-2010 |
20100155813 | SEMICONDUCTOR MEMORY DEVICE HAVING STACK GATE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor memory device includes select transistors, cell transistors, and cell units. The select transistors formed on a substrate and include first electrodes. The cell transistors include second electrodes with a charge storage layer and a control. The cell units including a plurality of the cell transistors connected together in series between the two select transistors. A distance between the first electrodes and a distance between the first electrodes which is adjacent to the second electrodes and adjacent second electrodes are each at least double a distance between second electrodes. A surface of the substrate between second electrodes is flush with the surface of the substrate between the first electrode and the adjacent second electrodes. The surface of the substrate between the first electrodes is positioned lower than the surface of the substrate between the first electrodes and the second electrodes. | 06-24-2010 |
20110038194 | SEMICONDUCTOR STORAGE DEVICE - According to one embodiment, a semiconductor storage device includes a plurality of parallel first interconnects extending in a first direction, a plurality of parallel second interconnects which extend in a second direction perpendicular to the first direction and which make a two-level crossing with respect to the first interconnects, and memory cell structures provided in regions where the first interconnects and the second interconnects make two-level crossings, the memory cell structures being connected on one end to the first interconnects and connected on the other end to the second interconnects, the memory cell structure including a variable resistive element and a non-ohmic element which are connected in series, wherein the endmost first interconnect is disconnected in at least one portion. | 02-17-2011 |
20110316065 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A nonvolatile semiconductor memory device includes a first stack unit with a first selection transistor and a second selection transistor formed on a semiconductor substrate and a second stack unit with first insulating layers and first conductive layers stacked alternately on the upper surface of the first stack unit. The second stack unit includes a second insulating layer formed in contact with side walls of the first insulating layer and the first conductive layer, a charge storage layer formed in contact with the second insulating layer for storing electrical charges, a third insulating layer formed in contact with the charge storage layer, and a first semiconductor layer formed in contact with the third insulating layer so as to extend in a stacking direction, with one end connected to one diffusion layer of the first selection transistor and the other end connected to a diffusion layer of the second selection transistor. | 12-29-2011 |
Takeshi Murata, Kanagawa JP
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20090312554 | Novel Process for the Preparation of Hexacyclic Compounds - This invention relates to novel processes for the preparation of compounds of the formula [1], | 12-17-2009 |
20090326225 | Novel Process for the Preparation of Hexacyclic Compounds - This invention relates to novel processes for the preparation of compounds of the formula [1], | 12-31-2009 |
20100197676 | 5-Substituted-2-Phenylamino Benzamides as Mek Inhibitors - An objective of the present invention is to provide compounds that exhibit strong MEK-inhibiting activity and are stable in vivo and soluble in water, which can be used as preventive or therapeutic agents for proliferative diseases. | 08-05-2010 |
20100324284 | PYRROLOPYRIMIDINE DERIVATIVE AS P13K INHIBITOR AND USE THEREOF - A preventive or therapeutic agent of a proliferative disease such as cancer, having superior PI3K inhibitory effects, superior cell proliferation inhibitory action as well as superior stability in a body and water solubility, is provided. | 12-23-2010 |
20150141400 | QUINAZOLINEDIONE DERIVATIVE - The present invention relates to quinazolinedione derivatives represented by formula (I) or pharmaceutically acceptable salts thereof. | 05-21-2015 |
20150152047 | BENZAMIDE DERIVATIVE - The present invention relates to benzamide derivatives represented by formula (I) or pharmaceutically acceptable salts thereof. | 06-04-2015 |
Takeshi Murata, Yokohama-Shi JP
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20100103736 | NONVOLATILE SEMICONDUCTOR MEMORY HAVING A WORD LINE BENT TOWARDS A SELECT GATE LINE SIDE - A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line. | 04-29-2010 |
20120176839 | NONVOLATILE SEMICONDUCTOR MEMORY HAVING A WORD LINE BENT TOWARDS A SELECT GATE LINE SIDE - A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line. | 07-12-2012 |
20130294164 | NONVOLATILE SEMICONDUCTOR MEMORY HAVING A WORD LINE BENT TOWARDS A SELECT GATE LINE SIDE - A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line. | 11-07-2013 |
20140293694 | NONVOLATILE SEMICONDUCTOR MEMORY HAVING A WORD LINE BENTTOWARDS A SELECT GATE LINE SIDE - A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line. | 10-02-2014 |
20150162340 | NONVOLATILE SEMICONDUCTOR MEMORY HAVING A WORD LINE BENT TOWARDS A SELECT GATE LINE SIDE - A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line. | 06-11-2015 |
20160064393 | NONVOLATILE SEMICONDUCTOR MEMORY HAVING A WORD LINE BENT TOWARDS A SELECT GATE LINE SIDE - A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line. | 03-03-2016 |
Takeshi Murata, Osaka JP
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20090047044 | TONER SUPPLY DEVICE, DEVELOPING DEVICE AND IMAGE FORMING APPARATUS - A toner supply device for supplying toner to a developing device includes: a first toner supply portion for supplying toner to a developing hopper; a second toner supply portion for supplying the stored toner to the first toner supply portion; a first toner supply driver for driving the first toner supply portion; a first residual toner quantity detector for detecting the residual toner quantity in the first toner supply portion; a second toner supply driver for driving the second toner supply portion; a second residual toner quantity detector for detecting the residual toner quantity in the second toner supply portion; and a controller for controlling the drives of the first and second toner supply drivers by switching on and off the drives of the first and second toner supply drivers in accordance with the residual toner quantities detected by the first and second residual toner quantity detectors. | 02-19-2009 |
20120126708 | LED DRIVE CIRCUIT AND LED ILLUMINATION APPARATUS - An LED drive circuit that is connectable to a phase control type of light adjuster and receives a voltage based on an a.c. voltage to drive an LED load, the LED drive circuit has a structure which includes: | 05-24-2012 |
20120217900 | LED DRIVING CIRCUIT, LED ILLUMINATION APPLIANCE, LED ILLUMINATOR, AND LED ILLUMINATION SYSTEM - Provided is an LED driving circuit ( | 08-30-2012 |
20130076248 | LED DRIVE CIRCUIT AND LED ILLUMINATION APPARATUS USING THE SAME - An LED drive circuit which is connectable to a phase control type light adjuster, including: | 03-28-2013 |
Takeshi Murata, Tokyo JP
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20080237997 | METAL GASKET - The present invention provides a metal gasket to be fitted between a cylinder head and a cylinder block to seal a gap between the surfaces thereof, which comprises: a thin metal plate with an opening formed at a position corresponding to a bore portion of the cylinder block, the opening having a diameter larger than that of the bore portion; and a pair of elastic metal substrates each having: an opening which substantially agrees with the bore portion of the cylinder block; an annular convex portion formed concentrically with the opening at a position apart from an edge portion of the opening by a specified distance; and an annular holding portion for holding a peripheral portion of the opening of the thin metal plate, horizontally extending out from an outer edge portion of the convex portion, wherein the pair of the elastic metal substrates are disposed so that top portions of the respective convex portions face each other and that the holding portions overlap with the thin metal plate, and engaged to the thin metal plate at a plurality of positions. | 10-02-2008 |
Takeshi Murata, Kyoto-Shi JP
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20110226622 | NOVEL CLEAR NATIVE ELECTROPHORESIS METHOD UTILIZING AROMATIC SULFONIC ACID COMPOUND - This invention provides a reagent for protein electrophoresis, an electrophoresis gel or buffer composition containing the reagent, and a protein separation method and an electrophoresis kit using the reagent and the composition. | 09-22-2011 |
Takeshi Murata, Yokkaichi-Shi JP
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20110233500 | SEMICONDUCTOR MEMORY DEVICE INCLUDING MEMORY CELL HAVING RECTIFYING ELEMENT AND SWITCHING ELEMENT - According to one embodiment, a semiconductor memory device includes a first conductive line, a second conductive line, a rectifying element, a switching element, a first side wall film and a second side wall film. The first conductive line extends in a first direction. The second conductive line extends in a second direction crossing the first direction. The rectifying element is connected between the first and second conductive lines. The switching element is connected in series with the rectifying element between the first and second conductive lines. The first side wall film is formed on a side surface of the rectifying element. The second side wall film is formed on a side surface of at least one of the first and second conductive lines. At least one of a film type and a film thickness of the second side wall film is different from that of the first side wall film. | 09-29-2011 |
20120025386 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor memory device according to an embodiment includes a cell array block having a plurality of cell arrays stacked therein, each of the cell arrays including a plurality of memory cells and a plurality of selective wirings selecting the plurality of memory cells are stacked, a pillar-shaped first via extending in a stack direction from a first height to a second height and having side surfaces connected to a first wiring, and a pillar-shaped second via extending in the stack direction from the first height to the second height and having side surfaces connected to a second wiring upper than the first wiring, the second wiring being thicker in the stack direction than the first wiring and having a higher resistivity than the first wiring. | 02-02-2012 |
Takeshi Murata, Odawara-Shi JP
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20130039871 | AQUEOUS COMPOSITION CONTAINED IN CONTAINER - Provided is an aqueous composition contained in a container, where water evaporation of the aqueous composition contained in a container is inhibited, and thereby the contents are prevented from solidifying or changing in properties. As a result, excellent long-term stability is obtained, and even when the container is a spray container or a pump container, the contents adhering to the discharge opening of the container is inhibited from drying, and thereby clogging can be prevented. The aqueous composition contained in a container contains the following components (A), (B), and (C): (A) a polyoxyethylene alkyl or alkenyl ether having an alkyl or alkenyl group having 20 to 24 carbon atoms and an average molar number of ethylene oxide added of 1.5 to 4, (B) a water-soluble polymer, and (C) water. | 02-14-2013 |
20130096205 | AQUEOUS COMPOSITION TO BE CONTAINED IN CONTAINER - Provided is an aqueous composition contained in a container, maintaining an excellent water-evaporation-inhibiting effect even when an alkali metal salt or the like is contained in the aqueous composition, and having excellent long-term stability. The aqueous composition contained in a container includes the following components (A) to (D): (A) a polyoxyethylene alkyl or alkenyl ether having an alkyl or alkenyl group having 20 to 24 carbon atoms and an average molar number of ethylene oxide added of 1.5 to 4, (B) a water-soluble polymer, (C) a nonionic surfactant having an ethylene oxide group (but excluding component (A)), and (D) water. | 04-18-2013 |
20130102688 | OIL-IN-WATER EMULSION COMPOSITION AND METHOD FOR PRODUCING SAME - There is provided an oil-in-water emulsion composition whose continuous phase is an aqueous phase, but which has a high moisture evaporation suppressing effect and is also superior in feeling, and a method for producing the same. | 04-25-2013 |
Takeshi Murata, Hamamatsu-City JP
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20140123849 | CYLINDER HEAD GASKET - A cylinder head gasket includes two main members on two sides, and middle members sandwiched therebetween. The middle members are composed of a first middle member and a second middle member that is separated and distinct therefrom. The first middle member is a metal plate that has cylinder hole rim portions encircling cylinder holes to a particular width, with beads surrounding the cylinder holes being formed in the cylinder hole rim portions. The metal plate either forms separated items, one at each cylinder hole, or else forms an integrated item connected between the cylinder holes. The second middle member is a metal plate that is disposed on the outside of the first middle member and has oil holes and bolt holes. The thickness of the first middle member is greater than that of the second middle member. | 05-08-2014 |
20140217682 | GASKET - A gasket held between opposite flange joint surfaces with a bolt includes a combination of a complex material with a rubber material formed on one or both sides of a steel plate, the complex material having a convex or waveform bead, and a circular metal plate arranged at a bolt portion with a through-hole where a shank of the bolt penetrates and a bearing corresponding portion that corresponds to a bearing of the bolt around the through-hole. The gasket is configured to have the thickness (H | 08-07-2014 |
Takeshi Murata, Edogawa-Ku JP
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20140155398 | HETEROCYCLIC COMPOUNDS AS PROTEIN KINASE INHIBITORS - The present invention provides a heterocyclic compound of formula (I), a pharmaceutically acceptable salt thereof, a prodrug thereof or a hydrate thereof, wherein A, A′ B, D, R | 06-05-2014 |
20150157613 | HETEROCYCLIC COMPOUNDS AS PROTEIN KINASE INHIBITORS - The present invention provides a heterocyclic compound of formula (I), a pharmaceutically acceptable salt thereof, a prodrug thereof or a hydrate thereof, wherein A, A′ B, D, R | 06-11-2015 |
Takeshi Murata, Mie JP
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20150041815 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - According to one embodiment, a plurality of memory cell transistors including a floating gate and a control gate and a plurality of peripheral circuit transistors including a lower electrode portion and an upper electrode portion are included. The floating gate includes a first polysilicon region, and the lower electrode includes a second polysilicon region. The first polysilicon region is a p-type semiconductor in which boron is doped, and the second polysilicon region is an n-type semiconductor in which phosphorus and boron are doped. | 02-12-2015 |
Takeshi Murata, Kariya-City JP
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20150362392 | PRESSURE SENSOR AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a pressure sensor includes: preparing a stem which has a cylindrical shape with a bottom as a diaphragm; mounting a sensor chip on the diaphragm; preparing a conductive member, in which an internal connection region is integrated with an external connection region electrically connected to an external circuit by an outer frame; forming a first resin mold to couple the internal connection region to the external connection region; separating the outer frame from the internal connection region and the external connection region; arranging the internal connection region in the stem; and electrically connecting the sensor chip and the internal connection region through the first connection member. | 12-17-2015 |
Takeshi Murata, Yokkaichi Mie JP
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20160043196 | SEMICONDUCTOR DEVICE - According to an embodiment, a semiconductor device includes a semiconductor element that is formed on a semiconductor substrate, an interlayer insulating film, including a silicon oxide film, that is formed to cover the semiconductor element, a wiring layer, including a metal, that is formed in the interlayer insulating film, and a first metal silicide film that is formed between the wiring layer and the interlayer insulating film. | 02-11-2016 |
Takeshi Murata, Yokkaichi JP
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20160071863 | METHOD OF MANUFACTURING SEMICONDUCTOR STORAGE APPARATUS, AND SEMICONDUCTOR STORAGE APPARATUS - A method of manufacturing a semiconductor storage apparatus according to an embodiment includes forming an array of a plurality of memory cells. The method includes forming an interlayer insulating film that covers the memory cells. The method includes forming a first nitride film that covers an upper part of the interlayer insulating film. The method includes ion-implanting a first impurity into the first nitride film. | 03-10-2016 |